ac97_pcm.c 21 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  3. * Universal interface for Audio Codec '97
  4. *
  5. * For more details look to AC '97 component specification revision 2.2
  6. * by Intel Corporation (http://developer.intel.com) and to datasheets
  7. * for specific codecs.
  8. *
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23. *
  24. */
  25. #include <linux/delay.h>
  26. #include <linux/init.h>
  27. #include <linux/slab.h>
  28. #include <linux/mutex.h>
  29. #include <linux/export.h>
  30. #include <sound/core.h>
  31. #include <sound/pcm.h>
  32. #include <sound/control.h>
  33. #include <sound/ac97_codec.h>
  34. #include <sound/asoundef.h>
  35. #include "ac97_id.h"
  36. #include "ac97_local.h"
  37. /*
  38. * PCM support
  39. */
  40. static unsigned char rate_reg_tables[2][4][9] = {
  41. {
  42. /* standard rates */
  43. {
  44. /* 3&4 front, 7&8 rear, 6&9 center/lfe */
  45. AC97_PCM_FRONT_DAC_RATE, /* slot 3 */
  46. AC97_PCM_FRONT_DAC_RATE, /* slot 4 */
  47. 0xff, /* slot 5 */
  48. AC97_PCM_LFE_DAC_RATE, /* slot 6 */
  49. AC97_PCM_SURR_DAC_RATE, /* slot 7 */
  50. AC97_PCM_SURR_DAC_RATE, /* slot 8 */
  51. AC97_PCM_LFE_DAC_RATE, /* slot 9 */
  52. 0xff, /* slot 10 */
  53. 0xff, /* slot 11 */
  54. },
  55. {
  56. /* 7&8 front, 6&9 rear, 10&11 center/lfe */
  57. 0xff, /* slot 3 */
  58. 0xff, /* slot 4 */
  59. 0xff, /* slot 5 */
  60. AC97_PCM_SURR_DAC_RATE, /* slot 6 */
  61. AC97_PCM_FRONT_DAC_RATE, /* slot 7 */
  62. AC97_PCM_FRONT_DAC_RATE, /* slot 8 */
  63. AC97_PCM_SURR_DAC_RATE, /* slot 9 */
  64. AC97_PCM_LFE_DAC_RATE, /* slot 10 */
  65. AC97_PCM_LFE_DAC_RATE, /* slot 11 */
  66. },
  67. {
  68. /* 6&9 front, 10&11 rear, 3&4 center/lfe */
  69. AC97_PCM_LFE_DAC_RATE, /* slot 3 */
  70. AC97_PCM_LFE_DAC_RATE, /* slot 4 */
  71. 0xff, /* slot 5 */
  72. AC97_PCM_FRONT_DAC_RATE, /* slot 6 */
  73. 0xff, /* slot 7 */
  74. 0xff, /* slot 8 */
  75. AC97_PCM_FRONT_DAC_RATE, /* slot 9 */
  76. AC97_PCM_SURR_DAC_RATE, /* slot 10 */
  77. AC97_PCM_SURR_DAC_RATE, /* slot 11 */
  78. },
  79. {
  80. /* 10&11 front, 3&4 rear, 7&8 center/lfe */
  81. AC97_PCM_SURR_DAC_RATE, /* slot 3 */
  82. AC97_PCM_SURR_DAC_RATE, /* slot 4 */
  83. 0xff, /* slot 5 */
  84. 0xff, /* slot 6 */
  85. AC97_PCM_LFE_DAC_RATE, /* slot 7 */
  86. AC97_PCM_LFE_DAC_RATE, /* slot 8 */
  87. 0xff, /* slot 9 */
  88. AC97_PCM_FRONT_DAC_RATE, /* slot 10 */
  89. AC97_PCM_FRONT_DAC_RATE, /* slot 11 */
  90. },
  91. },
  92. {
  93. /* double rates */
  94. {
  95. /* 3&4 front, 7&8 front (t+1) */
  96. AC97_PCM_FRONT_DAC_RATE, /* slot 3 */
  97. AC97_PCM_FRONT_DAC_RATE, /* slot 4 */
  98. 0xff, /* slot 5 */
  99. 0xff, /* slot 6 */
  100. AC97_PCM_FRONT_DAC_RATE, /* slot 7 */
  101. AC97_PCM_FRONT_DAC_RATE, /* slot 8 */
  102. 0xff, /* slot 9 */
  103. 0xff, /* slot 10 */
  104. 0xff, /* slot 11 */
  105. },
  106. {
  107. /* not specified in the specification */
  108. 0xff, /* slot 3 */
  109. 0xff, /* slot 4 */
  110. 0xff, /* slot 5 */
  111. 0xff, /* slot 6 */
  112. 0xff, /* slot 7 */
  113. 0xff, /* slot 8 */
  114. 0xff, /* slot 9 */
  115. 0xff, /* slot 10 */
  116. 0xff, /* slot 11 */
  117. },
  118. {
  119. 0xff, /* slot 3 */
  120. 0xff, /* slot 4 */
  121. 0xff, /* slot 5 */
  122. 0xff, /* slot 6 */
  123. 0xff, /* slot 7 */
  124. 0xff, /* slot 8 */
  125. 0xff, /* slot 9 */
  126. 0xff, /* slot 10 */
  127. 0xff, /* slot 11 */
  128. },
  129. {
  130. 0xff, /* slot 3 */
  131. 0xff, /* slot 4 */
  132. 0xff, /* slot 5 */
  133. 0xff, /* slot 6 */
  134. 0xff, /* slot 7 */
  135. 0xff, /* slot 8 */
  136. 0xff, /* slot 9 */
  137. 0xff, /* slot 10 */
  138. 0xff, /* slot 11 */
  139. }
  140. }};
  141. /* FIXME: more various mappings for ADC? */
  142. static unsigned char rate_cregs[9] = {
  143. AC97_PCM_LR_ADC_RATE, /* 3 */
  144. AC97_PCM_LR_ADC_RATE, /* 4 */
  145. 0xff, /* 5 */
  146. AC97_PCM_MIC_ADC_RATE, /* 6 */
  147. 0xff, /* 7 */
  148. 0xff, /* 8 */
  149. 0xff, /* 9 */
  150. 0xff, /* 10 */
  151. 0xff, /* 11 */
  152. };
  153. static unsigned char get_slot_reg(struct ac97_pcm *pcm, unsigned short cidx,
  154. unsigned short slot, int dbl)
  155. {
  156. if (slot < 3)
  157. return 0xff;
  158. if (slot > 11)
  159. return 0xff;
  160. if (pcm->spdif)
  161. return AC97_SPDIF; /* pseudo register */
  162. if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK)
  163. return rate_reg_tables[dbl][pcm->r[dbl].rate_table[cidx]][slot - 3];
  164. else
  165. return rate_cregs[slot - 3];
  166. }
  167. static int set_spdif_rate(struct snd_ac97 *ac97, unsigned short rate)
  168. {
  169. unsigned short old, bits, reg, mask;
  170. unsigned int sbits;
  171. if (! (ac97->ext_id & AC97_EI_SPDIF))
  172. return -ENODEV;
  173. /* TODO: double rate support */
  174. if (ac97->flags & AC97_CS_SPDIF) {
  175. switch (rate) {
  176. case 48000: bits = 0; break;
  177. case 44100: bits = 1 << AC97_SC_SPSR_SHIFT; break;
  178. default: /* invalid - disable output */
  179. snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
  180. return -EINVAL;
  181. }
  182. reg = AC97_CSR_SPDIF;
  183. mask = 1 << AC97_SC_SPSR_SHIFT;
  184. } else {
  185. if (ac97->id == AC97_ID_CM9739 && rate != 48000) {
  186. snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
  187. return -EINVAL;
  188. }
  189. switch (rate) {
  190. case 44100: bits = AC97_SC_SPSR_44K; break;
  191. case 48000: bits = AC97_SC_SPSR_48K; break;
  192. case 32000: bits = AC97_SC_SPSR_32K; break;
  193. default: /* invalid - disable output */
  194. snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
  195. return -EINVAL;
  196. }
  197. reg = AC97_SPDIF;
  198. mask = AC97_SC_SPSR_MASK;
  199. }
  200. mutex_lock(&ac97->reg_mutex);
  201. old = snd_ac97_read(ac97, reg) & mask;
  202. if (old != bits) {
  203. snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
  204. snd_ac97_update_bits_nolock(ac97, reg, mask, bits);
  205. /* update the internal spdif bits */
  206. sbits = ac97->spdif_status;
  207. if (sbits & IEC958_AES0_PROFESSIONAL) {
  208. sbits &= ~IEC958_AES0_PRO_FS;
  209. switch (rate) {
  210. case 44100: sbits |= IEC958_AES0_PRO_FS_44100; break;
  211. case 48000: sbits |= IEC958_AES0_PRO_FS_48000; break;
  212. case 32000: sbits |= IEC958_AES0_PRO_FS_32000; break;
  213. }
  214. } else {
  215. sbits &= ~(IEC958_AES3_CON_FS << 24);
  216. switch (rate) {
  217. case 44100: sbits |= IEC958_AES3_CON_FS_44100<<24; break;
  218. case 48000: sbits |= IEC958_AES3_CON_FS_48000<<24; break;
  219. case 32000: sbits |= IEC958_AES3_CON_FS_32000<<24; break;
  220. }
  221. }
  222. ac97->spdif_status = sbits;
  223. }
  224. snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, AC97_EA_SPDIF);
  225. mutex_unlock(&ac97->reg_mutex);
  226. return 0;
  227. }
  228. /**
  229. * snd_ac97_set_rate - change the rate of the given input/output.
  230. * @ac97: the ac97 instance
  231. * @reg: the register to change
  232. * @rate: the sample rate to set
  233. *
  234. * Changes the rate of the given input/output on the codec.
  235. * If the codec doesn't support VAR, the rate must be 48000 (except
  236. * for SPDIF).
  237. *
  238. * The valid registers are AC97_PMC_MIC_ADC_RATE,
  239. * AC97_PCM_FRONT_DAC_RATE, AC97_PCM_LR_ADC_RATE.
  240. * AC97_PCM_SURR_DAC_RATE and AC97_PCM_LFE_DAC_RATE are accepted
  241. * if the codec supports them.
  242. * AC97_SPDIF is accepted as a pseudo register to modify the SPDIF
  243. * status bits.
  244. *
  245. * Return: Zero if successful, or a negative error code on failure.
  246. */
  247. int snd_ac97_set_rate(struct snd_ac97 *ac97, int reg, unsigned int rate)
  248. {
  249. int dbl;
  250. unsigned int tmp;
  251. dbl = rate > 48000;
  252. if (dbl) {
  253. if (!(ac97->flags & AC97_DOUBLE_RATE))
  254. return -EINVAL;
  255. if (reg != AC97_PCM_FRONT_DAC_RATE)
  256. return -EINVAL;
  257. }
  258. snd_ac97_update_power(ac97, reg, 1);
  259. switch (reg) {
  260. case AC97_PCM_MIC_ADC_RATE:
  261. if ((ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_VRM) == 0) /* MIC VRA */
  262. if (rate != 48000)
  263. return -EINVAL;
  264. break;
  265. case AC97_PCM_FRONT_DAC_RATE:
  266. case AC97_PCM_LR_ADC_RATE:
  267. if ((ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_VRA) == 0) /* VRA */
  268. if (rate != 48000 && rate != 96000)
  269. return -EINVAL;
  270. break;
  271. case AC97_PCM_SURR_DAC_RATE:
  272. if (! (ac97->scaps & AC97_SCAP_SURROUND_DAC))
  273. return -EINVAL;
  274. break;
  275. case AC97_PCM_LFE_DAC_RATE:
  276. if (! (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC))
  277. return -EINVAL;
  278. break;
  279. case AC97_SPDIF:
  280. /* special case */
  281. return set_spdif_rate(ac97, rate);
  282. default:
  283. return -EINVAL;
  284. }
  285. if (dbl)
  286. rate /= 2;
  287. tmp = (rate * ac97->bus->clock) / 48000;
  288. if (tmp > 65535)
  289. return -EINVAL;
  290. if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE)
  291. snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS,
  292. AC97_EA_DRA, dbl ? AC97_EA_DRA : 0);
  293. snd_ac97_update(ac97, reg, tmp & 0xffff);
  294. snd_ac97_read(ac97, reg);
  295. if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE) {
  296. /* Intel controllers require double rate data to be put in
  297. * slots 7+8
  298. */
  299. snd_ac97_update_bits(ac97, AC97_GENERAL_PURPOSE,
  300. AC97_GP_DRSS_MASK,
  301. dbl ? AC97_GP_DRSS_78 : 0);
  302. snd_ac97_read(ac97, AC97_GENERAL_PURPOSE);
  303. }
  304. return 0;
  305. }
  306. EXPORT_SYMBOL(snd_ac97_set_rate);
  307. static unsigned short get_pslots(struct snd_ac97 *ac97, unsigned char *rate_table, unsigned short *spdif_slots)
  308. {
  309. if (!ac97_is_audio(ac97))
  310. return 0;
  311. if (ac97_is_rev22(ac97) || ac97_can_amap(ac97)) {
  312. unsigned short slots = 0;
  313. if (ac97_is_rev22(ac97)) {
  314. /* Note: it's simply emulation of AMAP behaviour */
  315. u16 es;
  316. es = ac97->regs[AC97_EXTENDED_ID] &= ~AC97_EI_DACS_SLOT_MASK;
  317. switch (ac97->addr) {
  318. case 1:
  319. case 2: es |= (1<<AC97_EI_DACS_SLOT_SHIFT); break;
  320. case 3: es |= (2<<AC97_EI_DACS_SLOT_SHIFT); break;
  321. }
  322. snd_ac97_write_cache(ac97, AC97_EXTENDED_ID, es);
  323. }
  324. switch (ac97->addr) {
  325. case 0:
  326. slots |= (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT);
  327. if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
  328. slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT);
  329. if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)
  330. slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
  331. if (ac97->ext_id & AC97_EI_SPDIF) {
  332. if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC))
  333. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT)|(1<<AC97_SLOT_SPDIF_RIGHT);
  334. else if (!(ac97->scaps & AC97_SCAP_CENTER_LFE_DAC))
  335. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1);
  336. else
  337. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
  338. }
  339. *rate_table = 0;
  340. break;
  341. case 1:
  342. case 2:
  343. slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT);
  344. if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
  345. slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
  346. if (ac97->ext_id & AC97_EI_SPDIF) {
  347. if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC))
  348. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1);
  349. else
  350. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
  351. }
  352. *rate_table = 1;
  353. break;
  354. case 3:
  355. slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
  356. if (ac97->ext_id & AC97_EI_SPDIF)
  357. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
  358. *rate_table = 2;
  359. break;
  360. }
  361. return slots;
  362. } else {
  363. unsigned short slots;
  364. slots = (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT);
  365. if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
  366. slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT);
  367. if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)
  368. slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
  369. if (ac97->ext_id & AC97_EI_SPDIF) {
  370. if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC))
  371. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT)|(1<<AC97_SLOT_SPDIF_RIGHT);
  372. else if (!(ac97->scaps & AC97_SCAP_CENTER_LFE_DAC))
  373. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1);
  374. else
  375. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
  376. }
  377. *rate_table = 0;
  378. return slots;
  379. }
  380. }
  381. static unsigned short get_cslots(struct snd_ac97 *ac97)
  382. {
  383. unsigned short slots;
  384. if (!ac97_is_audio(ac97))
  385. return 0;
  386. slots = (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT);
  387. slots |= (1<<AC97_SLOT_MIC);
  388. return slots;
  389. }
  390. static unsigned int get_rates(struct ac97_pcm *pcm, unsigned int cidx, unsigned short slots, int dbl)
  391. {
  392. int i, idx;
  393. unsigned int rates = ~0;
  394. unsigned char reg;
  395. for (i = 3; i < 12; i++) {
  396. if (!(slots & (1 << i)))
  397. continue;
  398. reg = get_slot_reg(pcm, cidx, i, dbl);
  399. switch (reg) {
  400. case AC97_PCM_FRONT_DAC_RATE: idx = AC97_RATES_FRONT_DAC; break;
  401. case AC97_PCM_SURR_DAC_RATE: idx = AC97_RATES_SURR_DAC; break;
  402. case AC97_PCM_LFE_DAC_RATE: idx = AC97_RATES_LFE_DAC; break;
  403. case AC97_PCM_LR_ADC_RATE: idx = AC97_RATES_ADC; break;
  404. case AC97_PCM_MIC_ADC_RATE: idx = AC97_RATES_MIC_ADC; break;
  405. default: idx = AC97_RATES_SPDIF; break;
  406. }
  407. rates &= pcm->r[dbl].codec[cidx]->rates[idx];
  408. }
  409. if (!dbl)
  410. rates &= ~(SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_88200 |
  411. SNDRV_PCM_RATE_96000);
  412. return rates;
  413. }
  414. /**
  415. * snd_ac97_pcm_assign - assign AC97 slots to given PCM streams
  416. * @bus: the ac97 bus instance
  417. * @pcms_count: count of PCMs to be assigned
  418. * @pcms: PCMs to be assigned
  419. *
  420. * It assigns available AC97 slots for given PCMs. If none or only
  421. * some slots are available, pcm->xxx.slots and pcm->xxx.rslots[] members
  422. * are reduced and might be zero.
  423. *
  424. * Return: Zero if successful, or a negative error code on failure.
  425. */
  426. int snd_ac97_pcm_assign(struct snd_ac97_bus *bus,
  427. unsigned short pcms_count,
  428. const struct ac97_pcm *pcms)
  429. {
  430. int i, j, k;
  431. const struct ac97_pcm *pcm;
  432. struct ac97_pcm *rpcms, *rpcm;
  433. unsigned short avail_slots[2][4];
  434. unsigned char rate_table[2][4];
  435. unsigned short tmp, slots;
  436. unsigned short spdif_slots[4];
  437. unsigned int rates;
  438. struct snd_ac97 *codec;
  439. rpcms = kcalloc(pcms_count, sizeof(struct ac97_pcm), GFP_KERNEL);
  440. if (rpcms == NULL)
  441. return -ENOMEM;
  442. memset(avail_slots, 0, sizeof(avail_slots));
  443. memset(rate_table, 0, sizeof(rate_table));
  444. memset(spdif_slots, 0, sizeof(spdif_slots));
  445. for (i = 0; i < 4; i++) {
  446. codec = bus->codec[i];
  447. if (!codec)
  448. continue;
  449. avail_slots[0][i] = get_pslots(codec, &rate_table[0][i], &spdif_slots[i]);
  450. avail_slots[1][i] = get_cslots(codec);
  451. if (!(codec->scaps & AC97_SCAP_INDEP_SDIN)) {
  452. for (j = 0; j < i; j++) {
  453. if (bus->codec[j])
  454. avail_slots[1][i] &= ~avail_slots[1][j];
  455. }
  456. }
  457. }
  458. /* first step - exclusive devices */
  459. for (i = 0; i < pcms_count; i++) {
  460. pcm = &pcms[i];
  461. rpcm = &rpcms[i];
  462. /* low-level driver thinks that it's more clever */
  463. if (pcm->copy_flag) {
  464. *rpcm = *pcm;
  465. continue;
  466. }
  467. rpcm->stream = pcm->stream;
  468. rpcm->exclusive = pcm->exclusive;
  469. rpcm->spdif = pcm->spdif;
  470. rpcm->private_value = pcm->private_value;
  471. rpcm->bus = bus;
  472. rpcm->rates = ~0;
  473. slots = pcm->r[0].slots;
  474. for (j = 0; j < 4 && slots; j++) {
  475. if (!bus->codec[j])
  476. continue;
  477. rates = ~0;
  478. if (pcm->spdif && pcm->stream == 0)
  479. tmp = spdif_slots[j];
  480. else
  481. tmp = avail_slots[pcm->stream][j];
  482. if (pcm->exclusive) {
  483. /* exclusive access */
  484. tmp &= slots;
  485. for (k = 0; k < i; k++) {
  486. if (rpcm->stream == rpcms[k].stream)
  487. tmp &= ~rpcms[k].r[0].rslots[j];
  488. }
  489. } else {
  490. /* non-exclusive access */
  491. tmp &= pcm->r[0].slots;
  492. }
  493. if (tmp) {
  494. rpcm->r[0].rslots[j] = tmp;
  495. rpcm->r[0].codec[j] = bus->codec[j];
  496. rpcm->r[0].rate_table[j] = rate_table[pcm->stream][j];
  497. if (bus->no_vra)
  498. rates = SNDRV_PCM_RATE_48000;
  499. else
  500. rates = get_rates(rpcm, j, tmp, 0);
  501. if (pcm->exclusive)
  502. avail_slots[pcm->stream][j] &= ~tmp;
  503. }
  504. slots &= ~tmp;
  505. rpcm->r[0].slots |= tmp;
  506. rpcm->rates &= rates;
  507. }
  508. /* for double rate, we check the first codec only */
  509. if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK &&
  510. bus->codec[0] && (bus->codec[0]->flags & AC97_DOUBLE_RATE) &&
  511. rate_table[pcm->stream][0] == 0) {
  512. tmp = (1<<AC97_SLOT_PCM_LEFT) | (1<<AC97_SLOT_PCM_RIGHT) |
  513. (1<<AC97_SLOT_PCM_LEFT_0) | (1<<AC97_SLOT_PCM_RIGHT_0);
  514. if ((tmp & pcm->r[1].slots) == tmp) {
  515. rpcm->r[1].slots = tmp;
  516. rpcm->r[1].rslots[0] = tmp;
  517. rpcm->r[1].rate_table[0] = 0;
  518. rpcm->r[1].codec[0] = bus->codec[0];
  519. if (pcm->exclusive)
  520. avail_slots[pcm->stream][0] &= ~tmp;
  521. if (bus->no_vra)
  522. rates = SNDRV_PCM_RATE_96000;
  523. else
  524. rates = get_rates(rpcm, 0, tmp, 1);
  525. rpcm->rates |= rates;
  526. }
  527. }
  528. if (rpcm->rates == ~0)
  529. rpcm->rates = 0; /* not used */
  530. }
  531. bus->pcms_count = pcms_count;
  532. bus->pcms = rpcms;
  533. return 0;
  534. }
  535. EXPORT_SYMBOL(snd_ac97_pcm_assign);
  536. /**
  537. * snd_ac97_pcm_open - opens the given AC97 pcm
  538. * @pcm: the ac97 pcm instance
  539. * @rate: rate in Hz, if codec does not support VRA, this value must be 48000Hz
  540. * @cfg: output stream characteristics
  541. * @slots: a subset of allocated slots (snd_ac97_pcm_assign) for this pcm
  542. *
  543. * It locks the specified slots and sets the given rate to AC97 registers.
  544. *
  545. * Return: Zero if successful, or a negative error code on failure.
  546. */
  547. int snd_ac97_pcm_open(struct ac97_pcm *pcm, unsigned int rate,
  548. enum ac97_pcm_cfg cfg, unsigned short slots)
  549. {
  550. struct snd_ac97_bus *bus;
  551. int i, cidx, r, ok_flag;
  552. unsigned int reg_ok[4] = {0,0,0,0};
  553. unsigned char reg;
  554. int err = 0;
  555. r = rate > 48000;
  556. bus = pcm->bus;
  557. if (cfg == AC97_PCM_CFG_SPDIF) {
  558. for (cidx = 0; cidx < 4; cidx++)
  559. if (bus->codec[cidx] && (bus->codec[cidx]->ext_id & AC97_EI_SPDIF)) {
  560. err = set_spdif_rate(bus->codec[cidx], rate);
  561. if (err < 0)
  562. return err;
  563. }
  564. }
  565. spin_lock_irq(&pcm->bus->bus_lock);
  566. for (i = 3; i < 12; i++) {
  567. if (!(slots & (1 << i)))
  568. continue;
  569. ok_flag = 0;
  570. for (cidx = 0; cidx < 4; cidx++) {
  571. if (bus->used_slots[pcm->stream][cidx] & (1 << i)) {
  572. spin_unlock_irq(&pcm->bus->bus_lock);
  573. err = -EBUSY;
  574. goto error;
  575. }
  576. if (pcm->r[r].rslots[cidx] & (1 << i)) {
  577. bus->used_slots[pcm->stream][cidx] |= (1 << i);
  578. ok_flag++;
  579. }
  580. }
  581. if (!ok_flag) {
  582. spin_unlock_irq(&pcm->bus->bus_lock);
  583. dev_err(bus->card->dev,
  584. "cannot find configuration for AC97 slot %i\n",
  585. i);
  586. err = -EAGAIN;
  587. goto error;
  588. }
  589. }
  590. pcm->cur_dbl = r;
  591. spin_unlock_irq(&pcm->bus->bus_lock);
  592. for (i = 3; i < 12; i++) {
  593. if (!(slots & (1 << i)))
  594. continue;
  595. for (cidx = 0; cidx < 4; cidx++) {
  596. if (pcm->r[r].rslots[cidx] & (1 << i)) {
  597. reg = get_slot_reg(pcm, cidx, i, r);
  598. if (reg == 0xff) {
  599. dev_err(bus->card->dev,
  600. "invalid AC97 slot %i?\n", i);
  601. continue;
  602. }
  603. if (reg_ok[cidx] & (1 << (reg - AC97_PCM_FRONT_DAC_RATE)))
  604. continue;
  605. dev_dbg(bus->card->dev,
  606. "setting ac97 reg 0x%x to rate %d\n",
  607. reg, rate);
  608. err = snd_ac97_set_rate(pcm->r[r].codec[cidx], reg, rate);
  609. if (err < 0)
  610. dev_err(bus->card->dev,
  611. "error in snd_ac97_set_rate: cidx=%d, reg=0x%x, rate=%d, err=%d\n",
  612. cidx, reg, rate, err);
  613. else
  614. reg_ok[cidx] |= (1 << (reg - AC97_PCM_FRONT_DAC_RATE));
  615. }
  616. }
  617. }
  618. pcm->aslots = slots;
  619. return 0;
  620. error:
  621. pcm->aslots = slots;
  622. snd_ac97_pcm_close(pcm);
  623. return err;
  624. }
  625. EXPORT_SYMBOL(snd_ac97_pcm_open);
  626. /**
  627. * snd_ac97_pcm_close - closes the given AC97 pcm
  628. * @pcm: the ac97 pcm instance
  629. *
  630. * It frees the locked AC97 slots.
  631. *
  632. * Return: Zero.
  633. */
  634. int snd_ac97_pcm_close(struct ac97_pcm *pcm)
  635. {
  636. struct snd_ac97_bus *bus;
  637. unsigned short slots = pcm->aslots;
  638. int i, cidx;
  639. #ifdef CONFIG_SND_AC97_POWER_SAVE
  640. int r = pcm->cur_dbl;
  641. for (i = 3; i < 12; i++) {
  642. if (!(slots & (1 << i)))
  643. continue;
  644. for (cidx = 0; cidx < 4; cidx++) {
  645. if (pcm->r[r].rslots[cidx] & (1 << i)) {
  646. int reg = get_slot_reg(pcm, cidx, i, r);
  647. snd_ac97_update_power(pcm->r[r].codec[cidx],
  648. reg, 0);
  649. }
  650. }
  651. }
  652. #endif
  653. bus = pcm->bus;
  654. spin_lock_irq(&pcm->bus->bus_lock);
  655. for (i = 3; i < 12; i++) {
  656. if (!(slots & (1 << i)))
  657. continue;
  658. for (cidx = 0; cidx < 4; cidx++)
  659. bus->used_slots[pcm->stream][cidx] &= ~(1 << i);
  660. }
  661. pcm->aslots = 0;
  662. pcm->cur_dbl = 0;
  663. spin_unlock_irq(&pcm->bus->bus_lock);
  664. return 0;
  665. }
  666. EXPORT_SYMBOL(snd_ac97_pcm_close);
  667. static int double_rate_hw_constraint_rate(struct snd_pcm_hw_params *params,
  668. struct snd_pcm_hw_rule *rule)
  669. {
  670. struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
  671. if (channels->min > 2) {
  672. static const struct snd_interval single_rates = {
  673. .min = 1,
  674. .max = 48000,
  675. };
  676. struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
  677. return snd_interval_refine(rate, &single_rates);
  678. }
  679. return 0;
  680. }
  681. static int double_rate_hw_constraint_channels(struct snd_pcm_hw_params *params,
  682. struct snd_pcm_hw_rule *rule)
  683. {
  684. struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
  685. if (rate->min > 48000) {
  686. static const struct snd_interval double_rate_channels = {
  687. .min = 2,
  688. .max = 2,
  689. };
  690. struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
  691. return snd_interval_refine(channels, &double_rate_channels);
  692. }
  693. return 0;
  694. }
  695. /**
  696. * snd_ac97_pcm_double_rate_rules - set double rate constraints
  697. * @runtime: the runtime of the ac97 front playback pcm
  698. *
  699. * Installs the hardware constraint rules to prevent using double rates and
  700. * more than two channels at the same time.
  701. *
  702. * Return: Zero if successful, or a negative error code on failure.
  703. */
  704. int snd_ac97_pcm_double_rate_rules(struct snd_pcm_runtime *runtime)
  705. {
  706. int err;
  707. err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  708. double_rate_hw_constraint_rate, NULL,
  709. SNDRV_PCM_HW_PARAM_CHANNELS, -1);
  710. if (err < 0)
  711. return err;
  712. err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
  713. double_rate_hw_constraint_channels, NULL,
  714. SNDRV_PCM_HW_PARAM_RATE, -1);
  715. return err;
  716. }
  717. EXPORT_SYMBOL(snd_ac97_pcm_double_rate_rules);