ethernet-rx.c 14 KB

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  1. /*
  2. * This file is based on code from OCTEON SDK by Cavium Networks.
  3. *
  4. * Copyright (c) 2003-2010 Cavium Networks
  5. *
  6. * This file is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License, Version 2, as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/kernel.h>
  12. #include <linux/cache.h>
  13. #include <linux/cpumask.h>
  14. #include <linux/netdevice.h>
  15. #include <linux/etherdevice.h>
  16. #include <linux/ip.h>
  17. #include <linux/string.h>
  18. #include <linux/prefetch.h>
  19. #include <linux/ratelimit.h>
  20. #include <linux/smp.h>
  21. #include <linux/interrupt.h>
  22. #include <net/dst.h>
  23. #ifdef CONFIG_XFRM
  24. #include <linux/xfrm.h>
  25. #include <net/xfrm.h>
  26. #endif /* CONFIG_XFRM */
  27. #include <asm/octeon/octeon.h>
  28. #include "ethernet-defines.h"
  29. #include "ethernet-mem.h"
  30. #include "ethernet-rx.h"
  31. #include "octeon-ethernet.h"
  32. #include "ethernet-util.h"
  33. #include <asm/octeon/cvmx-helper.h>
  34. #include <asm/octeon/cvmx-wqe.h>
  35. #include <asm/octeon/cvmx-fau.h>
  36. #include <asm/octeon/cvmx-pow.h>
  37. #include <asm/octeon/cvmx-pip.h>
  38. #include <asm/octeon/cvmx-scratch.h>
  39. #include <asm/octeon/cvmx-gmxx-defs.h>
  40. static atomic_t oct_rx_ready = ATOMIC_INIT(0);
  41. static struct oct_rx_group {
  42. int irq;
  43. int group;
  44. struct napi_struct napi;
  45. } oct_rx_group[16];
  46. /**
  47. * cvm_oct_do_interrupt - interrupt handler.
  48. * @irq: Interrupt number.
  49. * @napi_id: Cookie to identify the NAPI instance.
  50. *
  51. * The interrupt occurs whenever the POW has packets in our group.
  52. *
  53. */
  54. static irqreturn_t cvm_oct_do_interrupt(int irq, void *napi_id)
  55. {
  56. /* Disable the IRQ and start napi_poll. */
  57. disable_irq_nosync(irq);
  58. napi_schedule(napi_id);
  59. return IRQ_HANDLED;
  60. }
  61. /**
  62. * cvm_oct_check_rcv_error - process receive errors
  63. * @work: Work queue entry pointing to the packet.
  64. *
  65. * Returns Non-zero if the packet can be dropped, zero otherwise.
  66. */
  67. static inline int cvm_oct_check_rcv_error(cvmx_wqe_t *work)
  68. {
  69. int port;
  70. if (octeon_has_feature(OCTEON_FEATURE_PKND))
  71. port = work->word0.pip.cn68xx.pknd;
  72. else
  73. port = work->word1.cn38xx.ipprt;
  74. if ((work->word2.snoip.err_code == 10) && (work->word1.len <= 64)) {
  75. /*
  76. * Ignore length errors on min size packets. Some
  77. * equipment incorrectly pads packets to 64+4FCS
  78. * instead of 60+4FCS. Note these packets still get
  79. * counted as frame errors.
  80. */
  81. } else if (work->word2.snoip.err_code == 5 ||
  82. work->word2.snoip.err_code == 7) {
  83. /*
  84. * We received a packet with either an alignment error
  85. * or a FCS error. This may be signalling that we are
  86. * running 10Mbps with GMXX_RXX_FRM_CTL[PRE_CHK]
  87. * off. If this is the case we need to parse the
  88. * packet to determine if we can remove a non spec
  89. * preamble and generate a correct packet.
  90. */
  91. int interface = cvmx_helper_get_interface_num(port);
  92. int index = cvmx_helper_get_interface_index_num(port);
  93. union cvmx_gmxx_rxx_frm_ctl gmxx_rxx_frm_ctl;
  94. gmxx_rxx_frm_ctl.u64 =
  95. cvmx_read_csr(CVMX_GMXX_RXX_FRM_CTL(index, interface));
  96. if (gmxx_rxx_frm_ctl.s.pre_chk == 0) {
  97. u8 *ptr =
  98. cvmx_phys_to_ptr(work->packet_ptr.s.addr);
  99. int i = 0;
  100. while (i < work->word1.len - 1) {
  101. if (*ptr != 0x55)
  102. break;
  103. ptr++;
  104. i++;
  105. }
  106. if (*ptr == 0xd5) {
  107. /* Port received 0xd5 preamble */
  108. work->packet_ptr.s.addr += i + 1;
  109. work->word1.len -= i + 5;
  110. } else if ((*ptr & 0xf) == 0xd) {
  111. /* Port received 0xd preamble */
  112. work->packet_ptr.s.addr += i;
  113. work->word1.len -= i + 4;
  114. for (i = 0; i < work->word1.len; i++) {
  115. *ptr =
  116. ((*ptr & 0xf0) >> 4) |
  117. ((*(ptr + 1) & 0xf) << 4);
  118. ptr++;
  119. }
  120. } else {
  121. printk_ratelimited("Port %d unknown preamble, packet dropped\n",
  122. port);
  123. cvm_oct_free_work(work);
  124. return 1;
  125. }
  126. }
  127. } else {
  128. printk_ratelimited("Port %d receive error code %d, packet dropped\n",
  129. port, work->word2.snoip.err_code);
  130. cvm_oct_free_work(work);
  131. return 1;
  132. }
  133. return 0;
  134. }
  135. static int cvm_oct_poll(struct oct_rx_group *rx_group, int budget)
  136. {
  137. const int coreid = cvmx_get_core_num();
  138. u64 old_group_mask;
  139. u64 old_scratch;
  140. int rx_count = 0;
  141. int did_work_request = 0;
  142. int packet_not_copied;
  143. /* Prefetch cvm_oct_device since we know we need it soon */
  144. prefetch(cvm_oct_device);
  145. if (USE_ASYNC_IOBDMA) {
  146. /* Save scratch in case userspace is using it */
  147. CVMX_SYNCIOBDMA;
  148. old_scratch = cvmx_scratch_read64(CVMX_SCR_SCRATCH);
  149. }
  150. /* Only allow work for our group (and preserve priorities) */
  151. if (OCTEON_IS_MODEL(OCTEON_CN68XX)) {
  152. old_group_mask = cvmx_read_csr(CVMX_SSO_PPX_GRP_MSK(coreid));
  153. cvmx_write_csr(CVMX_SSO_PPX_GRP_MSK(coreid),
  154. BIT(rx_group->group));
  155. cvmx_read_csr(CVMX_SSO_PPX_GRP_MSK(coreid)); /* Flush */
  156. } else {
  157. old_group_mask = cvmx_read_csr(CVMX_POW_PP_GRP_MSKX(coreid));
  158. cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid),
  159. (old_group_mask & ~0xFFFFull) |
  160. BIT(rx_group->group));
  161. }
  162. if (USE_ASYNC_IOBDMA) {
  163. cvmx_pow_work_request_async(CVMX_SCR_SCRATCH, CVMX_POW_NO_WAIT);
  164. did_work_request = 1;
  165. }
  166. while (rx_count < budget) {
  167. struct sk_buff *skb = NULL;
  168. struct sk_buff **pskb = NULL;
  169. int skb_in_hw;
  170. cvmx_wqe_t *work;
  171. int port;
  172. if (USE_ASYNC_IOBDMA && did_work_request)
  173. work = cvmx_pow_work_response_async(CVMX_SCR_SCRATCH);
  174. else
  175. work = cvmx_pow_work_request_sync(CVMX_POW_NO_WAIT);
  176. prefetch(work);
  177. did_work_request = 0;
  178. if (!work) {
  179. if (OCTEON_IS_MODEL(OCTEON_CN68XX)) {
  180. cvmx_write_csr(CVMX_SSO_WQ_IQ_DIS,
  181. BIT(rx_group->group));
  182. cvmx_write_csr(CVMX_SSO_WQ_INT,
  183. BIT(rx_group->group));
  184. } else {
  185. union cvmx_pow_wq_int wq_int;
  186. wq_int.u64 = 0;
  187. wq_int.s.iq_dis = BIT(rx_group->group);
  188. wq_int.s.wq_int = BIT(rx_group->group);
  189. cvmx_write_csr(CVMX_POW_WQ_INT, wq_int.u64);
  190. }
  191. break;
  192. }
  193. pskb = (struct sk_buff **)
  194. (cvm_oct_get_buffer_ptr(work->packet_ptr) -
  195. sizeof(void *));
  196. prefetch(pskb);
  197. if (USE_ASYNC_IOBDMA && rx_count < (budget - 1)) {
  198. cvmx_pow_work_request_async_nocheck(CVMX_SCR_SCRATCH,
  199. CVMX_POW_NO_WAIT);
  200. did_work_request = 1;
  201. }
  202. rx_count++;
  203. skb_in_hw = work->word2.s.bufs == 1;
  204. if (likely(skb_in_hw)) {
  205. skb = *pskb;
  206. prefetch(&skb->head);
  207. prefetch(&skb->len);
  208. }
  209. if (octeon_has_feature(OCTEON_FEATURE_PKND))
  210. port = work->word0.pip.cn68xx.pknd;
  211. else
  212. port = work->word1.cn38xx.ipprt;
  213. prefetch(cvm_oct_device[port]);
  214. /* Immediately throw away all packets with receive errors */
  215. if (unlikely(work->word2.snoip.rcv_error)) {
  216. if (cvm_oct_check_rcv_error(work))
  217. continue;
  218. }
  219. /*
  220. * We can only use the zero copy path if skbuffs are
  221. * in the FPA pool and the packet fits in a single
  222. * buffer.
  223. */
  224. if (likely(skb_in_hw)) {
  225. skb->data = skb->head + work->packet_ptr.s.addr -
  226. cvmx_ptr_to_phys(skb->head);
  227. prefetch(skb->data);
  228. skb->len = work->word1.len;
  229. skb_set_tail_pointer(skb, skb->len);
  230. packet_not_copied = 1;
  231. } else {
  232. /*
  233. * We have to copy the packet. First allocate
  234. * an skbuff for it.
  235. */
  236. skb = dev_alloc_skb(work->word1.len);
  237. if (!skb) {
  238. cvm_oct_free_work(work);
  239. continue;
  240. }
  241. /*
  242. * Check if we've received a packet that was
  243. * entirely stored in the work entry.
  244. */
  245. if (unlikely(work->word2.s.bufs == 0)) {
  246. u8 *ptr = work->packet_data;
  247. if (likely(!work->word2.s.not_IP)) {
  248. /*
  249. * The beginning of the packet
  250. * moves for IP packets.
  251. */
  252. if (work->word2.s.is_v6)
  253. ptr += 2;
  254. else
  255. ptr += 6;
  256. }
  257. memcpy(skb_put(skb, work->word1.len), ptr,
  258. work->word1.len);
  259. /* No packet buffers to free */
  260. } else {
  261. int segments = work->word2.s.bufs;
  262. union cvmx_buf_ptr segment_ptr =
  263. work->packet_ptr;
  264. int len = work->word1.len;
  265. while (segments--) {
  266. union cvmx_buf_ptr next_ptr =
  267. *(union cvmx_buf_ptr *)
  268. cvmx_phys_to_ptr(
  269. segment_ptr.s.addr - 8);
  270. /*
  271. * Octeon Errata PKI-100: The segment size is
  272. * wrong. Until it is fixed, calculate the
  273. * segment size based on the packet pool
  274. * buffer size. When it is fixed, the
  275. * following line should be replaced with this
  276. * one: int segment_size =
  277. * segment_ptr.s.size;
  278. */
  279. int segment_size =
  280. CVMX_FPA_PACKET_POOL_SIZE -
  281. (segment_ptr.s.addr -
  282. (((segment_ptr.s.addr >> 7) -
  283. segment_ptr.s.back) << 7));
  284. /*
  285. * Don't copy more than what
  286. * is left in the packet.
  287. */
  288. if (segment_size > len)
  289. segment_size = len;
  290. /* Copy the data into the packet */
  291. memcpy(skb_put(skb, segment_size),
  292. cvmx_phys_to_ptr(
  293. segment_ptr.s.addr),
  294. segment_size);
  295. len -= segment_size;
  296. segment_ptr = next_ptr;
  297. }
  298. }
  299. packet_not_copied = 0;
  300. }
  301. if (likely((port < TOTAL_NUMBER_OF_PORTS) &&
  302. cvm_oct_device[port])) {
  303. struct net_device *dev = cvm_oct_device[port];
  304. struct octeon_ethernet *priv = netdev_priv(dev);
  305. /*
  306. * Only accept packets for devices that are
  307. * currently up.
  308. */
  309. if (likely(dev->flags & IFF_UP)) {
  310. skb->protocol = eth_type_trans(skb, dev);
  311. skb->dev = dev;
  312. if (unlikely(work->word2.s.not_IP ||
  313. work->word2.s.IP_exc ||
  314. work->word2.s.L4_error ||
  315. !work->word2.s.tcp_or_udp))
  316. skb->ip_summed = CHECKSUM_NONE;
  317. else
  318. skb->ip_summed = CHECKSUM_UNNECESSARY;
  319. /* Increment RX stats for virtual ports */
  320. if (port >= CVMX_PIP_NUM_INPUT_PORTS) {
  321. priv->stats.rx_packets++;
  322. priv->stats.rx_bytes += skb->len;
  323. }
  324. netif_receive_skb(skb);
  325. } else {
  326. /*
  327. * Drop any packet received for a device that
  328. * isn't up.
  329. */
  330. priv->stats.rx_dropped++;
  331. dev_kfree_skb_irq(skb);
  332. }
  333. } else {
  334. /*
  335. * Drop any packet received for a device that
  336. * doesn't exist.
  337. */
  338. printk_ratelimited("Port %d not controlled by Linux, packet dropped\n",
  339. port);
  340. dev_kfree_skb_irq(skb);
  341. }
  342. /*
  343. * Check to see if the skbuff and work share the same
  344. * packet buffer.
  345. */
  346. if (likely(packet_not_copied)) {
  347. /*
  348. * This buffer needs to be replaced, increment
  349. * the number of buffers we need to free by
  350. * one.
  351. */
  352. cvmx_fau_atomic_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE,
  353. 1);
  354. cvmx_fpa_free(work, CVMX_FPA_WQE_POOL, 1);
  355. } else {
  356. cvm_oct_free_work(work);
  357. }
  358. }
  359. /* Restore the original POW group mask */
  360. if (OCTEON_IS_MODEL(OCTEON_CN68XX)) {
  361. cvmx_write_csr(CVMX_SSO_PPX_GRP_MSK(coreid), old_group_mask);
  362. cvmx_read_csr(CVMX_SSO_PPX_GRP_MSK(coreid)); /* Flush */
  363. } else {
  364. cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid), old_group_mask);
  365. }
  366. if (USE_ASYNC_IOBDMA) {
  367. /* Restore the scratch area */
  368. cvmx_scratch_write64(CVMX_SCR_SCRATCH, old_scratch);
  369. }
  370. cvm_oct_rx_refill_pool(0);
  371. return rx_count;
  372. }
  373. /**
  374. * cvm_oct_napi_poll - the NAPI poll function.
  375. * @napi: The NAPI instance.
  376. * @budget: Maximum number of packets to receive.
  377. *
  378. * Returns the number of packets processed.
  379. */
  380. static int cvm_oct_napi_poll(struct napi_struct *napi, int budget)
  381. {
  382. struct oct_rx_group *rx_group = container_of(napi, struct oct_rx_group,
  383. napi);
  384. int rx_count;
  385. rx_count = cvm_oct_poll(rx_group, budget);
  386. if (rx_count < budget) {
  387. /* No more work */
  388. napi_complete(napi);
  389. enable_irq(rx_group->irq);
  390. }
  391. return rx_count;
  392. }
  393. #ifdef CONFIG_NET_POLL_CONTROLLER
  394. /**
  395. * cvm_oct_poll_controller - poll for receive packets
  396. * device.
  397. *
  398. * @dev: Device to poll. Unused
  399. */
  400. void cvm_oct_poll_controller(struct net_device *dev)
  401. {
  402. int i;
  403. if (!atomic_read(&oct_rx_ready))
  404. return;
  405. for (i = 0; i < ARRAY_SIZE(oct_rx_group); i++) {
  406. if (!(pow_receive_groups & BIT(i)))
  407. continue;
  408. cvm_oct_poll(&oct_rx_group[i], 16);
  409. }
  410. }
  411. #endif
  412. void cvm_oct_rx_initialize(void)
  413. {
  414. int i;
  415. struct net_device *dev_for_napi = NULL;
  416. for (i = 0; i < TOTAL_NUMBER_OF_PORTS; i++) {
  417. if (cvm_oct_device[i]) {
  418. dev_for_napi = cvm_oct_device[i];
  419. break;
  420. }
  421. }
  422. if (!dev_for_napi)
  423. panic("No net_devices were allocated.");
  424. for (i = 0; i < ARRAY_SIZE(oct_rx_group); i++) {
  425. int ret;
  426. if (!(pow_receive_groups & BIT(i)))
  427. continue;
  428. netif_napi_add(dev_for_napi, &oct_rx_group[i].napi,
  429. cvm_oct_napi_poll, rx_napi_weight);
  430. napi_enable(&oct_rx_group[i].napi);
  431. oct_rx_group[i].irq = OCTEON_IRQ_WORKQ0 + i;
  432. oct_rx_group[i].group = i;
  433. /* Register an IRQ handler to receive POW interrupts */
  434. ret = request_irq(oct_rx_group[i].irq, cvm_oct_do_interrupt, 0,
  435. "Ethernet", &oct_rx_group[i].napi);
  436. if (ret)
  437. panic("Could not acquire Ethernet IRQ %d\n",
  438. oct_rx_group[i].irq);
  439. disable_irq_nosync(oct_rx_group[i].irq);
  440. /* Enable POW interrupt when our port has at least one packet */
  441. if (OCTEON_IS_MODEL(OCTEON_CN68XX)) {
  442. union cvmx_sso_wq_int_thrx int_thr;
  443. union cvmx_pow_wq_int_pc int_pc;
  444. int_thr.u64 = 0;
  445. int_thr.s.tc_en = 1;
  446. int_thr.s.tc_thr = 1;
  447. cvmx_write_csr(CVMX_SSO_WQ_INT_THRX(i), int_thr.u64);
  448. int_pc.u64 = 0;
  449. int_pc.s.pc_thr = 5;
  450. cvmx_write_csr(CVMX_SSO_WQ_INT_PC, int_pc.u64);
  451. } else {
  452. union cvmx_pow_wq_int_thrx int_thr;
  453. union cvmx_pow_wq_int_pc int_pc;
  454. int_thr.u64 = 0;
  455. int_thr.s.tc_en = 1;
  456. int_thr.s.tc_thr = 1;
  457. cvmx_write_csr(CVMX_POW_WQ_INT_THRX(i), int_thr.u64);
  458. int_pc.u64 = 0;
  459. int_pc.s.pc_thr = 5;
  460. cvmx_write_csr(CVMX_POW_WQ_INT_PC, int_pc.u64);
  461. }
  462. /* Schedule NAPI now. This will indirectly enable the
  463. * interrupt.
  464. */
  465. napi_schedule(&oct_rx_group[i].napi);
  466. }
  467. atomic_inc(&oct_rx_ready);
  468. }
  469. void cvm_oct_rx_shutdown(void)
  470. {
  471. int i;
  472. for (i = 0; i < ARRAY_SIZE(oct_rx_group); i++) {
  473. if (!(pow_receive_groups & BIT(i)))
  474. continue;
  475. /* Disable POW interrupt */
  476. if (OCTEON_IS_MODEL(OCTEON_CN68XX))
  477. cvmx_write_csr(CVMX_SSO_WQ_INT_THRX(i), 0);
  478. else
  479. cvmx_write_csr(CVMX_POW_WQ_INT_THRX(i), 0);
  480. /* Free the interrupt handler */
  481. free_irq(oct_rx_group[i].irq, cvm_oct_device);
  482. netif_napi_del(&oct_rx_group[i].napi);
  483. }
  484. }