fuse-tegra30.c 4.3 KB

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  1. /*
  2. * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  15. *
  16. */
  17. #include <linux/device.h>
  18. #include <linux/clk.h>
  19. #include <linux/err.h>
  20. #include <linux/io.h>
  21. #include <linux/kernel.h>
  22. #include <linux/of_device.h>
  23. #include <linux/of_address.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/random.h>
  26. #include <soc/tegra/fuse.h>
  27. #include "fuse.h"
  28. #define FUSE_BEGIN 0x100
  29. /* Tegra30 and later */
  30. #define FUSE_VENDOR_CODE 0x100
  31. #define FUSE_FAB_CODE 0x104
  32. #define FUSE_LOT_CODE_0 0x108
  33. #define FUSE_LOT_CODE_1 0x10c
  34. #define FUSE_WAFER_ID 0x110
  35. #define FUSE_X_COORDINATE 0x114
  36. #define FUSE_Y_COORDINATE 0x118
  37. #define FUSE_HAS_REVISION_INFO BIT(0)
  38. #if defined(CONFIG_ARCH_TEGRA_3x_SOC) || \
  39. defined(CONFIG_ARCH_TEGRA_114_SOC) || \
  40. defined(CONFIG_ARCH_TEGRA_124_SOC) || \
  41. defined(CONFIG_ARCH_TEGRA_132_SOC) || \
  42. defined(CONFIG_ARCH_TEGRA_210_SOC)
  43. static u32 tegra30_fuse_read_early(struct tegra_fuse *fuse, unsigned int offset)
  44. {
  45. return readl_relaxed(fuse->base + FUSE_BEGIN + offset);
  46. }
  47. static u32 tegra30_fuse_read(struct tegra_fuse *fuse, unsigned int offset)
  48. {
  49. u32 value;
  50. int err;
  51. err = clk_prepare_enable(fuse->clk);
  52. if (err < 0) {
  53. dev_err(fuse->dev, "failed to enable FUSE clock: %d\n", err);
  54. return 0;
  55. }
  56. value = readl_relaxed(fuse->base + FUSE_BEGIN + offset);
  57. clk_disable_unprepare(fuse->clk);
  58. return value;
  59. }
  60. static void __init tegra30_fuse_add_randomness(void)
  61. {
  62. u32 randomness[12];
  63. randomness[0] = tegra_sku_info.sku_id;
  64. randomness[1] = tegra_read_straps();
  65. randomness[2] = tegra_read_chipid();
  66. randomness[3] = tegra_sku_info.cpu_process_id << 16;
  67. randomness[3] |= tegra_sku_info.soc_process_id;
  68. randomness[4] = tegra_sku_info.cpu_speedo_id << 16;
  69. randomness[4] |= tegra_sku_info.soc_speedo_id;
  70. randomness[5] = tegra_fuse_read_early(FUSE_VENDOR_CODE);
  71. randomness[6] = tegra_fuse_read_early(FUSE_FAB_CODE);
  72. randomness[7] = tegra_fuse_read_early(FUSE_LOT_CODE_0);
  73. randomness[8] = tegra_fuse_read_early(FUSE_LOT_CODE_1);
  74. randomness[9] = tegra_fuse_read_early(FUSE_WAFER_ID);
  75. randomness[10] = tegra_fuse_read_early(FUSE_X_COORDINATE);
  76. randomness[11] = tegra_fuse_read_early(FUSE_Y_COORDINATE);
  77. add_device_randomness(randomness, sizeof(randomness));
  78. }
  79. static void __init tegra30_fuse_init(struct tegra_fuse *fuse)
  80. {
  81. fuse->read_early = tegra30_fuse_read_early;
  82. fuse->read = tegra30_fuse_read;
  83. tegra_init_revision();
  84. fuse->soc->speedo_init(&tegra_sku_info);
  85. tegra30_fuse_add_randomness();
  86. }
  87. #endif
  88. #ifdef CONFIG_ARCH_TEGRA_3x_SOC
  89. static const struct tegra_fuse_info tegra30_fuse_info = {
  90. .read = tegra30_fuse_read,
  91. .size = 0x2a4,
  92. .spare = 0x144,
  93. };
  94. const struct tegra_fuse_soc tegra30_fuse_soc = {
  95. .init = tegra30_fuse_init,
  96. .speedo_init = tegra30_init_speedo_data,
  97. .info = &tegra30_fuse_info,
  98. };
  99. #endif
  100. #ifdef CONFIG_ARCH_TEGRA_114_SOC
  101. static const struct tegra_fuse_info tegra114_fuse_info = {
  102. .read = tegra30_fuse_read,
  103. .size = 0x2a0,
  104. .spare = 0x180,
  105. };
  106. const struct tegra_fuse_soc tegra114_fuse_soc = {
  107. .init = tegra30_fuse_init,
  108. .speedo_init = tegra114_init_speedo_data,
  109. .info = &tegra114_fuse_info,
  110. };
  111. #endif
  112. #if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
  113. static const struct tegra_fuse_info tegra124_fuse_info = {
  114. .read = tegra30_fuse_read,
  115. .size = 0x300,
  116. .spare = 0x200,
  117. };
  118. const struct tegra_fuse_soc tegra124_fuse_soc = {
  119. .init = tegra30_fuse_init,
  120. .speedo_init = tegra124_init_speedo_data,
  121. .info = &tegra124_fuse_info,
  122. };
  123. #endif
  124. #if defined(CONFIG_ARCH_TEGRA_210_SOC)
  125. static const struct tegra_fuse_info tegra210_fuse_info = {
  126. .read = tegra30_fuse_read,
  127. .size = 0x300,
  128. .spare = 0x280,
  129. };
  130. const struct tegra_fuse_soc tegra210_fuse_soc = {
  131. .init = tegra30_fuse_init,
  132. .speedo_init = tegra210_init_speedo_data,
  133. .info = &tegra210_fuse_info,
  134. };
  135. #endif