wm831x-dcdc.c 23 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914
  1. /*
  2. * wm831x-dcdc.c -- DC-DC buck convertor driver for the WM831x series
  3. *
  4. * Copyright 2009 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/bitops.h>
  17. #include <linux/err.h>
  18. #include <linux/i2c.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/gpio.h>
  23. #include <linux/slab.h>
  24. #include <linux/mfd/wm831x/core.h>
  25. #include <linux/mfd/wm831x/regulator.h>
  26. #include <linux/mfd/wm831x/pdata.h>
  27. #define WM831X_BUCKV_MAX_SELECTOR 0x68
  28. #define WM831X_BUCKP_MAX_SELECTOR 0x66
  29. #define WM831X_DCDC_MODE_FAST 0
  30. #define WM831X_DCDC_MODE_NORMAL 1
  31. #define WM831X_DCDC_MODE_IDLE 2
  32. #define WM831X_DCDC_MODE_STANDBY 3
  33. #define WM831X_DCDC_MAX_NAME 9
  34. /* Register offsets in control block */
  35. #define WM831X_DCDC_CONTROL_1 0
  36. #define WM831X_DCDC_CONTROL_2 1
  37. #define WM831X_DCDC_ON_CONFIG 2
  38. #define WM831X_DCDC_SLEEP_CONTROL 3
  39. #define WM831X_DCDC_DVS_CONTROL 4
  40. /*
  41. * Shared
  42. */
  43. struct wm831x_dcdc {
  44. char name[WM831X_DCDC_MAX_NAME];
  45. char supply_name[WM831X_DCDC_MAX_NAME];
  46. struct regulator_desc desc;
  47. int base;
  48. struct wm831x *wm831x;
  49. struct regulator_dev *regulator;
  50. int dvs_gpio;
  51. int dvs_gpio_state;
  52. int on_vsel;
  53. int dvs_vsel;
  54. };
  55. static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev)
  56. {
  57. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  58. struct wm831x *wm831x = dcdc->wm831x;
  59. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  60. int val;
  61. val = wm831x_reg_read(wm831x, reg);
  62. if (val < 0)
  63. return val;
  64. val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT;
  65. switch (val) {
  66. case WM831X_DCDC_MODE_FAST:
  67. return REGULATOR_MODE_FAST;
  68. case WM831X_DCDC_MODE_NORMAL:
  69. return REGULATOR_MODE_NORMAL;
  70. case WM831X_DCDC_MODE_STANDBY:
  71. return REGULATOR_MODE_STANDBY;
  72. case WM831X_DCDC_MODE_IDLE:
  73. return REGULATOR_MODE_IDLE;
  74. default:
  75. BUG();
  76. return -EINVAL;
  77. }
  78. }
  79. static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg,
  80. unsigned int mode)
  81. {
  82. int val;
  83. switch (mode) {
  84. case REGULATOR_MODE_FAST:
  85. val = WM831X_DCDC_MODE_FAST;
  86. break;
  87. case REGULATOR_MODE_NORMAL:
  88. val = WM831X_DCDC_MODE_NORMAL;
  89. break;
  90. case REGULATOR_MODE_STANDBY:
  91. val = WM831X_DCDC_MODE_STANDBY;
  92. break;
  93. case REGULATOR_MODE_IDLE:
  94. val = WM831X_DCDC_MODE_IDLE;
  95. break;
  96. default:
  97. return -EINVAL;
  98. }
  99. return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK,
  100. val << WM831X_DC1_ON_MODE_SHIFT);
  101. }
  102. static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
  103. {
  104. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  105. struct wm831x *wm831x = dcdc->wm831x;
  106. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  107. return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
  108. }
  109. static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev,
  110. unsigned int mode)
  111. {
  112. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  113. struct wm831x *wm831x = dcdc->wm831x;
  114. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  115. return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
  116. }
  117. static int wm831x_dcdc_get_status(struct regulator_dev *rdev)
  118. {
  119. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  120. struct wm831x *wm831x = dcdc->wm831x;
  121. int ret;
  122. /* First, check for errors */
  123. ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
  124. if (ret < 0)
  125. return ret;
  126. if (ret & (1 << rdev_get_id(rdev))) {
  127. dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
  128. rdev_get_id(rdev) + 1);
  129. return REGULATOR_STATUS_ERROR;
  130. }
  131. /* DCDC1 and DCDC2 can additionally detect high voltage/current */
  132. if (rdev_get_id(rdev) < 2) {
  133. if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) {
  134. dev_dbg(wm831x->dev, "DCDC%d over voltage\n",
  135. rdev_get_id(rdev) + 1);
  136. return REGULATOR_STATUS_ERROR;
  137. }
  138. if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) {
  139. dev_dbg(wm831x->dev, "DCDC%d over current\n",
  140. rdev_get_id(rdev) + 1);
  141. return REGULATOR_STATUS_ERROR;
  142. }
  143. }
  144. /* Is the regulator on? */
  145. ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
  146. if (ret < 0)
  147. return ret;
  148. if (!(ret & (1 << rdev_get_id(rdev))))
  149. return REGULATOR_STATUS_OFF;
  150. /* TODO: When we handle hardware control modes so we can report the
  151. * current mode. */
  152. return REGULATOR_STATUS_ON;
  153. }
  154. static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data)
  155. {
  156. struct wm831x_dcdc *dcdc = data;
  157. regulator_notifier_call_chain(dcdc->regulator,
  158. REGULATOR_EVENT_UNDER_VOLTAGE,
  159. NULL);
  160. return IRQ_HANDLED;
  161. }
  162. static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data)
  163. {
  164. struct wm831x_dcdc *dcdc = data;
  165. regulator_notifier_call_chain(dcdc->regulator,
  166. REGULATOR_EVENT_OVER_CURRENT,
  167. NULL);
  168. return IRQ_HANDLED;
  169. }
  170. /*
  171. * BUCKV specifics
  172. */
  173. static int wm831x_buckv_list_voltage(struct regulator_dev *rdev,
  174. unsigned selector)
  175. {
  176. if (selector <= 0x8)
  177. return 600000;
  178. if (selector <= WM831X_BUCKV_MAX_SELECTOR)
  179. return 600000 + ((selector - 0x8) * 12500);
  180. return -EINVAL;
  181. }
  182. static int wm831x_buckv_map_voltage(struct regulator_dev *rdev,
  183. int min_uV, int max_uV)
  184. {
  185. u16 vsel;
  186. if (min_uV < 600000)
  187. vsel = 0;
  188. else if (min_uV <= 1800000)
  189. vsel = DIV_ROUND_UP(min_uV - 600000, 12500) + 8;
  190. else
  191. return -EINVAL;
  192. if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV)
  193. return -EINVAL;
  194. return vsel;
  195. }
  196. static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state)
  197. {
  198. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  199. if (state == dcdc->dvs_gpio_state)
  200. return 0;
  201. dcdc->dvs_gpio_state = state;
  202. gpio_set_value(dcdc->dvs_gpio, state);
  203. /* Should wait for DVS state change to be asserted if we have
  204. * a GPIO for it, for now assume the device is configured
  205. * for the fastest possible transition.
  206. */
  207. return 0;
  208. }
  209. static int wm831x_buckv_set_voltage_sel(struct regulator_dev *rdev,
  210. unsigned vsel)
  211. {
  212. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  213. struct wm831x *wm831x = dcdc->wm831x;
  214. int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  215. int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
  216. int ret;
  217. /* If this value is already set then do a GPIO update if we can */
  218. if (dcdc->dvs_gpio && dcdc->on_vsel == vsel)
  219. return wm831x_buckv_set_dvs(rdev, 0);
  220. if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel)
  221. return wm831x_buckv_set_dvs(rdev, 1);
  222. /* Always set the ON status to the minimum voltage */
  223. ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
  224. if (ret < 0)
  225. return ret;
  226. dcdc->on_vsel = vsel;
  227. if (!dcdc->dvs_gpio)
  228. return ret;
  229. /* Kick the voltage transition now */
  230. ret = wm831x_buckv_set_dvs(rdev, 0);
  231. if (ret < 0)
  232. return ret;
  233. /*
  234. * If this VSEL is higher than the last one we've seen then
  235. * remember it as the DVS VSEL. This is optimised for CPUfreq
  236. * usage where we want to get to the highest voltage very
  237. * quickly.
  238. */
  239. if (vsel > dcdc->dvs_vsel) {
  240. ret = wm831x_set_bits(wm831x, dvs_reg,
  241. WM831X_DC1_DVS_VSEL_MASK,
  242. vsel);
  243. if (ret == 0)
  244. dcdc->dvs_vsel = vsel;
  245. else
  246. dev_warn(wm831x->dev,
  247. "Failed to set DCDC DVS VSEL: %d\n", ret);
  248. }
  249. return 0;
  250. }
  251. static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
  252. int uV)
  253. {
  254. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  255. struct wm831x *wm831x = dcdc->wm831x;
  256. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  257. int vsel;
  258. vsel = wm831x_buckv_map_voltage(rdev, uV, uV);
  259. if (vsel < 0)
  260. return vsel;
  261. return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
  262. }
  263. static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev)
  264. {
  265. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  266. if (dcdc->dvs_gpio && dcdc->dvs_gpio_state)
  267. return dcdc->dvs_vsel;
  268. else
  269. return dcdc->on_vsel;
  270. }
  271. /* Current limit options */
  272. static u16 wm831x_dcdc_ilim[] = {
  273. 125, 250, 375, 500, 625, 750, 875, 1000
  274. };
  275. static int wm831x_buckv_set_current_limit(struct regulator_dev *rdev,
  276. int min_uA, int max_uA)
  277. {
  278. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  279. struct wm831x *wm831x = dcdc->wm831x;
  280. u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
  281. int i;
  282. for (i = ARRAY_SIZE(wm831x_dcdc_ilim) - 1; i >= 0; i--) {
  283. if ((min_uA <= wm831x_dcdc_ilim[i]) &&
  284. (wm831x_dcdc_ilim[i] <= max_uA))
  285. return wm831x_set_bits(wm831x, reg,
  286. WM831X_DC1_HC_THR_MASK,
  287. i << WM831X_DC1_HC_THR_SHIFT);
  288. }
  289. return -EINVAL;
  290. }
  291. static int wm831x_buckv_get_current_limit(struct regulator_dev *rdev)
  292. {
  293. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  294. struct wm831x *wm831x = dcdc->wm831x;
  295. u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
  296. int val;
  297. val = wm831x_reg_read(wm831x, reg);
  298. if (val < 0)
  299. return val;
  300. val = (val & WM831X_DC1_HC_THR_MASK) >> WM831X_DC1_HC_THR_SHIFT;
  301. return wm831x_dcdc_ilim[val];
  302. }
  303. static const struct regulator_ops wm831x_buckv_ops = {
  304. .set_voltage_sel = wm831x_buckv_set_voltage_sel,
  305. .get_voltage_sel = wm831x_buckv_get_voltage_sel,
  306. .list_voltage = wm831x_buckv_list_voltage,
  307. .map_voltage = wm831x_buckv_map_voltage,
  308. .set_suspend_voltage = wm831x_buckv_set_suspend_voltage,
  309. .set_current_limit = wm831x_buckv_set_current_limit,
  310. .get_current_limit = wm831x_buckv_get_current_limit,
  311. .is_enabled = regulator_is_enabled_regmap,
  312. .enable = regulator_enable_regmap,
  313. .disable = regulator_disable_regmap,
  314. .get_status = wm831x_dcdc_get_status,
  315. .get_mode = wm831x_dcdc_get_mode,
  316. .set_mode = wm831x_dcdc_set_mode,
  317. .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
  318. };
  319. /*
  320. * Set up DVS control. We just log errors since we can still run
  321. * (with reduced performance) if we fail.
  322. */
  323. static void wm831x_buckv_dvs_init(struct platform_device *pdev,
  324. struct wm831x_dcdc *dcdc,
  325. struct wm831x_buckv_pdata *pdata)
  326. {
  327. struct wm831x *wm831x = dcdc->wm831x;
  328. int ret;
  329. u16 ctrl;
  330. if (!pdata || !pdata->dvs_gpio)
  331. return;
  332. /* gpiolib won't let us read the GPIO status so pick the higher
  333. * of the two existing voltages so we take it as platform data.
  334. */
  335. dcdc->dvs_gpio_state = pdata->dvs_init_state;
  336. ret = devm_gpio_request_one(&pdev->dev, pdata->dvs_gpio,
  337. dcdc->dvs_gpio_state ? GPIOF_INIT_HIGH : 0,
  338. "DCDC DVS");
  339. if (ret < 0) {
  340. dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n",
  341. dcdc->name, ret);
  342. return;
  343. }
  344. dcdc->dvs_gpio = pdata->dvs_gpio;
  345. switch (pdata->dvs_control_src) {
  346. case 1:
  347. ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
  348. break;
  349. case 2:
  350. ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
  351. break;
  352. default:
  353. dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
  354. pdata->dvs_control_src, dcdc->name);
  355. return;
  356. }
  357. /* If DVS_VSEL is set to the minimum value then raise it to ON_VSEL
  358. * to make bootstrapping a bit smoother.
  359. */
  360. if (!dcdc->dvs_vsel) {
  361. ret = wm831x_set_bits(wm831x,
  362. dcdc->base + WM831X_DCDC_DVS_CONTROL,
  363. WM831X_DC1_DVS_VSEL_MASK, dcdc->on_vsel);
  364. if (ret == 0)
  365. dcdc->dvs_vsel = dcdc->on_vsel;
  366. else
  367. dev_warn(wm831x->dev, "Failed to set DVS_VSEL: %d\n",
  368. ret);
  369. }
  370. ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
  371. WM831X_DC1_DVS_SRC_MASK, ctrl);
  372. if (ret < 0) {
  373. dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
  374. dcdc->name, ret);
  375. }
  376. }
  377. static int wm831x_buckv_probe(struct platform_device *pdev)
  378. {
  379. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  380. struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
  381. struct regulator_config config = { };
  382. int id;
  383. struct wm831x_dcdc *dcdc;
  384. struct resource *res;
  385. int ret, irq;
  386. if (pdata && pdata->wm831x_num)
  387. id = (pdata->wm831x_num * 10) + 1;
  388. else
  389. id = 0;
  390. id = pdev->id - id;
  391. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  392. dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
  393. GFP_KERNEL);
  394. if (!dcdc)
  395. return -ENOMEM;
  396. dcdc->wm831x = wm831x;
  397. res = platform_get_resource(pdev, IORESOURCE_REG, 0);
  398. if (res == NULL) {
  399. dev_err(&pdev->dev, "No REG resource\n");
  400. ret = -EINVAL;
  401. goto err;
  402. }
  403. dcdc->base = res->start;
  404. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  405. dcdc->desc.name = dcdc->name;
  406. snprintf(dcdc->supply_name, sizeof(dcdc->supply_name),
  407. "DC%dVDD", id + 1);
  408. dcdc->desc.supply_name = dcdc->supply_name;
  409. dcdc->desc.id = id;
  410. dcdc->desc.type = REGULATOR_VOLTAGE;
  411. dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1;
  412. dcdc->desc.ops = &wm831x_buckv_ops;
  413. dcdc->desc.owner = THIS_MODULE;
  414. dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
  415. dcdc->desc.enable_mask = 1 << id;
  416. ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
  417. if (ret < 0) {
  418. dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret);
  419. goto err;
  420. }
  421. dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK;
  422. ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL);
  423. if (ret < 0) {
  424. dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret);
  425. goto err;
  426. }
  427. dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK;
  428. if (pdata && pdata->dcdc[id])
  429. wm831x_buckv_dvs_init(pdev, dcdc,
  430. pdata->dcdc[id]->driver_data);
  431. config.dev = pdev->dev.parent;
  432. if (pdata)
  433. config.init_data = pdata->dcdc[id];
  434. config.driver_data = dcdc;
  435. config.regmap = wm831x->regmap;
  436. dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
  437. &config);
  438. if (IS_ERR(dcdc->regulator)) {
  439. ret = PTR_ERR(dcdc->regulator);
  440. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  441. id + 1, ret);
  442. goto err;
  443. }
  444. irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
  445. ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
  446. wm831x_dcdc_uv_irq,
  447. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  448. dcdc->name, dcdc);
  449. if (ret != 0) {
  450. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  451. irq, ret);
  452. goto err;
  453. }
  454. irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "HC"));
  455. ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
  456. wm831x_dcdc_oc_irq,
  457. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  458. dcdc->name, dcdc);
  459. if (ret != 0) {
  460. dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n",
  461. irq, ret);
  462. goto err;
  463. }
  464. platform_set_drvdata(pdev, dcdc);
  465. return 0;
  466. err:
  467. return ret;
  468. }
  469. static struct platform_driver wm831x_buckv_driver = {
  470. .probe = wm831x_buckv_probe,
  471. .driver = {
  472. .name = "wm831x-buckv",
  473. },
  474. };
  475. /*
  476. * BUCKP specifics
  477. */
  478. static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev, int uV)
  479. {
  480. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  481. struct wm831x *wm831x = dcdc->wm831x;
  482. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  483. int sel;
  484. sel = regulator_map_voltage_linear(rdev, uV, uV);
  485. if (sel < 0)
  486. return sel;
  487. return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, sel);
  488. }
  489. static const struct regulator_ops wm831x_buckp_ops = {
  490. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  491. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  492. .list_voltage = regulator_list_voltage_linear,
  493. .map_voltage = regulator_map_voltage_linear,
  494. .set_suspend_voltage = wm831x_buckp_set_suspend_voltage,
  495. .is_enabled = regulator_is_enabled_regmap,
  496. .enable = regulator_enable_regmap,
  497. .disable = regulator_disable_regmap,
  498. .get_status = wm831x_dcdc_get_status,
  499. .get_mode = wm831x_dcdc_get_mode,
  500. .set_mode = wm831x_dcdc_set_mode,
  501. .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
  502. };
  503. static int wm831x_buckp_probe(struct platform_device *pdev)
  504. {
  505. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  506. struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
  507. struct regulator_config config = { };
  508. int id;
  509. struct wm831x_dcdc *dcdc;
  510. struct resource *res;
  511. int ret, irq;
  512. if (pdata && pdata->wm831x_num)
  513. id = (pdata->wm831x_num * 10) + 1;
  514. else
  515. id = 0;
  516. id = pdev->id - id;
  517. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  518. dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
  519. GFP_KERNEL);
  520. if (!dcdc)
  521. return -ENOMEM;
  522. dcdc->wm831x = wm831x;
  523. res = platform_get_resource(pdev, IORESOURCE_REG, 0);
  524. if (res == NULL) {
  525. dev_err(&pdev->dev, "No REG resource\n");
  526. ret = -EINVAL;
  527. goto err;
  528. }
  529. dcdc->base = res->start;
  530. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  531. dcdc->desc.name = dcdc->name;
  532. snprintf(dcdc->supply_name, sizeof(dcdc->supply_name),
  533. "DC%dVDD", id + 1);
  534. dcdc->desc.supply_name = dcdc->supply_name;
  535. dcdc->desc.id = id;
  536. dcdc->desc.type = REGULATOR_VOLTAGE;
  537. dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1;
  538. dcdc->desc.ops = &wm831x_buckp_ops;
  539. dcdc->desc.owner = THIS_MODULE;
  540. dcdc->desc.vsel_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  541. dcdc->desc.vsel_mask = WM831X_DC3_ON_VSEL_MASK;
  542. dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
  543. dcdc->desc.enable_mask = 1 << id;
  544. dcdc->desc.min_uV = 850000;
  545. dcdc->desc.uV_step = 25000;
  546. config.dev = pdev->dev.parent;
  547. if (pdata)
  548. config.init_data = pdata->dcdc[id];
  549. config.driver_data = dcdc;
  550. config.regmap = wm831x->regmap;
  551. dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
  552. &config);
  553. if (IS_ERR(dcdc->regulator)) {
  554. ret = PTR_ERR(dcdc->regulator);
  555. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  556. id + 1, ret);
  557. goto err;
  558. }
  559. irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
  560. ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
  561. wm831x_dcdc_uv_irq,
  562. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  563. dcdc->name, dcdc);
  564. if (ret != 0) {
  565. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  566. irq, ret);
  567. goto err;
  568. }
  569. platform_set_drvdata(pdev, dcdc);
  570. return 0;
  571. err:
  572. return ret;
  573. }
  574. static struct platform_driver wm831x_buckp_driver = {
  575. .probe = wm831x_buckp_probe,
  576. .driver = {
  577. .name = "wm831x-buckp",
  578. },
  579. };
  580. /*
  581. * DCDC boost convertors
  582. */
  583. static int wm831x_boostp_get_status(struct regulator_dev *rdev)
  584. {
  585. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  586. struct wm831x *wm831x = dcdc->wm831x;
  587. int ret;
  588. /* First, check for errors */
  589. ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
  590. if (ret < 0)
  591. return ret;
  592. if (ret & (1 << rdev_get_id(rdev))) {
  593. dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
  594. rdev_get_id(rdev) + 1);
  595. return REGULATOR_STATUS_ERROR;
  596. }
  597. /* Is the regulator on? */
  598. ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
  599. if (ret < 0)
  600. return ret;
  601. if (ret & (1 << rdev_get_id(rdev)))
  602. return REGULATOR_STATUS_ON;
  603. else
  604. return REGULATOR_STATUS_OFF;
  605. }
  606. static const struct regulator_ops wm831x_boostp_ops = {
  607. .get_status = wm831x_boostp_get_status,
  608. .is_enabled = regulator_is_enabled_regmap,
  609. .enable = regulator_enable_regmap,
  610. .disable = regulator_disable_regmap,
  611. };
  612. static int wm831x_boostp_probe(struct platform_device *pdev)
  613. {
  614. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  615. struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
  616. struct regulator_config config = { };
  617. int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
  618. struct wm831x_dcdc *dcdc;
  619. struct resource *res;
  620. int ret, irq;
  621. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  622. if (pdata == NULL || pdata->dcdc[id] == NULL)
  623. return -ENODEV;
  624. dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
  625. if (!dcdc)
  626. return -ENOMEM;
  627. dcdc->wm831x = wm831x;
  628. res = platform_get_resource(pdev, IORESOURCE_REG, 0);
  629. if (res == NULL) {
  630. dev_err(&pdev->dev, "No REG resource\n");
  631. return -EINVAL;
  632. }
  633. dcdc->base = res->start;
  634. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  635. dcdc->desc.name = dcdc->name;
  636. dcdc->desc.id = id;
  637. dcdc->desc.type = REGULATOR_VOLTAGE;
  638. dcdc->desc.ops = &wm831x_boostp_ops;
  639. dcdc->desc.owner = THIS_MODULE;
  640. dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
  641. dcdc->desc.enable_mask = 1 << id;
  642. config.dev = pdev->dev.parent;
  643. if (pdata)
  644. config.init_data = pdata->dcdc[id];
  645. config.driver_data = dcdc;
  646. config.regmap = wm831x->regmap;
  647. dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
  648. &config);
  649. if (IS_ERR(dcdc->regulator)) {
  650. ret = PTR_ERR(dcdc->regulator);
  651. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  652. id + 1, ret);
  653. return ret;
  654. }
  655. irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
  656. ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
  657. wm831x_dcdc_uv_irq,
  658. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  659. dcdc->name,
  660. dcdc);
  661. if (ret != 0) {
  662. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  663. irq, ret);
  664. return ret;
  665. }
  666. platform_set_drvdata(pdev, dcdc);
  667. return 0;
  668. }
  669. static struct platform_driver wm831x_boostp_driver = {
  670. .probe = wm831x_boostp_probe,
  671. .driver = {
  672. .name = "wm831x-boostp",
  673. },
  674. };
  675. /*
  676. * External Power Enable
  677. *
  678. * These aren't actually DCDCs but look like them in hardware so share
  679. * code.
  680. */
  681. #define WM831X_EPE_BASE 6
  682. static const struct regulator_ops wm831x_epe_ops = {
  683. .is_enabled = regulator_is_enabled_regmap,
  684. .enable = regulator_enable_regmap,
  685. .disable = regulator_disable_regmap,
  686. .get_status = wm831x_dcdc_get_status,
  687. };
  688. static int wm831x_epe_probe(struct platform_device *pdev)
  689. {
  690. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  691. struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
  692. struct regulator_config config = { };
  693. int id = pdev->id % ARRAY_SIZE(pdata->epe);
  694. struct wm831x_dcdc *dcdc;
  695. int ret;
  696. dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1);
  697. dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
  698. if (!dcdc)
  699. return -ENOMEM;
  700. dcdc->wm831x = wm831x;
  701. /* For current parts this is correct; probably need to revisit
  702. * in future.
  703. */
  704. snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1);
  705. dcdc->desc.name = dcdc->name;
  706. dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */
  707. dcdc->desc.ops = &wm831x_epe_ops;
  708. dcdc->desc.type = REGULATOR_VOLTAGE;
  709. dcdc->desc.owner = THIS_MODULE;
  710. dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
  711. dcdc->desc.enable_mask = 1 << dcdc->desc.id;
  712. config.dev = pdev->dev.parent;
  713. if (pdata)
  714. config.init_data = pdata->epe[id];
  715. config.driver_data = dcdc;
  716. config.regmap = wm831x->regmap;
  717. dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
  718. &config);
  719. if (IS_ERR(dcdc->regulator)) {
  720. ret = PTR_ERR(dcdc->regulator);
  721. dev_err(wm831x->dev, "Failed to register EPE%d: %d\n",
  722. id + 1, ret);
  723. goto err;
  724. }
  725. platform_set_drvdata(pdev, dcdc);
  726. return 0;
  727. err:
  728. return ret;
  729. }
  730. static struct platform_driver wm831x_epe_driver = {
  731. .probe = wm831x_epe_probe,
  732. .driver = {
  733. .name = "wm831x-epe",
  734. },
  735. };
  736. static struct platform_driver * const drivers[] = {
  737. &wm831x_buckv_driver,
  738. &wm831x_buckp_driver,
  739. &wm831x_boostp_driver,
  740. &wm831x_epe_driver,
  741. };
  742. static int __init wm831x_dcdc_init(void)
  743. {
  744. return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
  745. }
  746. subsys_initcall(wm831x_dcdc_init);
  747. static void __exit wm831x_dcdc_exit(void)
  748. {
  749. platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
  750. }
  751. module_exit(wm831x_dcdc_exit);
  752. /* Module information */
  753. MODULE_AUTHOR("Mark Brown");
  754. MODULE_DESCRIPTION("WM831x DC-DC convertor driver");
  755. MODULE_LICENSE("GPL");
  756. MODULE_ALIAS("platform:wm831x-buckv");
  757. MODULE_ALIAS("platform:wm831x-buckp");
  758. MODULE_ALIAS("platform:wm831x-boostp");
  759. MODULE_ALIAS("platform:wm831x-epe");