zd_rf_al7230b.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495
  1. /* ZD1211 USB-WLAN driver for Linux
  2. *
  3. * Copyright (C) 2005-2007 Ulrich Kunitz <kune@deine-taler.de>
  4. * Copyright (C) 2006-2007 Daniel Drake <dsd@gentoo.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/kernel.h>
  20. #include "zd_rf.h"
  21. #include "zd_usb.h"
  22. #include "zd_chip.h"
  23. static const u32 chan_rv[][2] = {
  24. RF_CHANNEL( 1) = { 0x09ec00, 0x8cccc8 },
  25. RF_CHANNEL( 2) = { 0x09ec00, 0x8cccd8 },
  26. RF_CHANNEL( 3) = { 0x09ec00, 0x8cccc0 },
  27. RF_CHANNEL( 4) = { 0x09ec00, 0x8cccd0 },
  28. RF_CHANNEL( 5) = { 0x05ec00, 0x8cccc8 },
  29. RF_CHANNEL( 6) = { 0x05ec00, 0x8cccd8 },
  30. RF_CHANNEL( 7) = { 0x05ec00, 0x8cccc0 },
  31. RF_CHANNEL( 8) = { 0x05ec00, 0x8cccd0 },
  32. RF_CHANNEL( 9) = { 0x0dec00, 0x8cccc8 },
  33. RF_CHANNEL(10) = { 0x0dec00, 0x8cccd8 },
  34. RF_CHANNEL(11) = { 0x0dec00, 0x8cccc0 },
  35. RF_CHANNEL(12) = { 0x0dec00, 0x8cccd0 },
  36. RF_CHANNEL(13) = { 0x03ec00, 0x8cccc8 },
  37. RF_CHANNEL(14) = { 0x03ec00, 0x866660 },
  38. };
  39. static const u32 std_rv[] = {
  40. 0x4ff821,
  41. 0xc5fbfc,
  42. 0x21ebfe,
  43. 0xafd401, /* freq shift 0xaad401 */
  44. 0x6cf56a,
  45. 0xe04073,
  46. 0x193d76,
  47. 0x9dd844,
  48. 0x500007,
  49. 0xd8c010,
  50. };
  51. static const u32 rv_init1[] = {
  52. 0x3c9000,
  53. 0xbfffff,
  54. 0x700000,
  55. 0xf15d58,
  56. };
  57. static const u32 rv_init2[] = {
  58. 0xf15d59,
  59. 0xf15d5c,
  60. 0xf15d58,
  61. };
  62. static const struct zd_ioreq16 ioreqs_sw[] = {
  63. { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
  64. { ZD_CR38, 0x38 }, { ZD_CR136, 0xdf },
  65. };
  66. static int zd1211b_al7230b_finalize(struct zd_chip *chip)
  67. {
  68. int r;
  69. static const struct zd_ioreq16 ioreqs[] = {
  70. { ZD_CR80, 0x30 }, { ZD_CR81, 0x30 }, { ZD_CR79, 0x58 },
  71. { ZD_CR12, 0xf0 }, { ZD_CR77, 0x1b }, { ZD_CR78, 0x58 },
  72. { ZD_CR203, 0x04 },
  73. { },
  74. { ZD_CR240, 0x80 },
  75. };
  76. r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  77. if (r)
  78. return r;
  79. if (chip->new_phy_layout) {
  80. /* antenna selection? */
  81. r = zd_iowrite16_locked(chip, 0xe5, ZD_CR9);
  82. if (r)
  83. return r;
  84. }
  85. return zd_iowrite16_locked(chip, 0x04, ZD_CR203);
  86. }
  87. static int zd1211_al7230b_init_hw(struct zd_rf *rf)
  88. {
  89. int r;
  90. struct zd_chip *chip = zd_rf_to_chip(rf);
  91. /* All of these writes are identical to AL2230 unless otherwise
  92. * specified */
  93. static const struct zd_ioreq16 ioreqs_1[] = {
  94. /* This one is 7230-specific, and happens before the rest */
  95. { ZD_CR240, 0x57 },
  96. { },
  97. { ZD_CR15, 0x20 }, { ZD_CR23, 0x40 }, { ZD_CR24, 0x20 },
  98. { ZD_CR26, 0x11 }, { ZD_CR28, 0x3e }, { ZD_CR29, 0x00 },
  99. { ZD_CR44, 0x33 },
  100. /* This value is different for 7230 (was: 0x2a) */
  101. { ZD_CR106, 0x22 },
  102. { ZD_CR107, 0x1a }, { ZD_CR109, 0x09 }, { ZD_CR110, 0x27 },
  103. { ZD_CR111, 0x2b }, { ZD_CR112, 0x2b }, { ZD_CR119, 0x0a },
  104. /* This happened further down in AL2230,
  105. * and the value changed (was: 0xe0) */
  106. { ZD_CR122, 0xfc },
  107. { ZD_CR10, 0x89 },
  108. /* for newest (3rd cut) AL2300 */
  109. { ZD_CR17, 0x28 },
  110. { ZD_CR26, 0x93 }, { ZD_CR34, 0x30 },
  111. /* for newest (3rd cut) AL2300 */
  112. { ZD_CR35, 0x3e },
  113. { ZD_CR41, 0x24 }, { ZD_CR44, 0x32 },
  114. /* for newest (3rd cut) AL2300 */
  115. { ZD_CR46, 0x96 },
  116. { ZD_CR47, 0x1e }, { ZD_CR79, 0x58 }, { ZD_CR80, 0x30 },
  117. { ZD_CR81, 0x30 }, { ZD_CR87, 0x0a }, { ZD_CR89, 0x04 },
  118. { ZD_CR92, 0x0a }, { ZD_CR99, 0x28 },
  119. /* This value is different for 7230 (was: 0x00) */
  120. { ZD_CR100, 0x02 },
  121. { ZD_CR101, 0x13 }, { ZD_CR102, 0x27 },
  122. /* This value is different for 7230 (was: 0x24) */
  123. { ZD_CR106, 0x22 },
  124. /* This value is different for 7230 (was: 0x2a) */
  125. { ZD_CR107, 0x3f },
  126. { ZD_CR109, 0x09 },
  127. /* This value is different for 7230 (was: 0x13) */
  128. { ZD_CR110, 0x1f },
  129. { ZD_CR111, 0x1f }, { ZD_CR112, 0x1f }, { ZD_CR113, 0x27 },
  130. { ZD_CR114, 0x27 },
  131. /* for newest (3rd cut) AL2300 */
  132. { ZD_CR115, 0x24 },
  133. /* This value is different for 7230 (was: 0x24) */
  134. { ZD_CR116, 0x3f },
  135. /* This value is different for 7230 (was: 0xf4) */
  136. { ZD_CR117, 0xfa },
  137. { ZD_CR118, 0xfc }, { ZD_CR119, 0x10 }, { ZD_CR120, 0x4f },
  138. { ZD_CR121, 0x77 }, { ZD_CR137, 0x88 },
  139. /* This one is 7230-specific */
  140. { ZD_CR138, 0xa8 },
  141. /* This value is different for 7230 (was: 0xff) */
  142. { ZD_CR252, 0x34 },
  143. /* This value is different for 7230 (was: 0xff) */
  144. { ZD_CR253, 0x34 },
  145. /* PLL_OFF */
  146. { ZD_CR251, 0x2f },
  147. };
  148. static const struct zd_ioreq16 ioreqs_2[] = {
  149. { ZD_CR251, 0x3f }, /* PLL_ON */
  150. { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
  151. { ZD_CR38, 0x38 }, { ZD_CR136, 0xdf },
  152. };
  153. r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1));
  154. if (r)
  155. return r;
  156. r = zd_rfwritev_cr_locked(chip, chan_rv[0], ARRAY_SIZE(chan_rv[0]));
  157. if (r)
  158. return r;
  159. r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
  160. if (r)
  161. return r;
  162. r = zd_rfwritev_cr_locked(chip, rv_init1, ARRAY_SIZE(rv_init1));
  163. if (r)
  164. return r;
  165. r = zd_iowrite16a_locked(chip, ioreqs_2, ARRAY_SIZE(ioreqs_2));
  166. if (r)
  167. return r;
  168. r = zd_rfwritev_cr_locked(chip, rv_init2, ARRAY_SIZE(rv_init2));
  169. if (r)
  170. return r;
  171. r = zd_iowrite16_locked(chip, 0x06, ZD_CR203);
  172. if (r)
  173. return r;
  174. r = zd_iowrite16_locked(chip, 0x80, ZD_CR240);
  175. if (r)
  176. return r;
  177. return 0;
  178. }
  179. static int zd1211b_al7230b_init_hw(struct zd_rf *rf)
  180. {
  181. int r;
  182. struct zd_chip *chip = zd_rf_to_chip(rf);
  183. static const struct zd_ioreq16 ioreqs_1[] = {
  184. { ZD_CR240, 0x57 }, { ZD_CR9, 0x9 },
  185. { },
  186. { ZD_CR10, 0x8b }, { ZD_CR15, 0x20 },
  187. { ZD_CR17, 0x2B }, /* for newest (3rd cut) AL2230 */
  188. { ZD_CR20, 0x10 }, /* 4N25->Stone Request */
  189. { ZD_CR23, 0x40 }, { ZD_CR24, 0x20 }, { ZD_CR26, 0x93 },
  190. { ZD_CR28, 0x3e }, { ZD_CR29, 0x00 },
  191. { ZD_CR33, 0x28 }, /* 5613 */
  192. { ZD_CR34, 0x30 },
  193. { ZD_CR35, 0x3e }, /* for newest (3rd cut) AL2230 */
  194. { ZD_CR41, 0x24 }, { ZD_CR44, 0x32 },
  195. { ZD_CR46, 0x99 }, /* for newest (3rd cut) AL2230 */
  196. { ZD_CR47, 0x1e },
  197. /* ZD1215 5610 */
  198. { ZD_CR48, 0x00 }, { ZD_CR49, 0x00 }, { ZD_CR51, 0x01 },
  199. { ZD_CR52, 0x80 }, { ZD_CR53, 0x7e }, { ZD_CR65, 0x00 },
  200. { ZD_CR66, 0x00 }, { ZD_CR67, 0x00 }, { ZD_CR68, 0x00 },
  201. { ZD_CR69, 0x28 },
  202. { ZD_CR79, 0x58 }, { ZD_CR80, 0x30 }, { ZD_CR81, 0x30 },
  203. { ZD_CR87, 0x0A }, { ZD_CR89, 0x04 },
  204. { ZD_CR90, 0x58 }, /* 5112 */
  205. { ZD_CR91, 0x00 }, /* 5613 */
  206. { ZD_CR92, 0x0a },
  207. { ZD_CR98, 0x8d }, /* 4804, for 1212 new algorithm */
  208. { ZD_CR99, 0x00 }, { ZD_CR100, 0x02 }, { ZD_CR101, 0x13 },
  209. { ZD_CR102, 0x27 },
  210. { ZD_CR106, 0x20 }, /* change to 0x24 for AL7230B */
  211. { ZD_CR109, 0x13 }, /* 4804, for 1212 new algorithm */
  212. { ZD_CR112, 0x1f },
  213. };
  214. static const struct zd_ioreq16 ioreqs_new_phy[] = {
  215. { ZD_CR107, 0x28 },
  216. { ZD_CR110, 0x1f }, /* 5127, 0x13->0x1f */
  217. { ZD_CR111, 0x1f }, /* 0x13 to 0x1f for AL7230B */
  218. { ZD_CR116, 0x2a }, { ZD_CR118, 0xfa }, { ZD_CR119, 0x12 },
  219. { ZD_CR121, 0x6c }, /* 5613 */
  220. };
  221. static const struct zd_ioreq16 ioreqs_old_phy[] = {
  222. { ZD_CR107, 0x24 },
  223. { ZD_CR110, 0x13 }, /* 5127, 0x13->0x1f */
  224. { ZD_CR111, 0x13 }, /* 0x13 to 0x1f for AL7230B */
  225. { ZD_CR116, 0x24 }, { ZD_CR118, 0xfc }, { ZD_CR119, 0x11 },
  226. { ZD_CR121, 0x6a }, /* 5613 */
  227. };
  228. static const struct zd_ioreq16 ioreqs_2[] = {
  229. { ZD_CR113, 0x27 }, { ZD_CR114, 0x27 }, { ZD_CR115, 0x24 },
  230. { ZD_CR117, 0xfa }, { ZD_CR120, 0x4f },
  231. { ZD_CR122, 0xfc }, /* E0->FCh at 4901 */
  232. { ZD_CR123, 0x57 }, /* 5613 */
  233. { ZD_CR125, 0xad }, /* 4804, for 1212 new algorithm */
  234. { ZD_CR126, 0x6c }, /* 5613 */
  235. { ZD_CR127, 0x03 }, /* 4804, for 1212 new algorithm */
  236. { ZD_CR130, 0x10 },
  237. { ZD_CR131, 0x00 }, /* 5112 */
  238. { ZD_CR137, 0x50 }, /* 5613 */
  239. { ZD_CR138, 0xa8 }, /* 5112 */
  240. { ZD_CR144, 0xac }, /* 5613 */
  241. { ZD_CR148, 0x40 }, /* 5112 */
  242. { ZD_CR149, 0x40 }, /* 4O07, 50->40 */
  243. { ZD_CR150, 0x1a }, /* 5112, 0C->1A */
  244. { ZD_CR252, 0x34 }, { ZD_CR253, 0x34 },
  245. { ZD_CR251, 0x2f }, /* PLL_OFF */
  246. };
  247. static const struct zd_ioreq16 ioreqs_3[] = {
  248. { ZD_CR251, 0x7f }, /* PLL_ON */
  249. { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
  250. { ZD_CR38, 0x38 }, { ZD_CR136, 0xdf },
  251. };
  252. r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1));
  253. if (r)
  254. return r;
  255. if (chip->new_phy_layout)
  256. r = zd_iowrite16a_locked(chip, ioreqs_new_phy,
  257. ARRAY_SIZE(ioreqs_new_phy));
  258. else
  259. r = zd_iowrite16a_locked(chip, ioreqs_old_phy,
  260. ARRAY_SIZE(ioreqs_old_phy));
  261. if (r)
  262. return r;
  263. r = zd_iowrite16a_locked(chip, ioreqs_2, ARRAY_SIZE(ioreqs_2));
  264. if (r)
  265. return r;
  266. r = zd_rfwritev_cr_locked(chip, chan_rv[0], ARRAY_SIZE(chan_rv[0]));
  267. if (r)
  268. return r;
  269. r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
  270. if (r)
  271. return r;
  272. r = zd_rfwritev_cr_locked(chip, rv_init1, ARRAY_SIZE(rv_init1));
  273. if (r)
  274. return r;
  275. r = zd_iowrite16a_locked(chip, ioreqs_3, ARRAY_SIZE(ioreqs_3));
  276. if (r)
  277. return r;
  278. r = zd_rfwritev_cr_locked(chip, rv_init2, ARRAY_SIZE(rv_init2));
  279. if (r)
  280. return r;
  281. return zd1211b_al7230b_finalize(chip);
  282. }
  283. static int zd1211_al7230b_set_channel(struct zd_rf *rf, u8 channel)
  284. {
  285. int r;
  286. const u32 *rv = chan_rv[channel-1];
  287. struct zd_chip *chip = zd_rf_to_chip(rf);
  288. static const struct zd_ioreq16 ioreqs[] = {
  289. /* PLL_ON */
  290. { ZD_CR251, 0x3f },
  291. { ZD_CR203, 0x06 }, { ZD_CR240, 0x08 },
  292. };
  293. r = zd_iowrite16_locked(chip, 0x57, ZD_CR240);
  294. if (r)
  295. return r;
  296. /* PLL_OFF */
  297. r = zd_iowrite16_locked(chip, 0x2f, ZD_CR251);
  298. if (r)
  299. return r;
  300. r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
  301. if (r)
  302. return r;
  303. r = zd_rfwrite_cr_locked(chip, 0x3c9000);
  304. if (r)
  305. return r;
  306. r = zd_rfwrite_cr_locked(chip, 0xf15d58);
  307. if (r)
  308. return r;
  309. r = zd_iowrite16a_locked(chip, ioreqs_sw, ARRAY_SIZE(ioreqs_sw));
  310. if (r)
  311. return r;
  312. r = zd_rfwritev_cr_locked(chip, rv, 2);
  313. if (r)
  314. return r;
  315. r = zd_rfwrite_cr_locked(chip, 0x3c9000);
  316. if (r)
  317. return r;
  318. return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  319. }
  320. static int zd1211b_al7230b_set_channel(struct zd_rf *rf, u8 channel)
  321. {
  322. int r;
  323. const u32 *rv = chan_rv[channel-1];
  324. struct zd_chip *chip = zd_rf_to_chip(rf);
  325. r = zd_iowrite16_locked(chip, 0x57, ZD_CR240);
  326. if (r)
  327. return r;
  328. r = zd_iowrite16_locked(chip, 0xe4, ZD_CR9);
  329. if (r)
  330. return r;
  331. /* PLL_OFF */
  332. r = zd_iowrite16_locked(chip, 0x2f, ZD_CR251);
  333. if (r)
  334. return r;
  335. r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
  336. if (r)
  337. return r;
  338. r = zd_rfwrite_cr_locked(chip, 0x3c9000);
  339. if (r)
  340. return r;
  341. r = zd_rfwrite_cr_locked(chip, 0xf15d58);
  342. if (r)
  343. return r;
  344. r = zd_iowrite16a_locked(chip, ioreqs_sw, ARRAY_SIZE(ioreqs_sw));
  345. if (r)
  346. return r;
  347. r = zd_rfwritev_cr_locked(chip, rv, 2);
  348. if (r)
  349. return r;
  350. r = zd_rfwrite_cr_locked(chip, 0x3c9000);
  351. if (r)
  352. return r;
  353. r = zd_iowrite16_locked(chip, 0x7f, ZD_CR251);
  354. if (r)
  355. return r;
  356. return zd1211b_al7230b_finalize(chip);
  357. }
  358. static int zd1211_al7230b_switch_radio_on(struct zd_rf *rf)
  359. {
  360. struct zd_chip *chip = zd_rf_to_chip(rf);
  361. static const struct zd_ioreq16 ioreqs[] = {
  362. { ZD_CR11, 0x00 },
  363. { ZD_CR251, 0x3f },
  364. };
  365. return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  366. }
  367. static int zd1211b_al7230b_switch_radio_on(struct zd_rf *rf)
  368. {
  369. struct zd_chip *chip = zd_rf_to_chip(rf);
  370. static const struct zd_ioreq16 ioreqs[] = {
  371. { ZD_CR11, 0x00 },
  372. { ZD_CR251, 0x7f },
  373. };
  374. return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  375. }
  376. static int al7230b_switch_radio_off(struct zd_rf *rf)
  377. {
  378. struct zd_chip *chip = zd_rf_to_chip(rf);
  379. static const struct zd_ioreq16 ioreqs[] = {
  380. { ZD_CR11, 0x04 },
  381. { ZD_CR251, 0x2f },
  382. };
  383. return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  384. }
  385. /* ZD1211B+AL7230B 6m band edge patching differs slightly from other
  386. * configurations */
  387. static int zd1211b_al7230b_patch_6m(struct zd_rf *rf, u8 channel)
  388. {
  389. struct zd_chip *chip = zd_rf_to_chip(rf);
  390. struct zd_ioreq16 ioreqs[] = {
  391. { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 },
  392. };
  393. /* FIXME: Channel 11 is not the edge for all regulatory domains. */
  394. if (channel == 1) {
  395. ioreqs[0].value = 0x0e;
  396. ioreqs[1].value = 0x10;
  397. } else if (channel == 11) {
  398. ioreqs[0].value = 0x10;
  399. ioreqs[1].value = 0x10;
  400. }
  401. dev_dbg_f(zd_chip_dev(chip), "patching for channel %d\n", channel);
  402. return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  403. }
  404. int zd_rf_init_al7230b(struct zd_rf *rf)
  405. {
  406. struct zd_chip *chip = zd_rf_to_chip(rf);
  407. if (zd_chip_is_zd1211b(chip)) {
  408. rf->init_hw = zd1211b_al7230b_init_hw;
  409. rf->switch_radio_on = zd1211b_al7230b_switch_radio_on;
  410. rf->set_channel = zd1211b_al7230b_set_channel;
  411. rf->patch_6m_band_edge = zd1211b_al7230b_patch_6m;
  412. } else {
  413. rf->init_hw = zd1211_al7230b_init_hw;
  414. rf->switch_radio_on = zd1211_al7230b_switch_radio_on;
  415. rf->set_channel = zd1211_al7230b_set_channel;
  416. rf->patch_6m_band_edge = zd_rf_generic_patch_6m;
  417. rf->patch_cck_gain = 1;
  418. }
  419. rf->switch_radio_off = al7230b_switch_radio_off;
  420. return 0;
  421. }