wcn36xx.h 7.9 KB

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  1. /*
  2. * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11. * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13. * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14. * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef _WCN36XX_H_
  17. #define _WCN36XX_H_
  18. #include <linux/completion.h>
  19. #include <linux/printk.h>
  20. #include <linux/spinlock.h>
  21. #include <net/mac80211.h>
  22. #include "hal.h"
  23. #include "smd.h"
  24. #include "txrx.h"
  25. #include "dxe.h"
  26. #include "pmc.h"
  27. #include "debug.h"
  28. #define WLAN_NV_FILE "/*(DEBLOBBED)*/"
  29. #define WCN36XX_AGGR_BUFFER_SIZE 64
  30. /* How many frames until we start a-mpdu TX session */
  31. #define WCN36XX_AMPDU_START_THRESH 20
  32. extern unsigned int wcn36xx_dbg_mask;
  33. enum wcn36xx_debug_mask {
  34. WCN36XX_DBG_DXE = 0x00000001,
  35. WCN36XX_DBG_DXE_DUMP = 0x00000002,
  36. WCN36XX_DBG_SMD = 0x00000004,
  37. WCN36XX_DBG_SMD_DUMP = 0x00000008,
  38. WCN36XX_DBG_RX = 0x00000010,
  39. WCN36XX_DBG_RX_DUMP = 0x00000020,
  40. WCN36XX_DBG_TX = 0x00000040,
  41. WCN36XX_DBG_TX_DUMP = 0x00000080,
  42. WCN36XX_DBG_HAL = 0x00000100,
  43. WCN36XX_DBG_HAL_DUMP = 0x00000200,
  44. WCN36XX_DBG_MAC = 0x00000400,
  45. WCN36XX_DBG_BEACON = 0x00000800,
  46. WCN36XX_DBG_BEACON_DUMP = 0x00001000,
  47. WCN36XX_DBG_PMC = 0x00002000,
  48. WCN36XX_DBG_PMC_DUMP = 0x00004000,
  49. WCN36XX_DBG_ANY = 0xffffffff,
  50. };
  51. #define wcn36xx_err(fmt, arg...) \
  52. printk(KERN_ERR pr_fmt("ERROR " fmt), ##arg)
  53. #define wcn36xx_warn(fmt, arg...) \
  54. printk(KERN_WARNING pr_fmt("WARNING " fmt), ##arg)
  55. #define wcn36xx_info(fmt, arg...) \
  56. printk(KERN_INFO pr_fmt(fmt), ##arg)
  57. #define wcn36xx_dbg(mask, fmt, arg...) do { \
  58. if (wcn36xx_dbg_mask & mask) \
  59. printk(KERN_DEBUG pr_fmt(fmt), ##arg); \
  60. } while (0)
  61. #define wcn36xx_dbg_dump(mask, prefix_str, buf, len) do { \
  62. if (wcn36xx_dbg_mask & mask) \
  63. print_hex_dump(KERN_DEBUG, pr_fmt(prefix_str), \
  64. DUMP_PREFIX_OFFSET, 32, 1, \
  65. buf, len, false); \
  66. } while (0)
  67. enum wcn36xx_ampdu_state {
  68. WCN36XX_AMPDU_NONE,
  69. WCN36XX_AMPDU_INIT,
  70. WCN36XX_AMPDU_START,
  71. WCN36XX_AMPDU_OPERATIONAL,
  72. };
  73. #define WCN36XX_HW_CHANNEL(__wcn) (__wcn->hw->conf.chandef.chan->hw_value)
  74. #define WCN36XX_BAND(__wcn) (__wcn->hw->conf.chandef.chan->band)
  75. #define WCN36XX_CENTER_FREQ(__wcn) (__wcn->hw->conf.chandef.chan->center_freq)
  76. #define WCN36XX_LISTEN_INTERVAL(__wcn) (__wcn->hw->conf.listen_interval)
  77. #define WCN36XX_FLAGS(__wcn) (__wcn->hw->flags)
  78. #define WCN36XX_MAX_POWER(__wcn) (__wcn->hw->conf.chandef.chan->max_power)
  79. static inline void buff_to_be(u32 *buf, size_t len)
  80. {
  81. int i;
  82. for (i = 0; i < len; i++)
  83. buf[i] = cpu_to_be32(buf[i]);
  84. }
  85. struct nv_data {
  86. int is_valid;
  87. u8 table;
  88. };
  89. /* Interface for platform control path
  90. *
  91. * @open: hook must be called when wcn36xx wants to open control channel.
  92. * @tx: sends a buffer.
  93. */
  94. struct wcn36xx_platform_ctrl_ops {
  95. int (*open)(void *drv_priv, void *rsp_cb);
  96. void (*close)(void);
  97. int (*tx)(char *buf, size_t len);
  98. int (*get_hw_mac)(u8 *addr);
  99. int (*smsm_change_state)(u32 clear_mask, u32 set_mask);
  100. };
  101. /**
  102. * struct wcn36xx_vif - holds VIF related fields
  103. *
  104. * @bss_index: bss_index is initially set to 0xFF. bss_index is received from
  105. * HW after first config_bss call and must be used in delete_bss and
  106. * enter/exit_bmps.
  107. */
  108. struct wcn36xx_vif {
  109. struct list_head list;
  110. u8 dtim_period;
  111. enum ani_ed_type encrypt_type;
  112. bool is_joining;
  113. bool sta_assoc;
  114. struct wcn36xx_hal_mac_ssid ssid;
  115. /* Power management */
  116. enum wcn36xx_power_state pw_state;
  117. u8 bss_index;
  118. /* Returned from WCN36XX_HAL_ADD_STA_SELF_RSP */
  119. u8 self_sta_index;
  120. u8 self_dpu_desc_index;
  121. u8 self_ucast_dpu_sign;
  122. };
  123. /**
  124. * struct wcn36xx_sta - holds STA related fields
  125. *
  126. * @tid: traffic ID that is used during AMPDU and in TX BD.
  127. * @sta_index: STA index is returned from HW after config_sta call and is
  128. * used in both SMD channel and TX BD.
  129. * @dpu_desc_index: DPU descriptor index is returned from HW after config_sta
  130. * call and is used in TX BD.
  131. * @bss_sta_index: STA index is returned from HW after config_bss call and is
  132. * used in both SMD channel and TX BD. See table bellow when it is used.
  133. * @bss_dpu_desc_index: DPU descriptor index is returned from HW after
  134. * config_bss call and is used in TX BD.
  135. * ______________________________________________
  136. * | | STA | AP |
  137. * |______________|_____________|_______________|
  138. * | TX BD |bss_sta_index| sta_index |
  139. * |______________|_____________|_______________|
  140. * |all SMD calls |bss_sta_index| sta_index |
  141. * |______________|_____________|_______________|
  142. * |smd_delete_sta| sta_index | sta_index |
  143. * |______________|_____________|_______________|
  144. */
  145. struct wcn36xx_sta {
  146. struct wcn36xx_vif *vif;
  147. u16 aid;
  148. u16 tid;
  149. u8 sta_index;
  150. u8 dpu_desc_index;
  151. u8 ucast_dpu_sign;
  152. u8 bss_sta_index;
  153. u8 bss_dpu_desc_index;
  154. bool is_data_encrypted;
  155. /* Rates */
  156. struct wcn36xx_hal_supported_rates supported_rates;
  157. spinlock_t ampdu_lock; /* protects next two fields */
  158. enum wcn36xx_ampdu_state ampdu_state[16];
  159. int non_agg_frame_ct;
  160. };
  161. struct wcn36xx_dxe_ch;
  162. struct wcn36xx {
  163. struct ieee80211_hw *hw;
  164. struct device *dev;
  165. struct list_head vif_list;
  166. const struct firmware *nv;
  167. u8 fw_revision;
  168. u8 fw_version;
  169. u8 fw_minor;
  170. u8 fw_major;
  171. u32 fw_feat_caps[WCN36XX_HAL_CAPS_SIZE];
  172. bool is_pronto;
  173. /* extra byte for the NULL termination */
  174. u8 crm_version[WCN36XX_HAL_VERSION_LENGTH + 1];
  175. u8 wlan_version[WCN36XX_HAL_VERSION_LENGTH + 1];
  176. /* IRQs */
  177. int tx_irq;
  178. int rx_irq;
  179. void __iomem *ccu_base;
  180. void __iomem *dxe_base;
  181. struct wcn36xx_platform_ctrl_ops *ctrl_ops;
  182. /*
  183. * smd_buf must be protected with smd_mutex to garantee
  184. * that all messages are sent one after another
  185. */
  186. u8 *hal_buf;
  187. size_t hal_rsp_len;
  188. struct mutex hal_mutex;
  189. struct completion hal_rsp_compl;
  190. struct workqueue_struct *hal_ind_wq;
  191. struct work_struct hal_ind_work;
  192. spinlock_t hal_ind_lock;
  193. struct list_head hal_ind_queue;
  194. /* DXE channels */
  195. struct wcn36xx_dxe_ch dxe_tx_l_ch; /* TX low */
  196. struct wcn36xx_dxe_ch dxe_tx_h_ch; /* TX high */
  197. struct wcn36xx_dxe_ch dxe_rx_l_ch; /* RX low */
  198. struct wcn36xx_dxe_ch dxe_rx_h_ch; /* RX high */
  199. /* For synchronization of DXE resources from BH, IRQ and WQ contexts */
  200. spinlock_t dxe_lock;
  201. bool queues_stopped;
  202. /* Memory pools */
  203. struct wcn36xx_dxe_mem_pool mgmt_mem_pool;
  204. struct wcn36xx_dxe_mem_pool data_mem_pool;
  205. struct sk_buff *tx_ack_skb;
  206. #ifdef CONFIG_WCN36XX_DEBUGFS
  207. /* Debug file system entry */
  208. struct wcn36xx_dfs_entry dfs;
  209. #endif /* CONFIG_WCN36XX_DEBUGFS */
  210. };
  211. static inline bool wcn36xx_is_fw_version(struct wcn36xx *wcn,
  212. u8 major,
  213. u8 minor,
  214. u8 version,
  215. u8 revision)
  216. {
  217. return (wcn->fw_major == major &&
  218. wcn->fw_minor == minor &&
  219. wcn->fw_version == version &&
  220. wcn->fw_revision == revision);
  221. }
  222. void wcn36xx_set_default_rates(struct wcn36xx_hal_supported_rates *rates);
  223. static inline
  224. struct ieee80211_sta *wcn36xx_priv_to_sta(struct wcn36xx_sta *sta_priv)
  225. {
  226. return container_of((void *)sta_priv, struct ieee80211_sta, drv_priv);
  227. }
  228. static inline
  229. struct wcn36xx_vif *wcn36xx_vif_to_priv(struct ieee80211_vif *vif)
  230. {
  231. return (struct wcn36xx_vif *) vif->drv_priv;
  232. }
  233. static inline
  234. struct ieee80211_vif *wcn36xx_priv_to_vif(struct wcn36xx_vif *vif_priv)
  235. {
  236. return container_of((void *) vif_priv, struct ieee80211_vif, drv_priv);
  237. }
  238. static inline
  239. struct wcn36xx_sta *wcn36xx_sta_to_priv(struct ieee80211_sta *sta)
  240. {
  241. return (struct wcn36xx_sta *)sta->drv_priv;
  242. }
  243. #endif /* _WCN36XX_H_ */