debug.c 40 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/slab.h>
  17. #include <linux/vmalloc.h>
  18. #include <linux/export.h>
  19. #include <asm/unaligned.h>
  20. #include "ath9k.h"
  21. #define REG_WRITE_D(_ah, _reg, _val) \
  22. ath9k_hw_common(_ah)->ops->write((_ah), (_val), (_reg))
  23. #define REG_READ_D(_ah, _reg) \
  24. ath9k_hw_common(_ah)->ops->read((_ah), (_reg))
  25. void ath9k_debug_sync_cause(struct ath_softc *sc, u32 sync_cause)
  26. {
  27. if (sync_cause)
  28. sc->debug.stats.istats.sync_cause_all++;
  29. if (sync_cause & AR_INTR_SYNC_RTC_IRQ)
  30. sc->debug.stats.istats.sync_rtc_irq++;
  31. if (sync_cause & AR_INTR_SYNC_MAC_IRQ)
  32. sc->debug.stats.istats.sync_mac_irq++;
  33. if (sync_cause & AR_INTR_SYNC_EEPROM_ILLEGAL_ACCESS)
  34. sc->debug.stats.istats.eeprom_illegal_access++;
  35. if (sync_cause & AR_INTR_SYNC_APB_TIMEOUT)
  36. sc->debug.stats.istats.apb_timeout++;
  37. if (sync_cause & AR_INTR_SYNC_PCI_MODE_CONFLICT)
  38. sc->debug.stats.istats.pci_mode_conflict++;
  39. if (sync_cause & AR_INTR_SYNC_HOST1_FATAL)
  40. sc->debug.stats.istats.host1_fatal++;
  41. if (sync_cause & AR_INTR_SYNC_HOST1_PERR)
  42. sc->debug.stats.istats.host1_perr++;
  43. if (sync_cause & AR_INTR_SYNC_TRCV_FIFO_PERR)
  44. sc->debug.stats.istats.trcv_fifo_perr++;
  45. if (sync_cause & AR_INTR_SYNC_RADM_CPL_EP)
  46. sc->debug.stats.istats.radm_cpl_ep++;
  47. if (sync_cause & AR_INTR_SYNC_RADM_CPL_DLLP_ABORT)
  48. sc->debug.stats.istats.radm_cpl_dllp_abort++;
  49. if (sync_cause & AR_INTR_SYNC_RADM_CPL_TLP_ABORT)
  50. sc->debug.stats.istats.radm_cpl_tlp_abort++;
  51. if (sync_cause & AR_INTR_SYNC_RADM_CPL_ECRC_ERR)
  52. sc->debug.stats.istats.radm_cpl_ecrc_err++;
  53. if (sync_cause & AR_INTR_SYNC_RADM_CPL_TIMEOUT)
  54. sc->debug.stats.istats.radm_cpl_timeout++;
  55. if (sync_cause & AR_INTR_SYNC_LOCAL_TIMEOUT)
  56. sc->debug.stats.istats.local_timeout++;
  57. if (sync_cause & AR_INTR_SYNC_PM_ACCESS)
  58. sc->debug.stats.istats.pm_access++;
  59. if (sync_cause & AR_INTR_SYNC_MAC_AWAKE)
  60. sc->debug.stats.istats.mac_awake++;
  61. if (sync_cause & AR_INTR_SYNC_MAC_ASLEEP)
  62. sc->debug.stats.istats.mac_asleep++;
  63. if (sync_cause & AR_INTR_SYNC_MAC_SLEEP_ACCESS)
  64. sc->debug.stats.istats.mac_sleep_access++;
  65. }
  66. static ssize_t ath9k_debugfs_read_buf(struct file *file, char __user *user_buf,
  67. size_t count, loff_t *ppos)
  68. {
  69. u8 *buf = file->private_data;
  70. return simple_read_from_buffer(user_buf, count, ppos, buf, strlen(buf));
  71. }
  72. static int ath9k_debugfs_release_buf(struct inode *inode, struct file *file)
  73. {
  74. vfree(file->private_data);
  75. return 0;
  76. }
  77. #ifdef CONFIG_ATH_DEBUG
  78. static ssize_t read_file_debug(struct file *file, char __user *user_buf,
  79. size_t count, loff_t *ppos)
  80. {
  81. struct ath_softc *sc = file->private_data;
  82. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  83. char buf[32];
  84. unsigned int len;
  85. len = sprintf(buf, "0x%08x\n", common->debug_mask);
  86. return simple_read_from_buffer(user_buf, count, ppos, buf, len);
  87. }
  88. static ssize_t write_file_debug(struct file *file, const char __user *user_buf,
  89. size_t count, loff_t *ppos)
  90. {
  91. struct ath_softc *sc = file->private_data;
  92. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  93. unsigned long mask;
  94. char buf[32];
  95. ssize_t len;
  96. len = min(count, sizeof(buf) - 1);
  97. if (copy_from_user(buf, user_buf, len))
  98. return -EFAULT;
  99. buf[len] = '\0';
  100. if (kstrtoul(buf, 0, &mask))
  101. return -EINVAL;
  102. common->debug_mask = mask;
  103. return count;
  104. }
  105. static const struct file_operations fops_debug = {
  106. .read = read_file_debug,
  107. .write = write_file_debug,
  108. .open = simple_open,
  109. .owner = THIS_MODULE,
  110. .llseek = default_llseek,
  111. };
  112. #endif
  113. #define DMA_BUF_LEN 1024
  114. static ssize_t read_file_ani(struct file *file, char __user *user_buf,
  115. size_t count, loff_t *ppos)
  116. {
  117. struct ath_softc *sc = file->private_data;
  118. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  119. struct ath_hw *ah = sc->sc_ah;
  120. unsigned int len = 0;
  121. const unsigned int size = 1024;
  122. ssize_t retval = 0;
  123. char *buf;
  124. int i;
  125. struct {
  126. const char *name;
  127. unsigned int val;
  128. } ani_info[] = {
  129. { "ANI RESET", ah->stats.ast_ani_reset },
  130. { "OFDM LEVEL", ah->ani.ofdmNoiseImmunityLevel },
  131. { "CCK LEVEL", ah->ani.cckNoiseImmunityLevel },
  132. { "SPUR UP", ah->stats.ast_ani_spurup },
  133. { "SPUR DOWN", ah->stats.ast_ani_spurup },
  134. { "OFDM WS-DET ON", ah->stats.ast_ani_ofdmon },
  135. { "OFDM WS-DET OFF", ah->stats.ast_ani_ofdmoff },
  136. { "MRC-CCK ON", ah->stats.ast_ani_ccklow },
  137. { "MRC-CCK OFF", ah->stats.ast_ani_cckhigh },
  138. { "FIR-STEP UP", ah->stats.ast_ani_stepup },
  139. { "FIR-STEP DOWN", ah->stats.ast_ani_stepdown },
  140. { "INV LISTENTIME", ah->stats.ast_ani_lneg_or_lzero },
  141. { "OFDM ERRORS", ah->stats.ast_ani_ofdmerrs },
  142. { "CCK ERRORS", ah->stats.ast_ani_cckerrs },
  143. };
  144. buf = kzalloc(size, GFP_KERNEL);
  145. if (buf == NULL)
  146. return -ENOMEM;
  147. len += scnprintf(buf + len, size - len, "%15s: %s\n", "ANI",
  148. common->disable_ani ? "DISABLED" : "ENABLED");
  149. if (common->disable_ani)
  150. goto exit;
  151. for (i = 0; i < ARRAY_SIZE(ani_info); i++)
  152. len += scnprintf(buf + len, size - len, "%15s: %u\n",
  153. ani_info[i].name, ani_info[i].val);
  154. exit:
  155. if (len > size)
  156. len = size;
  157. retval = simple_read_from_buffer(user_buf, count, ppos, buf, len);
  158. kfree(buf);
  159. return retval;
  160. }
  161. static ssize_t write_file_ani(struct file *file,
  162. const char __user *user_buf,
  163. size_t count, loff_t *ppos)
  164. {
  165. struct ath_softc *sc = file->private_data;
  166. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  167. unsigned long ani;
  168. char buf[32];
  169. ssize_t len;
  170. len = min(count, sizeof(buf) - 1);
  171. if (copy_from_user(buf, user_buf, len))
  172. return -EFAULT;
  173. buf[len] = '\0';
  174. if (kstrtoul(buf, 0, &ani))
  175. return -EINVAL;
  176. if (ani > 1)
  177. return -EINVAL;
  178. common->disable_ani = !ani;
  179. if (common->disable_ani) {
  180. clear_bit(ATH_OP_ANI_RUN, &common->op_flags);
  181. ath_stop_ani(sc);
  182. } else {
  183. ath_check_ani(sc);
  184. }
  185. return count;
  186. }
  187. static const struct file_operations fops_ani = {
  188. .read = read_file_ani,
  189. .write = write_file_ani,
  190. .open = simple_open,
  191. .owner = THIS_MODULE,
  192. .llseek = default_llseek,
  193. };
  194. #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
  195. static ssize_t read_file_bt_ant_diversity(struct file *file,
  196. char __user *user_buf,
  197. size_t count, loff_t *ppos)
  198. {
  199. struct ath_softc *sc = file->private_data;
  200. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  201. char buf[32];
  202. unsigned int len;
  203. len = sprintf(buf, "%d\n", common->bt_ant_diversity);
  204. return simple_read_from_buffer(user_buf, count, ppos, buf, len);
  205. }
  206. static ssize_t write_file_bt_ant_diversity(struct file *file,
  207. const char __user *user_buf,
  208. size_t count, loff_t *ppos)
  209. {
  210. struct ath_softc *sc = file->private_data;
  211. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  212. struct ath9k_hw_capabilities *pCap = &sc->sc_ah->caps;
  213. unsigned long bt_ant_diversity;
  214. char buf[32];
  215. ssize_t len;
  216. len = min(count, sizeof(buf) - 1);
  217. if (copy_from_user(buf, user_buf, len))
  218. return -EFAULT;
  219. if (!(pCap->hw_caps & ATH9K_HW_CAP_BT_ANT_DIV))
  220. goto exit;
  221. buf[len] = '\0';
  222. if (kstrtoul(buf, 0, &bt_ant_diversity))
  223. return -EINVAL;
  224. common->bt_ant_diversity = !!bt_ant_diversity;
  225. ath9k_ps_wakeup(sc);
  226. ath9k_hw_set_bt_ant_diversity(sc->sc_ah, common->bt_ant_diversity);
  227. ath_dbg(common, CONFIG, "Enable WLAN/BT RX Antenna diversity: %d\n",
  228. common->bt_ant_diversity);
  229. ath9k_ps_restore(sc);
  230. exit:
  231. return count;
  232. }
  233. static const struct file_operations fops_bt_ant_diversity = {
  234. .read = read_file_bt_ant_diversity,
  235. .write = write_file_bt_ant_diversity,
  236. .open = simple_open,
  237. .owner = THIS_MODULE,
  238. .llseek = default_llseek,
  239. };
  240. #endif
  241. void ath9k_debug_stat_ant(struct ath_softc *sc,
  242. struct ath_hw_antcomb_conf *div_ant_conf,
  243. int main_rssi_avg, int alt_rssi_avg)
  244. {
  245. struct ath_antenna_stats *as_main = &sc->debug.stats.ant_stats[ANT_MAIN];
  246. struct ath_antenna_stats *as_alt = &sc->debug.stats.ant_stats[ANT_ALT];
  247. as_main->lna_attempt_cnt[div_ant_conf->main_lna_conf]++;
  248. as_alt->lna_attempt_cnt[div_ant_conf->alt_lna_conf]++;
  249. as_main->rssi_avg = main_rssi_avg;
  250. as_alt->rssi_avg = alt_rssi_avg;
  251. }
  252. static ssize_t read_file_antenna_diversity(struct file *file,
  253. char __user *user_buf,
  254. size_t count, loff_t *ppos)
  255. {
  256. struct ath_softc *sc = file->private_data;
  257. struct ath_hw *ah = sc->sc_ah;
  258. struct ath9k_hw_capabilities *pCap = &ah->caps;
  259. struct ath_antenna_stats *as_main = &sc->debug.stats.ant_stats[ANT_MAIN];
  260. struct ath_antenna_stats *as_alt = &sc->debug.stats.ant_stats[ANT_ALT];
  261. struct ath_hw_antcomb_conf div_ant_conf;
  262. unsigned int len = 0;
  263. const unsigned int size = 1024;
  264. ssize_t retval = 0;
  265. char *buf;
  266. static const char *lna_conf_str[4] = {
  267. "LNA1_MINUS_LNA2", "LNA2", "LNA1", "LNA1_PLUS_LNA2"
  268. };
  269. buf = kzalloc(size, GFP_KERNEL);
  270. if (buf == NULL)
  271. return -ENOMEM;
  272. if (!(pCap->hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB)) {
  273. len += scnprintf(buf + len, size - len, "%s\n",
  274. "Antenna Diversity Combining is disabled");
  275. goto exit;
  276. }
  277. ath9k_ps_wakeup(sc);
  278. ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf);
  279. len += scnprintf(buf + len, size - len, "Current MAIN config : %s\n",
  280. lna_conf_str[div_ant_conf.main_lna_conf]);
  281. len += scnprintf(buf + len, size - len, "Current ALT config : %s\n",
  282. lna_conf_str[div_ant_conf.alt_lna_conf]);
  283. len += scnprintf(buf + len, size - len, "Average MAIN RSSI : %d\n",
  284. as_main->rssi_avg);
  285. len += scnprintf(buf + len, size - len, "Average ALT RSSI : %d\n\n",
  286. as_alt->rssi_avg);
  287. ath9k_ps_restore(sc);
  288. len += scnprintf(buf + len, size - len, "Packet Receive Cnt:\n");
  289. len += scnprintf(buf + len, size - len, "-------------------\n");
  290. len += scnprintf(buf + len, size - len, "%30s%15s\n",
  291. "MAIN", "ALT");
  292. len += scnprintf(buf + len, size - len, "%-14s:%15d%15d\n",
  293. "TOTAL COUNT",
  294. as_main->recv_cnt,
  295. as_alt->recv_cnt);
  296. len += scnprintf(buf + len, size - len, "%-14s:%15d%15d\n",
  297. "LNA1",
  298. as_main->lna_recv_cnt[ATH_ANT_DIV_COMB_LNA1],
  299. as_alt->lna_recv_cnt[ATH_ANT_DIV_COMB_LNA1]);
  300. len += scnprintf(buf + len, size - len, "%-14s:%15d%15d\n",
  301. "LNA2",
  302. as_main->lna_recv_cnt[ATH_ANT_DIV_COMB_LNA2],
  303. as_alt->lna_recv_cnt[ATH_ANT_DIV_COMB_LNA2]);
  304. len += scnprintf(buf + len, size - len, "%-14s:%15d%15d\n",
  305. "LNA1 + LNA2",
  306. as_main->lna_recv_cnt[ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2],
  307. as_alt->lna_recv_cnt[ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2]);
  308. len += scnprintf(buf + len, size - len, "%-14s:%15d%15d\n",
  309. "LNA1 - LNA2",
  310. as_main->lna_recv_cnt[ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2],
  311. as_alt->lna_recv_cnt[ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2]);
  312. len += scnprintf(buf + len, size - len, "\nLNA Config Attempts:\n");
  313. len += scnprintf(buf + len, size - len, "--------------------\n");
  314. len += scnprintf(buf + len, size - len, "%30s%15s\n",
  315. "MAIN", "ALT");
  316. len += scnprintf(buf + len, size - len, "%-14s:%15d%15d\n",
  317. "LNA1",
  318. as_main->lna_attempt_cnt[ATH_ANT_DIV_COMB_LNA1],
  319. as_alt->lna_attempt_cnt[ATH_ANT_DIV_COMB_LNA1]);
  320. len += scnprintf(buf + len, size - len, "%-14s:%15d%15d\n",
  321. "LNA2",
  322. as_main->lna_attempt_cnt[ATH_ANT_DIV_COMB_LNA2],
  323. as_alt->lna_attempt_cnt[ATH_ANT_DIV_COMB_LNA2]);
  324. len += scnprintf(buf + len, size - len, "%-14s:%15d%15d\n",
  325. "LNA1 + LNA2",
  326. as_main->lna_attempt_cnt[ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2],
  327. as_alt->lna_attempt_cnt[ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2]);
  328. len += scnprintf(buf + len, size - len, "%-14s:%15d%15d\n",
  329. "LNA1 - LNA2",
  330. as_main->lna_attempt_cnt[ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2],
  331. as_alt->lna_attempt_cnt[ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2]);
  332. exit:
  333. if (len > size)
  334. len = size;
  335. retval = simple_read_from_buffer(user_buf, count, ppos, buf, len);
  336. kfree(buf);
  337. return retval;
  338. }
  339. static const struct file_operations fops_antenna_diversity = {
  340. .read = read_file_antenna_diversity,
  341. .open = simple_open,
  342. .owner = THIS_MODULE,
  343. .llseek = default_llseek,
  344. };
  345. static int read_file_dma(struct seq_file *file, void *data)
  346. {
  347. struct ieee80211_hw *hw = dev_get_drvdata(file->private);
  348. struct ath_softc *sc = hw->priv;
  349. struct ath_hw *ah = sc->sc_ah;
  350. u32 val[ATH9K_NUM_DMA_DEBUG_REGS];
  351. int i, qcuOffset = 0, dcuOffset = 0;
  352. u32 *qcuBase = &val[0], *dcuBase = &val[4];
  353. ath9k_ps_wakeup(sc);
  354. REG_WRITE_D(ah, AR_MACMISC,
  355. ((AR_MACMISC_DMA_OBS_LINE_8 << AR_MACMISC_DMA_OBS_S) |
  356. (AR_MACMISC_MISC_OBS_BUS_1 <<
  357. AR_MACMISC_MISC_OBS_BUS_MSB_S)));
  358. seq_puts(file, "Raw DMA Debug values:\n");
  359. for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++) {
  360. if (i % 4 == 0)
  361. seq_puts(file, "\n");
  362. val[i] = REG_READ_D(ah, AR_DMADBG_0 + (i * sizeof(u32)));
  363. seq_printf(file, "%d: %08x ", i, val[i]);
  364. }
  365. seq_puts(file, "\n\n");
  366. seq_puts(file, "Num QCU: chain_st fsp_ok fsp_st DCU: chain_st\n");
  367. for (i = 0; i < ATH9K_NUM_QUEUES; i++, qcuOffset += 4, dcuOffset += 5) {
  368. if (i == 8) {
  369. qcuOffset = 0;
  370. qcuBase++;
  371. }
  372. if (i == 6) {
  373. dcuOffset = 0;
  374. dcuBase++;
  375. }
  376. seq_printf(file, "%2d %2x %1x %2x %2x\n",
  377. i, (*qcuBase & (0x7 << qcuOffset)) >> qcuOffset,
  378. (*qcuBase & (0x8 << qcuOffset)) >> (qcuOffset + 3),
  379. (val[2] & (0x7 << (i * 3))) >> (i * 3),
  380. (*dcuBase & (0x1f << dcuOffset)) >> dcuOffset);
  381. }
  382. seq_puts(file, "\n");
  383. seq_printf(file, "qcu_stitch state: %2x qcu_fetch state: %2x\n",
  384. (val[3] & 0x003c0000) >> 18, (val[3] & 0x03c00000) >> 22);
  385. seq_printf(file, "qcu_complete state: %2x dcu_complete state: %2x\n",
  386. (val[3] & 0x1c000000) >> 26, (val[6] & 0x3));
  387. seq_printf(file, "dcu_arb state: %2x dcu_fp state: %2x\n",
  388. (val[5] & 0x06000000) >> 25, (val[5] & 0x38000000) >> 27);
  389. seq_printf(file, "chan_idle_dur: %3d chan_idle_dur_valid: %1d\n",
  390. (val[6] & 0x000003fc) >> 2, (val[6] & 0x00000400) >> 10);
  391. seq_printf(file, "txfifo_valid_0: %1d txfifo_valid_1: %1d\n",
  392. (val[6] & 0x00000800) >> 11, (val[6] & 0x00001000) >> 12);
  393. seq_printf(file, "txfifo_dcu_num_0: %2d txfifo_dcu_num_1: %2d\n",
  394. (val[6] & 0x0001e000) >> 13, (val[6] & 0x001e0000) >> 17);
  395. seq_printf(file, "pcu observe: 0x%x\n", REG_READ_D(ah, AR_OBS_BUS_1));
  396. seq_printf(file, "AR_CR: 0x%x\n", REG_READ_D(ah, AR_CR));
  397. ath9k_ps_restore(sc);
  398. return 0;
  399. }
  400. void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status)
  401. {
  402. if (status)
  403. sc->debug.stats.istats.total++;
  404. if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  405. if (status & ATH9K_INT_RXLP)
  406. sc->debug.stats.istats.rxlp++;
  407. if (status & ATH9K_INT_RXHP)
  408. sc->debug.stats.istats.rxhp++;
  409. if (status & ATH9K_INT_BB_WATCHDOG)
  410. sc->debug.stats.istats.bb_watchdog++;
  411. } else {
  412. if (status & ATH9K_INT_RX)
  413. sc->debug.stats.istats.rxok++;
  414. }
  415. if (status & ATH9K_INT_RXEOL)
  416. sc->debug.stats.istats.rxeol++;
  417. if (status & ATH9K_INT_RXORN)
  418. sc->debug.stats.istats.rxorn++;
  419. if (status & ATH9K_INT_TX)
  420. sc->debug.stats.istats.txok++;
  421. if (status & ATH9K_INT_TXURN)
  422. sc->debug.stats.istats.txurn++;
  423. if (status & ATH9K_INT_RXPHY)
  424. sc->debug.stats.istats.rxphyerr++;
  425. if (status & ATH9K_INT_RXKCM)
  426. sc->debug.stats.istats.rx_keycache_miss++;
  427. if (status & ATH9K_INT_SWBA)
  428. sc->debug.stats.istats.swba++;
  429. if (status & ATH9K_INT_BMISS)
  430. sc->debug.stats.istats.bmiss++;
  431. if (status & ATH9K_INT_BNR)
  432. sc->debug.stats.istats.bnr++;
  433. if (status & ATH9K_INT_CST)
  434. sc->debug.stats.istats.cst++;
  435. if (status & ATH9K_INT_GTT)
  436. sc->debug.stats.istats.gtt++;
  437. if (status & ATH9K_INT_TIM)
  438. sc->debug.stats.istats.tim++;
  439. if (status & ATH9K_INT_CABEND)
  440. sc->debug.stats.istats.cabend++;
  441. if (status & ATH9K_INT_DTIMSYNC)
  442. sc->debug.stats.istats.dtimsync++;
  443. if (status & ATH9K_INT_DTIM)
  444. sc->debug.stats.istats.dtim++;
  445. if (status & ATH9K_INT_TSFOOR)
  446. sc->debug.stats.istats.tsfoor++;
  447. if (status & ATH9K_INT_MCI)
  448. sc->debug.stats.istats.mci++;
  449. if (status & ATH9K_INT_GENTIMER)
  450. sc->debug.stats.istats.gen_timer++;
  451. }
  452. static int read_file_interrupt(struct seq_file *file, void *data)
  453. {
  454. struct ieee80211_hw *hw = dev_get_drvdata(file->private);
  455. struct ath_softc *sc = hw->priv;
  456. #define PR_IS(a, s) \
  457. do { \
  458. seq_printf(file, "%21s: %10u\n", a, \
  459. sc->debug.stats.istats.s); \
  460. } while (0)
  461. if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  462. PR_IS("RXLP", rxlp);
  463. PR_IS("RXHP", rxhp);
  464. PR_IS("WATHDOG", bb_watchdog);
  465. } else {
  466. PR_IS("RX", rxok);
  467. }
  468. PR_IS("RXEOL", rxeol);
  469. PR_IS("RXORN", rxorn);
  470. PR_IS("TX", txok);
  471. PR_IS("TXURN", txurn);
  472. PR_IS("MIB", mib);
  473. PR_IS("RXPHY", rxphyerr);
  474. PR_IS("RXKCM", rx_keycache_miss);
  475. PR_IS("SWBA", swba);
  476. PR_IS("BMISS", bmiss);
  477. PR_IS("BNR", bnr);
  478. PR_IS("CST", cst);
  479. PR_IS("GTT", gtt);
  480. PR_IS("TIM", tim);
  481. PR_IS("CABEND", cabend);
  482. PR_IS("DTIMSYNC", dtimsync);
  483. PR_IS("DTIM", dtim);
  484. PR_IS("TSFOOR", tsfoor);
  485. PR_IS("MCI", mci);
  486. PR_IS("GENTIMER", gen_timer);
  487. PR_IS("TOTAL", total);
  488. seq_puts(file, "SYNC_CAUSE stats:\n");
  489. PR_IS("Sync-All", sync_cause_all);
  490. PR_IS("RTC-IRQ", sync_rtc_irq);
  491. PR_IS("MAC-IRQ", sync_mac_irq);
  492. PR_IS("EEPROM-Illegal-Access", eeprom_illegal_access);
  493. PR_IS("APB-Timeout", apb_timeout);
  494. PR_IS("PCI-Mode-Conflict", pci_mode_conflict);
  495. PR_IS("HOST1-Fatal", host1_fatal);
  496. PR_IS("HOST1-Perr", host1_perr);
  497. PR_IS("TRCV-FIFO-Perr", trcv_fifo_perr);
  498. PR_IS("RADM-CPL-EP", radm_cpl_ep);
  499. PR_IS("RADM-CPL-DLLP-Abort", radm_cpl_dllp_abort);
  500. PR_IS("RADM-CPL-TLP-Abort", radm_cpl_tlp_abort);
  501. PR_IS("RADM-CPL-ECRC-Err", radm_cpl_ecrc_err);
  502. PR_IS("RADM-CPL-Timeout", radm_cpl_timeout);
  503. PR_IS("Local-Bus-Timeout", local_timeout);
  504. PR_IS("PM-Access", pm_access);
  505. PR_IS("MAC-Awake", mac_awake);
  506. PR_IS("MAC-Asleep", mac_asleep);
  507. PR_IS("MAC-Sleep-Access", mac_sleep_access);
  508. return 0;
  509. }
  510. static int read_file_xmit(struct seq_file *file, void *data)
  511. {
  512. struct ieee80211_hw *hw = dev_get_drvdata(file->private);
  513. struct ath_softc *sc = hw->priv;
  514. seq_printf(file, "%30s %10s%10s%10s\n\n", "BE", "BK", "VI", "VO");
  515. PR("MPDUs Queued: ", queued);
  516. PR("MPDUs Completed: ", completed);
  517. PR("MPDUs XRetried: ", xretries);
  518. PR("Aggregates: ", a_aggr);
  519. PR("AMPDUs Queued HW:", a_queued_hw);
  520. PR("AMPDUs Queued SW:", a_queued_sw);
  521. PR("AMPDUs Completed:", a_completed);
  522. PR("AMPDUs Retried: ", a_retries);
  523. PR("AMPDUs XRetried: ", a_xretries);
  524. PR("TXERR Filtered: ", txerr_filtered);
  525. PR("FIFO Underrun: ", fifo_underrun);
  526. PR("TXOP Exceeded: ", xtxop);
  527. PR("TXTIMER Expiry: ", timer_exp);
  528. PR("DESC CFG Error: ", desc_cfg_err);
  529. PR("DATA Underrun: ", data_underrun);
  530. PR("DELIM Underrun: ", delim_underrun);
  531. PR("TX-Pkts-All: ", tx_pkts_all);
  532. PR("TX-Bytes-All: ", tx_bytes_all);
  533. PR("HW-put-tx-buf: ", puttxbuf);
  534. PR("HW-tx-start: ", txstart);
  535. PR("HW-tx-proc-desc: ", txprocdesc);
  536. PR("TX-Failed: ", txfailed);
  537. return 0;
  538. }
  539. static void print_queue(struct ath_softc *sc, struct ath_txq *txq,
  540. struct seq_file *file)
  541. {
  542. ath_txq_lock(sc, txq);
  543. seq_printf(file, "%s: %d ", "qnum", txq->axq_qnum);
  544. seq_printf(file, "%s: %2d ", "qdepth", txq->axq_depth);
  545. seq_printf(file, "%s: %2d ", "ampdu-depth", txq->axq_ampdu_depth);
  546. seq_printf(file, "%s: %3d ", "pending", txq->pending_frames);
  547. seq_printf(file, "%s: %d\n", "stopped", txq->stopped);
  548. ath_txq_unlock(sc, txq);
  549. }
  550. static int read_file_queues(struct seq_file *file, void *data)
  551. {
  552. struct ieee80211_hw *hw = dev_get_drvdata(file->private);
  553. struct ath_softc *sc = hw->priv;
  554. struct ath_txq *txq;
  555. int i;
  556. static const char *qname[4] = {
  557. "VO", "VI", "BE", "BK"
  558. };
  559. for (i = 0; i < IEEE80211_NUM_ACS; i++) {
  560. txq = sc->tx.txq_map[i];
  561. seq_printf(file, "(%s): ", qname[i]);
  562. print_queue(sc, txq, file);
  563. }
  564. seq_puts(file, "(CAB): ");
  565. print_queue(sc, sc->beacon.cabq, file);
  566. return 0;
  567. }
  568. static int read_file_misc(struct seq_file *file, void *data)
  569. {
  570. struct ieee80211_hw *hw = dev_get_drvdata(file->private);
  571. struct ath_softc *sc = hw->priv;
  572. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  573. struct ath9k_vif_iter_data iter_data;
  574. struct ath_chanctx *ctx;
  575. unsigned int reg;
  576. u32 rxfilter, i;
  577. seq_printf(file, "BSSID: %pM\n", common->curbssid);
  578. seq_printf(file, "BSSID-MASK: %pM\n", common->bssidmask);
  579. seq_printf(file, "OPMODE: %s\n",
  580. ath_opmode_to_string(sc->sc_ah->opmode));
  581. ath9k_ps_wakeup(sc);
  582. rxfilter = ath9k_hw_getrxfilter(sc->sc_ah);
  583. ath9k_ps_restore(sc);
  584. seq_printf(file, "RXFILTER: 0x%x", rxfilter);
  585. if (rxfilter & ATH9K_RX_FILTER_UCAST)
  586. seq_puts(file, " UCAST");
  587. if (rxfilter & ATH9K_RX_FILTER_MCAST)
  588. seq_puts(file, " MCAST");
  589. if (rxfilter & ATH9K_RX_FILTER_BCAST)
  590. seq_puts(file, " BCAST");
  591. if (rxfilter & ATH9K_RX_FILTER_CONTROL)
  592. seq_puts(file, " CONTROL");
  593. if (rxfilter & ATH9K_RX_FILTER_BEACON)
  594. seq_puts(file, " BEACON");
  595. if (rxfilter & ATH9K_RX_FILTER_PROM)
  596. seq_puts(file, " PROM");
  597. if (rxfilter & ATH9K_RX_FILTER_PROBEREQ)
  598. seq_puts(file, " PROBEREQ");
  599. if (rxfilter & ATH9K_RX_FILTER_PHYERR)
  600. seq_puts(file, " PHYERR");
  601. if (rxfilter & ATH9K_RX_FILTER_MYBEACON)
  602. seq_puts(file, " MYBEACON");
  603. if (rxfilter & ATH9K_RX_FILTER_COMP_BAR)
  604. seq_puts(file, " COMP_BAR");
  605. if (rxfilter & ATH9K_RX_FILTER_PSPOLL)
  606. seq_puts(file, " PSPOLL");
  607. if (rxfilter & ATH9K_RX_FILTER_PHYRADAR)
  608. seq_puts(file, " PHYRADAR");
  609. if (rxfilter & ATH9K_RX_FILTER_MCAST_BCAST_ALL)
  610. seq_puts(file, " MCAST_BCAST_ALL");
  611. if (rxfilter & ATH9K_RX_FILTER_CONTROL_WRAPPER)
  612. seq_puts(file, " CONTROL_WRAPPER");
  613. seq_puts(file, "\n");
  614. reg = sc->sc_ah->imask;
  615. seq_printf(file, "INTERRUPT-MASK: 0x%x", reg);
  616. if (reg & ATH9K_INT_SWBA)
  617. seq_puts(file, " SWBA");
  618. if (reg & ATH9K_INT_BMISS)
  619. seq_puts(file, " BMISS");
  620. if (reg & ATH9K_INT_CST)
  621. seq_puts(file, " CST");
  622. if (reg & ATH9K_INT_RX)
  623. seq_puts(file, " RX");
  624. if (reg & ATH9K_INT_RXHP)
  625. seq_puts(file, " RXHP");
  626. if (reg & ATH9K_INT_RXLP)
  627. seq_puts(file, " RXLP");
  628. if (reg & ATH9K_INT_BB_WATCHDOG)
  629. seq_puts(file, " BB_WATCHDOG");
  630. seq_puts(file, "\n");
  631. i = 0;
  632. ath_for_each_chanctx(sc, ctx) {
  633. if (list_empty(&ctx->vifs))
  634. continue;
  635. ath9k_calculate_iter_data(sc, ctx, &iter_data);
  636. seq_printf(file,
  637. "VIFS: CTX %i(%i) AP: %i STA: %i MESH: %i WDS: %i",
  638. i++, (int)(ctx->assigned), iter_data.naps,
  639. iter_data.nstations,
  640. iter_data.nmeshes, iter_data.nwds);
  641. seq_printf(file, " ADHOC: %i OCB: %i TOTAL: %hi BEACON-VIF: %hi\n",
  642. iter_data.nadhocs, iter_data.nocbs, sc->cur_chan->nvifs,
  643. sc->nbcnvifs);
  644. }
  645. return 0;
  646. }
  647. static int read_file_reset(struct seq_file *file, void *data)
  648. {
  649. struct ieee80211_hw *hw = dev_get_drvdata(file->private);
  650. struct ath_softc *sc = hw->priv;
  651. static const char * const reset_cause[__RESET_TYPE_MAX] = {
  652. [RESET_TYPE_BB_HANG] = "Baseband Hang",
  653. [RESET_TYPE_BB_WATCHDOG] = "Baseband Watchdog",
  654. [RESET_TYPE_FATAL_INT] = "Fatal HW Error",
  655. [RESET_TYPE_TX_ERROR] = "TX HW error",
  656. [RESET_TYPE_TX_GTT] = "Transmit timeout",
  657. [RESET_TYPE_TX_HANG] = "TX Path Hang",
  658. [RESET_TYPE_PLL_HANG] = "PLL RX Hang",
  659. [RESET_TYPE_MAC_HANG] = "MAC Hang",
  660. [RESET_TYPE_BEACON_STUCK] = "Stuck Beacon",
  661. [RESET_TYPE_MCI] = "MCI Reset",
  662. [RESET_TYPE_CALIBRATION] = "Calibration error",
  663. [RESET_TX_DMA_ERROR] = "Tx DMA stop error",
  664. [RESET_RX_DMA_ERROR] = "Rx DMA stop error",
  665. };
  666. int i;
  667. for (i = 0; i < ARRAY_SIZE(reset_cause); i++) {
  668. if (!reset_cause[i])
  669. continue;
  670. seq_printf(file, "%17s: %2d\n", reset_cause[i],
  671. sc->debug.stats.reset[i]);
  672. }
  673. return 0;
  674. }
  675. void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf,
  676. struct ath_tx_status *ts, struct ath_txq *txq,
  677. unsigned int flags)
  678. {
  679. int qnum = txq->axq_qnum;
  680. TX_STAT_INC(qnum, tx_pkts_all);
  681. sc->debug.stats.txstats[qnum].tx_bytes_all += bf->bf_mpdu->len;
  682. if (bf_isampdu(bf)) {
  683. if (flags & ATH_TX_ERROR)
  684. TX_STAT_INC(qnum, a_xretries);
  685. else
  686. TX_STAT_INC(qnum, a_completed);
  687. } else {
  688. if (ts->ts_status & ATH9K_TXERR_XRETRY)
  689. TX_STAT_INC(qnum, xretries);
  690. else
  691. TX_STAT_INC(qnum, completed);
  692. }
  693. if (ts->ts_status & ATH9K_TXERR_FILT)
  694. TX_STAT_INC(qnum, txerr_filtered);
  695. if (ts->ts_status & ATH9K_TXERR_FIFO)
  696. TX_STAT_INC(qnum, fifo_underrun);
  697. if (ts->ts_status & ATH9K_TXERR_XTXOP)
  698. TX_STAT_INC(qnum, xtxop);
  699. if (ts->ts_status & ATH9K_TXERR_TIMER_EXPIRED)
  700. TX_STAT_INC(qnum, timer_exp);
  701. if (ts->ts_flags & ATH9K_TX_DESC_CFG_ERR)
  702. TX_STAT_INC(qnum, desc_cfg_err);
  703. if (ts->ts_flags & ATH9K_TX_DATA_UNDERRUN)
  704. TX_STAT_INC(qnum, data_underrun);
  705. if (ts->ts_flags & ATH9K_TX_DELIM_UNDERRUN)
  706. TX_STAT_INC(qnum, delim_underrun);
  707. }
  708. void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs)
  709. {
  710. ath9k_cmn_debug_stat_rx(&sc->debug.stats.rxstats, rs);
  711. }
  712. static ssize_t read_file_regidx(struct file *file, char __user *user_buf,
  713. size_t count, loff_t *ppos)
  714. {
  715. struct ath_softc *sc = file->private_data;
  716. char buf[32];
  717. unsigned int len;
  718. len = sprintf(buf, "0x%08x\n", sc->debug.regidx);
  719. return simple_read_from_buffer(user_buf, count, ppos, buf, len);
  720. }
  721. static ssize_t write_file_regidx(struct file *file, const char __user *user_buf,
  722. size_t count, loff_t *ppos)
  723. {
  724. struct ath_softc *sc = file->private_data;
  725. unsigned long regidx;
  726. char buf[32];
  727. ssize_t len;
  728. len = min(count, sizeof(buf) - 1);
  729. if (copy_from_user(buf, user_buf, len))
  730. return -EFAULT;
  731. buf[len] = '\0';
  732. if (kstrtoul(buf, 0, &regidx))
  733. return -EINVAL;
  734. sc->debug.regidx = regidx;
  735. return count;
  736. }
  737. static const struct file_operations fops_regidx = {
  738. .read = read_file_regidx,
  739. .write = write_file_regidx,
  740. .open = simple_open,
  741. .owner = THIS_MODULE,
  742. .llseek = default_llseek,
  743. };
  744. static ssize_t read_file_regval(struct file *file, char __user *user_buf,
  745. size_t count, loff_t *ppos)
  746. {
  747. struct ath_softc *sc = file->private_data;
  748. struct ath_hw *ah = sc->sc_ah;
  749. char buf[32];
  750. unsigned int len;
  751. u32 regval;
  752. ath9k_ps_wakeup(sc);
  753. regval = REG_READ_D(ah, sc->debug.regidx);
  754. ath9k_ps_restore(sc);
  755. len = sprintf(buf, "0x%08x\n", regval);
  756. return simple_read_from_buffer(user_buf, count, ppos, buf, len);
  757. }
  758. static ssize_t write_file_regval(struct file *file, const char __user *user_buf,
  759. size_t count, loff_t *ppos)
  760. {
  761. struct ath_softc *sc = file->private_data;
  762. struct ath_hw *ah = sc->sc_ah;
  763. unsigned long regval;
  764. char buf[32];
  765. ssize_t len;
  766. len = min(count, sizeof(buf) - 1);
  767. if (copy_from_user(buf, user_buf, len))
  768. return -EFAULT;
  769. buf[len] = '\0';
  770. if (kstrtoul(buf, 0, &regval))
  771. return -EINVAL;
  772. ath9k_ps_wakeup(sc);
  773. REG_WRITE_D(ah, sc->debug.regidx, regval);
  774. ath9k_ps_restore(sc);
  775. return count;
  776. }
  777. static const struct file_operations fops_regval = {
  778. .read = read_file_regval,
  779. .write = write_file_regval,
  780. .open = simple_open,
  781. .owner = THIS_MODULE,
  782. .llseek = default_llseek,
  783. };
  784. #define REGDUMP_LINE_SIZE 20
  785. static int open_file_regdump(struct inode *inode, struct file *file)
  786. {
  787. struct ath_softc *sc = inode->i_private;
  788. unsigned int len = 0;
  789. u8 *buf;
  790. int i, j = 0;
  791. unsigned long num_regs, regdump_len, max_reg_offset;
  792. const struct reg_hole {
  793. u32 start;
  794. u32 end;
  795. } reg_hole_list[] = {
  796. {0x0200, 0x07fc},
  797. {0x0c00, 0x0ffc},
  798. {0x2000, 0x3ffc},
  799. {0x4100, 0x6ffc},
  800. {0x705c, 0x7ffc},
  801. {0x0000, 0x0000}
  802. };
  803. max_reg_offset = AR_SREV_9300_20_OR_LATER(sc->sc_ah) ? 0x8800 : 0xb500;
  804. num_regs = max_reg_offset / 4 + 1;
  805. regdump_len = num_regs * REGDUMP_LINE_SIZE + 1;
  806. buf = vmalloc(regdump_len);
  807. if (!buf)
  808. return -ENOMEM;
  809. ath9k_ps_wakeup(sc);
  810. for (i = 0; i < num_regs; i++) {
  811. if (reg_hole_list[j].start == i << 2) {
  812. i = reg_hole_list[j].end >> 2;
  813. j++;
  814. continue;
  815. }
  816. len += scnprintf(buf + len, regdump_len - len,
  817. "0x%06x 0x%08x\n", i << 2, REG_READ(sc->sc_ah, i << 2));
  818. }
  819. ath9k_ps_restore(sc);
  820. file->private_data = buf;
  821. return 0;
  822. }
  823. static const struct file_operations fops_regdump = {
  824. .open = open_file_regdump,
  825. .read = ath9k_debugfs_read_buf,
  826. .release = ath9k_debugfs_release_buf,
  827. .owner = THIS_MODULE,
  828. .llseek = default_llseek,/* read accesses f_pos */
  829. };
  830. static int read_file_dump_nfcal(struct seq_file *file, void *data)
  831. {
  832. struct ieee80211_hw *hw = dev_get_drvdata(file->private);
  833. struct ath_softc *sc = hw->priv;
  834. struct ath_hw *ah = sc->sc_ah;
  835. struct ath9k_nfcal_hist *h = sc->cur_chan->caldata.nfCalHist;
  836. struct ath_common *common = ath9k_hw_common(ah);
  837. struct ieee80211_conf *conf = &common->hw->conf;
  838. u32 i, j;
  839. u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
  840. u8 nread;
  841. seq_printf(file, "Channel Noise Floor : %d\n", ah->noise);
  842. seq_puts(file, "Chain | privNF | # Readings | NF Readings\n");
  843. for (i = 0; i < NUM_NF_READINGS; i++) {
  844. if (!(chainmask & (1 << i)) ||
  845. ((i >= AR5416_MAX_CHAINS) && !conf_is_ht40(conf)))
  846. continue;
  847. nread = AR_PHY_CCA_FILTERWINDOW_LENGTH - h[i].invalidNFcount;
  848. seq_printf(file, " %d\t %d\t %d\t\t", i, h[i].privNF, nread);
  849. for (j = 0; j < nread; j++)
  850. seq_printf(file, " %d", h[i].nfCalBuffer[j]);
  851. seq_puts(file, "\n");
  852. }
  853. return 0;
  854. }
  855. static int open_file_dump_nfcal(struct inode *inode, struct file *f)
  856. {
  857. return single_open(f, read_file_dump_nfcal, inode->i_private);
  858. }
  859. static const struct file_operations fops_dump_nfcal = {
  860. .read = seq_read,
  861. .open = open_file_dump_nfcal,
  862. .owner = THIS_MODULE,
  863. .llseek = seq_lseek,
  864. .release = single_release,
  865. };
  866. #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
  867. static ssize_t read_file_btcoex(struct file *file, char __user *user_buf,
  868. size_t count, loff_t *ppos)
  869. {
  870. struct ath_softc *sc = file->private_data;
  871. u32 len = 0, size = 1500;
  872. char *buf;
  873. size_t retval;
  874. buf = kzalloc(size, GFP_KERNEL);
  875. if (buf == NULL)
  876. return -ENOMEM;
  877. if (!sc->sc_ah->common.btcoex_enabled) {
  878. len = scnprintf(buf, size, "%s\n",
  879. "BTCOEX is disabled");
  880. goto exit;
  881. }
  882. len = ath9k_dump_btcoex(sc, buf, size);
  883. exit:
  884. retval = simple_read_from_buffer(user_buf, count, ppos, buf, len);
  885. kfree(buf);
  886. return retval;
  887. }
  888. static const struct file_operations fops_btcoex = {
  889. .read = read_file_btcoex,
  890. .open = simple_open,
  891. .owner = THIS_MODULE,
  892. .llseek = default_llseek,
  893. };
  894. #endif
  895. #ifdef CONFIG_ATH9K_DYNACK
  896. static ssize_t read_file_ackto(struct file *file, char __user *user_buf,
  897. size_t count, loff_t *ppos)
  898. {
  899. struct ath_softc *sc = file->private_data;
  900. struct ath_hw *ah = sc->sc_ah;
  901. char buf[32];
  902. unsigned int len;
  903. len = sprintf(buf, "%u %c\n", ah->dynack.ackto,
  904. (ah->dynack.enabled) ? 'A' : 'S');
  905. return simple_read_from_buffer(user_buf, count, ppos, buf, len);
  906. }
  907. static const struct file_operations fops_ackto = {
  908. .read = read_file_ackto,
  909. .open = simple_open,
  910. .owner = THIS_MODULE,
  911. .llseek = default_llseek,
  912. };
  913. #endif
  914. #ifdef CONFIG_ATH9K_WOW
  915. static ssize_t read_file_wow(struct file *file, char __user *user_buf,
  916. size_t count, loff_t *ppos)
  917. {
  918. struct ath_softc *sc = file->private_data;
  919. unsigned int len = 0, size = 32;
  920. ssize_t retval;
  921. char *buf;
  922. buf = kzalloc(size, GFP_KERNEL);
  923. if (!buf)
  924. return -ENOMEM;
  925. len += scnprintf(buf + len, size - len, "WOW: %s\n",
  926. sc->force_wow ? "ENABLED" : "DISABLED");
  927. if (len > size)
  928. len = size;
  929. retval = simple_read_from_buffer(user_buf, count, ppos, buf, len);
  930. kfree(buf);
  931. return retval;
  932. }
  933. static ssize_t write_file_wow(struct file *file, const char __user *user_buf,
  934. size_t count, loff_t *ppos)
  935. {
  936. struct ath_softc *sc = file->private_data;
  937. unsigned long val;
  938. char buf[32];
  939. ssize_t len;
  940. len = min(count, sizeof(buf) - 1);
  941. if (copy_from_user(buf, user_buf, len))
  942. return -EFAULT;
  943. buf[len] = '\0';
  944. if (kstrtoul(buf, 0, &val))
  945. return -EINVAL;
  946. if (val != 1)
  947. return -EINVAL;
  948. if (!sc->force_wow) {
  949. sc->force_wow = true;
  950. ath9k_init_wow(sc->hw);
  951. }
  952. return count;
  953. }
  954. static const struct file_operations fops_wow = {
  955. .read = read_file_wow,
  956. .write = write_file_wow,
  957. .open = simple_open,
  958. .owner = THIS_MODULE,
  959. .llseek = default_llseek,
  960. };
  961. #endif
  962. static ssize_t read_file_tpc(struct file *file, char __user *user_buf,
  963. size_t count, loff_t *ppos)
  964. {
  965. struct ath_softc *sc = file->private_data;
  966. struct ath_hw *ah = sc->sc_ah;
  967. unsigned int len = 0, size = 32;
  968. ssize_t retval;
  969. char *buf;
  970. buf = kzalloc(size, GFP_KERNEL);
  971. if (!buf)
  972. return -ENOMEM;
  973. len += scnprintf(buf + len, size - len, "%s\n",
  974. ah->tpc_enabled ? "ENABLED" : "DISABLED");
  975. if (len > size)
  976. len = size;
  977. retval = simple_read_from_buffer(user_buf, count, ppos, buf, len);
  978. kfree(buf);
  979. return retval;
  980. }
  981. static ssize_t write_file_tpc(struct file *file, const char __user *user_buf,
  982. size_t count, loff_t *ppos)
  983. {
  984. struct ath_softc *sc = file->private_data;
  985. struct ath_hw *ah = sc->sc_ah;
  986. unsigned long val;
  987. char buf[32];
  988. ssize_t len;
  989. bool tpc_enabled;
  990. len = min(count, sizeof(buf) - 1);
  991. if (copy_from_user(buf, user_buf, len))
  992. return -EFAULT;
  993. buf[len] = '\0';
  994. if (kstrtoul(buf, 0, &val))
  995. return -EINVAL;
  996. if (val < 0 || val > 1)
  997. return -EINVAL;
  998. tpc_enabled = !!val;
  999. if (tpc_enabled != ah->tpc_enabled) {
  1000. ah->tpc_enabled = tpc_enabled;
  1001. mutex_lock(&sc->mutex);
  1002. ath9k_set_txpower(sc, NULL);
  1003. mutex_unlock(&sc->mutex);
  1004. }
  1005. return count;
  1006. }
  1007. static const struct file_operations fops_tpc = {
  1008. .read = read_file_tpc,
  1009. .write = write_file_tpc,
  1010. .open = simple_open,
  1011. .owner = THIS_MODULE,
  1012. .llseek = default_llseek,
  1013. };
  1014. /* Ethtool support for get-stats */
  1015. #define AMKSTR(nm) #nm "_BE", #nm "_BK", #nm "_VI", #nm "_VO"
  1016. static const char ath9k_gstrings_stats[][ETH_GSTRING_LEN] = {
  1017. "tx_pkts_nic",
  1018. "tx_bytes_nic",
  1019. "rx_pkts_nic",
  1020. "rx_bytes_nic",
  1021. AMKSTR(d_tx_pkts),
  1022. AMKSTR(d_tx_bytes),
  1023. AMKSTR(d_tx_mpdus_queued),
  1024. AMKSTR(d_tx_mpdus_completed),
  1025. AMKSTR(d_tx_mpdu_xretries),
  1026. AMKSTR(d_tx_aggregates),
  1027. AMKSTR(d_tx_ampdus_queued_hw),
  1028. AMKSTR(d_tx_ampdus_queued_sw),
  1029. AMKSTR(d_tx_ampdus_completed),
  1030. AMKSTR(d_tx_ampdu_retries),
  1031. AMKSTR(d_tx_ampdu_xretries),
  1032. AMKSTR(d_tx_fifo_underrun),
  1033. AMKSTR(d_tx_op_exceeded),
  1034. AMKSTR(d_tx_timer_expiry),
  1035. AMKSTR(d_tx_desc_cfg_err),
  1036. AMKSTR(d_tx_data_underrun),
  1037. AMKSTR(d_tx_delim_underrun),
  1038. "d_rx_crc_err",
  1039. "d_rx_decrypt_crc_err",
  1040. "d_rx_phy_err",
  1041. "d_rx_mic_err",
  1042. "d_rx_pre_delim_crc_err",
  1043. "d_rx_post_delim_crc_err",
  1044. "d_rx_decrypt_busy_err",
  1045. "d_rx_phyerr_radar",
  1046. "d_rx_phyerr_ofdm_timing",
  1047. "d_rx_phyerr_cck_timing",
  1048. };
  1049. #define ATH9K_SSTATS_LEN ARRAY_SIZE(ath9k_gstrings_stats)
  1050. void ath9k_get_et_strings(struct ieee80211_hw *hw,
  1051. struct ieee80211_vif *vif,
  1052. u32 sset, u8 *data)
  1053. {
  1054. if (sset == ETH_SS_STATS)
  1055. memcpy(data, *ath9k_gstrings_stats,
  1056. sizeof(ath9k_gstrings_stats));
  1057. }
  1058. int ath9k_get_et_sset_count(struct ieee80211_hw *hw,
  1059. struct ieee80211_vif *vif, int sset)
  1060. {
  1061. if (sset == ETH_SS_STATS)
  1062. return ATH9K_SSTATS_LEN;
  1063. return 0;
  1064. }
  1065. #define AWDATA(elem) \
  1066. do { \
  1067. data[i++] = sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_BE)].elem; \
  1068. data[i++] = sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_BK)].elem; \
  1069. data[i++] = sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_VI)].elem; \
  1070. data[i++] = sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_VO)].elem; \
  1071. } while (0)
  1072. #define AWDATA_RX(elem) \
  1073. do { \
  1074. data[i++] = sc->debug.stats.rxstats.elem; \
  1075. } while (0)
  1076. void ath9k_get_et_stats(struct ieee80211_hw *hw,
  1077. struct ieee80211_vif *vif,
  1078. struct ethtool_stats *stats, u64 *data)
  1079. {
  1080. struct ath_softc *sc = hw->priv;
  1081. int i = 0;
  1082. data[i++] = (sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_BE)].tx_pkts_all +
  1083. sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_BK)].tx_pkts_all +
  1084. sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_VI)].tx_pkts_all +
  1085. sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_VO)].tx_pkts_all);
  1086. data[i++] = (sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_BE)].tx_bytes_all +
  1087. sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_BK)].tx_bytes_all +
  1088. sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_VI)].tx_bytes_all +
  1089. sc->debug.stats.txstats[PR_QNUM(IEEE80211_AC_VO)].tx_bytes_all);
  1090. AWDATA_RX(rx_pkts_all);
  1091. AWDATA_RX(rx_bytes_all);
  1092. AWDATA(tx_pkts_all);
  1093. AWDATA(tx_bytes_all);
  1094. AWDATA(queued);
  1095. AWDATA(completed);
  1096. AWDATA(xretries);
  1097. AWDATA(a_aggr);
  1098. AWDATA(a_queued_hw);
  1099. AWDATA(a_queued_sw);
  1100. AWDATA(a_completed);
  1101. AWDATA(a_retries);
  1102. AWDATA(a_xretries);
  1103. AWDATA(fifo_underrun);
  1104. AWDATA(xtxop);
  1105. AWDATA(timer_exp);
  1106. AWDATA(desc_cfg_err);
  1107. AWDATA(data_underrun);
  1108. AWDATA(delim_underrun);
  1109. AWDATA_RX(crc_err);
  1110. AWDATA_RX(decrypt_crc_err);
  1111. AWDATA_RX(phy_err);
  1112. AWDATA_RX(mic_err);
  1113. AWDATA_RX(pre_delim_crc_err);
  1114. AWDATA_RX(post_delim_crc_err);
  1115. AWDATA_RX(decrypt_busy_err);
  1116. AWDATA_RX(phy_err_stats[ATH9K_PHYERR_RADAR]);
  1117. AWDATA_RX(phy_err_stats[ATH9K_PHYERR_OFDM_TIMING]);
  1118. AWDATA_RX(phy_err_stats[ATH9K_PHYERR_CCK_TIMING]);
  1119. WARN_ON(i != ATH9K_SSTATS_LEN);
  1120. }
  1121. void ath9k_deinit_debug(struct ath_softc *sc)
  1122. {
  1123. ath9k_cmn_spectral_deinit_debug(&sc->spec_priv);
  1124. }
  1125. int ath9k_init_debug(struct ath_hw *ah)
  1126. {
  1127. struct ath_common *common = ath9k_hw_common(ah);
  1128. struct ath_softc *sc = (struct ath_softc *) common->priv;
  1129. sc->debug.debugfs_phy = debugfs_create_dir("ath9k",
  1130. sc->hw->wiphy->debugfsdir);
  1131. if (!sc->debug.debugfs_phy)
  1132. return -ENOMEM;
  1133. #ifdef CONFIG_ATH_DEBUG
  1134. debugfs_create_file("debug", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
  1135. sc, &fops_debug);
  1136. #endif
  1137. ath9k_dfs_init_debug(sc);
  1138. ath9k_tx99_init_debug(sc);
  1139. ath9k_cmn_spectral_init_debug(&sc->spec_priv, sc->debug.debugfs_phy);
  1140. debugfs_create_devm_seqfile(sc->dev, "dma", sc->debug.debugfs_phy,
  1141. read_file_dma);
  1142. debugfs_create_devm_seqfile(sc->dev, "interrupt", sc->debug.debugfs_phy,
  1143. read_file_interrupt);
  1144. debugfs_create_devm_seqfile(sc->dev, "xmit", sc->debug.debugfs_phy,
  1145. read_file_xmit);
  1146. debugfs_create_devm_seqfile(sc->dev, "queues", sc->debug.debugfs_phy,
  1147. read_file_queues);
  1148. debugfs_create_u32("qlen_bk", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
  1149. &sc->tx.txq_max_pending[IEEE80211_AC_BK]);
  1150. debugfs_create_u32("qlen_be", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
  1151. &sc->tx.txq_max_pending[IEEE80211_AC_BE]);
  1152. debugfs_create_u32("qlen_vi", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
  1153. &sc->tx.txq_max_pending[IEEE80211_AC_VI]);
  1154. debugfs_create_u32("qlen_vo", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
  1155. &sc->tx.txq_max_pending[IEEE80211_AC_VO]);
  1156. debugfs_create_devm_seqfile(sc->dev, "misc", sc->debug.debugfs_phy,
  1157. read_file_misc);
  1158. debugfs_create_devm_seqfile(sc->dev, "reset", sc->debug.debugfs_phy,
  1159. read_file_reset);
  1160. ath9k_cmn_debug_recv(sc->debug.debugfs_phy, &sc->debug.stats.rxstats);
  1161. ath9k_cmn_debug_phy_err(sc->debug.debugfs_phy, &sc->debug.stats.rxstats);
  1162. debugfs_create_u8("rx_chainmask", S_IRUSR, sc->debug.debugfs_phy,
  1163. &ah->rxchainmask);
  1164. debugfs_create_u8("tx_chainmask", S_IRUSR, sc->debug.debugfs_phy,
  1165. &ah->txchainmask);
  1166. debugfs_create_file("ani", S_IRUSR | S_IWUSR,
  1167. sc->debug.debugfs_phy, sc, &fops_ani);
  1168. debugfs_create_bool("paprd", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
  1169. &sc->sc_ah->config.enable_paprd);
  1170. debugfs_create_file("regidx", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
  1171. sc, &fops_regidx);
  1172. debugfs_create_file("regval", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
  1173. sc, &fops_regval);
  1174. debugfs_create_bool("ignore_extcca", S_IRUSR | S_IWUSR,
  1175. sc->debug.debugfs_phy,
  1176. &ah->config.cwm_ignore_extcca);
  1177. debugfs_create_file("regdump", S_IRUSR, sc->debug.debugfs_phy, sc,
  1178. &fops_regdump);
  1179. debugfs_create_devm_seqfile(sc->dev, "dump_nfcal",
  1180. sc->debug.debugfs_phy,
  1181. read_file_dump_nfcal);
  1182. ath9k_cmn_debug_base_eeprom(sc->debug.debugfs_phy, sc->sc_ah);
  1183. ath9k_cmn_debug_modal_eeprom(sc->debug.debugfs_phy, sc->sc_ah);
  1184. debugfs_create_u32("gpio_mask", S_IRUSR | S_IWUSR,
  1185. sc->debug.debugfs_phy, &sc->sc_ah->gpio_mask);
  1186. debugfs_create_u32("gpio_val", S_IRUSR | S_IWUSR,
  1187. sc->debug.debugfs_phy, &sc->sc_ah->gpio_val);
  1188. debugfs_create_file("antenna_diversity", S_IRUSR,
  1189. sc->debug.debugfs_phy, sc, &fops_antenna_diversity);
  1190. #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
  1191. debugfs_create_file("bt_ant_diversity", S_IRUSR | S_IWUSR,
  1192. sc->debug.debugfs_phy, sc, &fops_bt_ant_diversity);
  1193. debugfs_create_file("btcoex", S_IRUSR, sc->debug.debugfs_phy, sc,
  1194. &fops_btcoex);
  1195. #endif
  1196. #ifdef CONFIG_ATH9K_WOW
  1197. debugfs_create_file("wow", S_IRUSR | S_IWUSR,
  1198. sc->debug.debugfs_phy, sc, &fops_wow);
  1199. #endif
  1200. #ifdef CONFIG_ATH9K_DYNACK
  1201. debugfs_create_file("ack_to", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
  1202. sc, &fops_ackto);
  1203. #endif
  1204. debugfs_create_file("tpc", S_IRUSR | S_IWUSR,
  1205. sc->debug.debugfs_phy, sc, &fops_tpc);
  1206. return 0;
  1207. }