xilinx_gmii2rgmii.c 3.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113
  1. /* Xilinx GMII2RGMII Converter driver
  2. *
  3. * Copyright (C) 2016 Xilinx, Inc.
  4. * Copyright (C) 2016 Andrew Lunn <andrew@lunn.ch>
  5. *
  6. * Author: Andrew Lunn <andrew@lunn.ch>
  7. * Author: Kedareswara rao Appana <appanad@xilinx.com>
  8. *
  9. * Description:
  10. * This driver is developed for Xilinx GMII2RGMII Converter
  11. *
  12. * This program is free software: you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation, either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. */
  22. #include <linux/module.h>
  23. #include <linux/kernel.h>
  24. #include <linux/mii.h>
  25. #include <linux/mdio.h>
  26. #include <linux/phy.h>
  27. #include <linux/of_mdio.h>
  28. #define XILINX_GMII2RGMII_REG 0x10
  29. #define XILINX_GMII2RGMII_SPEED_MASK (BMCR_SPEED1000 | BMCR_SPEED100)
  30. struct gmii2rgmii {
  31. struct phy_device *phy_dev;
  32. struct phy_driver *phy_drv;
  33. struct phy_driver conv_phy_drv;
  34. int addr;
  35. };
  36. static int xgmiitorgmii_read_status(struct phy_device *phydev)
  37. {
  38. struct gmii2rgmii *priv = phydev->priv;
  39. u16 val = 0;
  40. priv->phy_drv->read_status(phydev);
  41. val = mdiobus_read(phydev->mdio.bus, priv->addr, XILINX_GMII2RGMII_REG);
  42. val &= ~XILINX_GMII2RGMII_SPEED_MASK;
  43. if (phydev->speed == SPEED_1000)
  44. val |= BMCR_SPEED1000;
  45. else if (phydev->speed == SPEED_100)
  46. val |= BMCR_SPEED100;
  47. else
  48. val |= BMCR_SPEED10;
  49. mdiobus_write(phydev->mdio.bus, priv->addr, XILINX_GMII2RGMII_REG, val);
  50. return 0;
  51. }
  52. static int xgmiitorgmii_probe(struct mdio_device *mdiodev)
  53. {
  54. struct device *dev = &mdiodev->dev;
  55. struct device_node *np = dev->of_node, *phy_node;
  56. struct gmii2rgmii *priv;
  57. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  58. if (!priv)
  59. return -ENOMEM;
  60. phy_node = of_parse_phandle(np, "phy-handle", 0);
  61. if (!phy_node) {
  62. dev_err(dev, "Couldn't parse phy-handle\n");
  63. return -ENODEV;
  64. }
  65. priv->phy_dev = of_phy_find_device(phy_node);
  66. of_node_put(phy_node);
  67. if (!priv->phy_dev) {
  68. dev_info(dev, "Couldn't find phydev\n");
  69. return -EPROBE_DEFER;
  70. }
  71. priv->addr = mdiodev->addr;
  72. priv->phy_drv = priv->phy_dev->drv;
  73. memcpy(&priv->conv_phy_drv, priv->phy_dev->drv,
  74. sizeof(struct phy_driver));
  75. priv->conv_phy_drv.read_status = xgmiitorgmii_read_status;
  76. priv->phy_dev->priv = priv;
  77. priv->phy_dev->drv = &priv->conv_phy_drv;
  78. return 0;
  79. }
  80. static const struct of_device_id xgmiitorgmii_of_match[] = {
  81. { .compatible = "xlnx,gmii-to-rgmii-1.0" },
  82. {},
  83. };
  84. MODULE_DEVICE_TABLE(of, xgmiitorgmii_of_match);
  85. static struct mdio_driver xgmiitorgmii_driver = {
  86. .probe = xgmiitorgmii_probe,
  87. .mdiodrv.driver = {
  88. .name = "xgmiitorgmii",
  89. .of_match_table = xgmiitorgmii_of_match,
  90. },
  91. };
  92. mdio_module_driver(xgmiitorgmii_driver);
  93. MODULE_DESCRIPTION("Xilinx GMII2RGMII converter driver");
  94. MODULE_LICENSE("GPL");