tmio_mmc.h 8.2 KB

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  1. /*
  2. * linux/drivers/mmc/host/tmio_mmc.h
  3. *
  4. * Copyright (C) 2016 Sang Engineering, Wolfram Sang
  5. * Copyright (C) 2015-16 Renesas Electronics Corporation
  6. * Copyright (C) 2007 Ian Molton
  7. * Copyright (C) 2004 Ian Molton
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * Driver for the MMC / SD / SDIO cell found in:
  14. *
  15. * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
  16. */
  17. #ifndef TMIO_MMC_H
  18. #define TMIO_MMC_H
  19. #include <linux/dmaengine.h>
  20. #include <linux/highmem.h>
  21. #include <linux/mutex.h>
  22. #include <linux/pagemap.h>
  23. #include <linux/scatterlist.h>
  24. #include <linux/spinlock.h>
  25. #define CTL_SD_CMD 0x00
  26. #define CTL_ARG_REG 0x04
  27. #define CTL_STOP_INTERNAL_ACTION 0x08
  28. #define CTL_XFER_BLK_COUNT 0xa
  29. #define CTL_RESPONSE 0x0c
  30. /* driver merges STATUS and following STATUS2 */
  31. #define CTL_STATUS 0x1c
  32. /* driver merges IRQ_MASK and following IRQ_MASK2 */
  33. #define CTL_IRQ_MASK 0x20
  34. #define CTL_SD_CARD_CLK_CTL 0x24
  35. #define CTL_SD_XFER_LEN 0x26
  36. #define CTL_SD_MEM_CARD_OPT 0x28
  37. #define CTL_SD_ERROR_DETAIL_STATUS 0x2c
  38. #define CTL_SD_DATA_PORT 0x30
  39. #define CTL_TRANSACTION_CTL 0x34
  40. #define CTL_SDIO_STATUS 0x36
  41. #define CTL_SDIO_IRQ_MASK 0x38
  42. #define CTL_DMA_ENABLE 0xd8
  43. #define CTL_RESET_SD 0xe0
  44. #define CTL_VERSION 0xe2
  45. #define CTL_SDIO_REGS 0x100
  46. #define CTL_CLK_AND_WAIT_CTL 0x138
  47. #define CTL_RESET_SDIO 0x1e0
  48. /* Definitions for values the CTRL_STATUS register can take. */
  49. #define TMIO_STAT_CMDRESPEND BIT(0)
  50. #define TMIO_STAT_DATAEND BIT(2)
  51. #define TMIO_STAT_CARD_REMOVE BIT(3)
  52. #define TMIO_STAT_CARD_INSERT BIT(4)
  53. #define TMIO_STAT_SIGSTATE BIT(5)
  54. #define TMIO_STAT_WRPROTECT BIT(7)
  55. #define TMIO_STAT_CARD_REMOVE_A BIT(8)
  56. #define TMIO_STAT_CARD_INSERT_A BIT(9)
  57. #define TMIO_STAT_SIGSTATE_A BIT(10)
  58. /* These belong technically to CTRL_STATUS2, but the driver merges them */
  59. #define TMIO_STAT_CMD_IDX_ERR BIT(16)
  60. #define TMIO_STAT_CRCFAIL BIT(17)
  61. #define TMIO_STAT_STOPBIT_ERR BIT(18)
  62. #define TMIO_STAT_DATATIMEOUT BIT(19)
  63. #define TMIO_STAT_RXOVERFLOW BIT(20)
  64. #define TMIO_STAT_TXUNDERRUN BIT(21)
  65. #define TMIO_STAT_CMDTIMEOUT BIT(22)
  66. #define TMIO_STAT_DAT0 BIT(23) /* only known on R-Car so far */
  67. #define TMIO_STAT_RXRDY BIT(24)
  68. #define TMIO_STAT_TXRQ BIT(25)
  69. #define TMIO_STAT_ILL_FUNC BIT(29) /* only when !TMIO_MMC_HAS_IDLE_WAIT */
  70. #define TMIO_STAT_SCLKDIVEN BIT(29) /* only when TMIO_MMC_HAS_IDLE_WAIT */
  71. #define TMIO_STAT_CMD_BUSY BIT(30)
  72. #define TMIO_STAT_ILL_ACCESS BIT(31)
  73. #define CLK_CTL_DIV_MASK 0xff
  74. #define CLK_CTL_SCLKEN BIT(8)
  75. #define CARD_OPT_WIDTH8 BIT(13)
  76. #define CARD_OPT_WIDTH BIT(15)
  77. #define TMIO_BBS 512 /* Boot block size */
  78. /* Definitions for values the CTRL_SDIO_STATUS register can take. */
  79. #define TMIO_SDIO_STAT_IOIRQ 0x0001
  80. #define TMIO_SDIO_STAT_EXPUB52 0x4000
  81. #define TMIO_SDIO_STAT_EXWT 0x8000
  82. #define TMIO_SDIO_MASK_ALL 0xc007
  83. /* Define some IRQ masks */
  84. /* This is the mask used at reset by the chip */
  85. #define TMIO_MASK_ALL 0x837f031d
  86. #define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND)
  87. #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND)
  88. #define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \
  89. TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
  90. #define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
  91. struct tmio_mmc_data;
  92. struct tmio_mmc_host;
  93. struct tmio_mmc_dma {
  94. enum dma_slave_buswidth dma_buswidth;
  95. bool (*filter)(struct dma_chan *chan, void *arg);
  96. void (*enable)(struct tmio_mmc_host *host, bool enable);
  97. };
  98. struct tmio_mmc_host {
  99. void __iomem *ctl;
  100. struct mmc_command *cmd;
  101. struct mmc_request *mrq;
  102. struct mmc_data *data;
  103. struct mmc_host *mmc;
  104. /* Callbacks for clock / power control */
  105. void (*set_pwr)(struct platform_device *host, int state);
  106. void (*set_clk_div)(struct platform_device *host, int state);
  107. /* pio related stuff */
  108. struct scatterlist *sg_ptr;
  109. struct scatterlist *sg_orig;
  110. unsigned int sg_len;
  111. unsigned int sg_off;
  112. unsigned long bus_shift;
  113. struct platform_device *pdev;
  114. struct tmio_mmc_data *pdata;
  115. struct tmio_mmc_dma *dma;
  116. /* DMA support */
  117. bool force_pio;
  118. struct dma_chan *chan_rx;
  119. struct dma_chan *chan_tx;
  120. struct tasklet_struct dma_complete;
  121. struct tasklet_struct dma_issue;
  122. struct scatterlist bounce_sg;
  123. u8 *bounce_buf;
  124. /* Track lost interrupts */
  125. struct delayed_work delayed_reset_work;
  126. struct work_struct done;
  127. /* Cache */
  128. u32 sdcard_irq_mask;
  129. u32 sdio_irq_mask;
  130. unsigned int clk_cache;
  131. spinlock_t lock; /* protect host private data */
  132. unsigned long last_req_ts;
  133. struct mutex ios_lock; /* protect set_ios() context */
  134. bool native_hotplug;
  135. bool sdio_irq_enabled;
  136. int (*write16_hook)(struct tmio_mmc_host *host, int addr);
  137. int (*clk_enable)(struct tmio_mmc_host *host);
  138. unsigned int (*clk_update)(struct tmio_mmc_host *host,
  139. unsigned int new_clock);
  140. void (*clk_disable)(struct tmio_mmc_host *host);
  141. int (*multi_io_quirk)(struct mmc_card *card,
  142. unsigned int direction, int blk_size);
  143. int (*card_busy)(struct mmc_host *mmc);
  144. int (*start_signal_voltage_switch)(struct mmc_host *mmc,
  145. struct mmc_ios *ios);
  146. };
  147. struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev);
  148. void tmio_mmc_host_free(struct tmio_mmc_host *host);
  149. int tmio_mmc_host_probe(struct tmio_mmc_host *host,
  150. struct tmio_mmc_data *pdata);
  151. void tmio_mmc_host_remove(struct tmio_mmc_host *host);
  152. void tmio_mmc_do_data_irq(struct tmio_mmc_host *host);
  153. void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
  154. void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
  155. irqreturn_t tmio_mmc_irq(int irq, void *devid);
  156. static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg,
  157. unsigned long *flags)
  158. {
  159. local_irq_save(*flags);
  160. return kmap_atomic(sg_page(sg)) + sg->offset;
  161. }
  162. static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg,
  163. unsigned long *flags, void *virt)
  164. {
  165. kunmap_atomic(virt - sg->offset);
  166. local_irq_restore(*flags);
  167. }
  168. #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
  169. void tmio_mmc_start_dma(struct tmio_mmc_host *host, struct mmc_data *data);
  170. void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable);
  171. void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdata);
  172. void tmio_mmc_release_dma(struct tmio_mmc_host *host);
  173. void tmio_mmc_abort_dma(struct tmio_mmc_host *host);
  174. #else
  175. static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
  176. struct mmc_data *data)
  177. {
  178. }
  179. static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
  180. {
  181. }
  182. static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
  183. struct tmio_mmc_data *pdata)
  184. {
  185. host->chan_tx = NULL;
  186. host->chan_rx = NULL;
  187. }
  188. static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
  189. {
  190. }
  191. static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
  192. {
  193. }
  194. #endif
  195. #ifdef CONFIG_PM
  196. int tmio_mmc_host_runtime_suspend(struct device *dev);
  197. int tmio_mmc_host_runtime_resume(struct device *dev);
  198. #endif
  199. static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
  200. {
  201. return readw(host->ctl + (addr << host->bus_shift));
  202. }
  203. static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
  204. u16 *buf, int count)
  205. {
  206. readsw(host->ctl + (addr << host->bus_shift), buf, count);
  207. }
  208. static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host, int addr)
  209. {
  210. return readw(host->ctl + (addr << host->bus_shift)) |
  211. readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
  212. }
  213. static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr, u16 val)
  214. {
  215. /* If there is a hook and it returns non-zero then there
  216. * is an error and the write should be skipped
  217. */
  218. if (host->write16_hook && host->write16_hook(host, addr))
  219. return;
  220. writew(val, host->ctl + (addr << host->bus_shift));
  221. }
  222. static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
  223. u16 *buf, int count)
  224. {
  225. writesw(host->ctl + (addr << host->bus_shift), buf, count);
  226. }
  227. static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host, int addr, u32 val)
  228. {
  229. writew(val & 0xffff, host->ctl + (addr << host->bus_shift));
  230. writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
  231. }
  232. #endif