sdhci-bcm-kona.c 9.1 KB

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  1. /*
  2. * Copyright (C) 2013 Broadcom Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation version 2.
  7. *
  8. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  9. * kind, whether express or implied; without even the implied warranty
  10. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/module.h>
  15. #include <linux/delay.h>
  16. #include <linux/highmem.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/mmc/host.h>
  19. #include <linux/io.h>
  20. #include <linux/gpio.h>
  21. #include <linux/clk.h>
  22. #include <linux/regulator/consumer.h>
  23. #include <linux/of.h>
  24. #include <linux/of_device.h>
  25. #include <linux/of_gpio.h>
  26. #include <linux/mmc/slot-gpio.h>
  27. #include "sdhci-pltfm.h"
  28. #include "sdhci.h"
  29. #define SDHCI_SOFT_RESET 0x01000000
  30. #define KONA_SDHOST_CORECTRL 0x8000
  31. #define KONA_SDHOST_CD_PINCTRL 0x00000008
  32. #define KONA_SDHOST_STOP_HCLK 0x00000004
  33. #define KONA_SDHOST_RESET 0x00000002
  34. #define KONA_SDHOST_EN 0x00000001
  35. #define KONA_SDHOST_CORESTAT 0x8004
  36. #define KONA_SDHOST_WP 0x00000002
  37. #define KONA_SDHOST_CD_SW 0x00000001
  38. #define KONA_SDHOST_COREIMR 0x8008
  39. #define KONA_SDHOST_IP 0x00000001
  40. #define KONA_SDHOST_COREISR 0x800C
  41. #define KONA_SDHOST_COREIMSR 0x8010
  42. #define KONA_SDHOST_COREDBG1 0x8014
  43. #define KONA_SDHOST_COREGPO_MASK 0x8018
  44. #define SD_DETECT_GPIO_DEBOUNCE_128MS 128
  45. #define KONA_MMC_AUTOSUSPEND_DELAY (50)
  46. struct sdhci_bcm_kona_dev {
  47. struct mutex write_lock; /* protect back to back writes */
  48. };
  49. static int sdhci_bcm_kona_sd_reset(struct sdhci_host *host)
  50. {
  51. unsigned int val;
  52. unsigned long timeout;
  53. /* This timeout should be sufficent for core to reset */
  54. timeout = jiffies + msecs_to_jiffies(100);
  55. /* reset the host using the top level reset */
  56. val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
  57. val |= KONA_SDHOST_RESET;
  58. sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
  59. while (!(sdhci_readl(host, KONA_SDHOST_CORECTRL) & KONA_SDHOST_RESET)) {
  60. if (time_is_before_jiffies(timeout)) {
  61. pr_err("Error: sd host is stuck in reset!!!\n");
  62. return -EFAULT;
  63. }
  64. }
  65. /* bring the host out of reset */
  66. val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
  67. val &= ~KONA_SDHOST_RESET;
  68. /*
  69. * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
  70. * Back-to-Back writes to same register needs delay when SD bus clock
  71. * is very low w.r.t AHB clock, mainly during boot-time and during card
  72. * insert-removal.
  73. */
  74. usleep_range(1000, 5000);
  75. sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
  76. return 0;
  77. }
  78. static void sdhci_bcm_kona_sd_init(struct sdhci_host *host)
  79. {
  80. unsigned int val;
  81. /* enable the interrupt from the IP core */
  82. val = sdhci_readl(host, KONA_SDHOST_COREIMR);
  83. val |= KONA_SDHOST_IP;
  84. sdhci_writel(host, val, KONA_SDHOST_COREIMR);
  85. /* Enable the AHB clock gating module to the host */
  86. val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
  87. val |= KONA_SDHOST_EN;
  88. /*
  89. * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
  90. * Back-to-Back writes to same register needs delay when SD bus clock
  91. * is very low w.r.t AHB clock, mainly during boot-time and during card
  92. * insert-removal.
  93. */
  94. usleep_range(1000, 5000);
  95. sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
  96. }
  97. /*
  98. * Software emulation of the SD card insertion/removal. Set insert=1 for insert
  99. * and insert=0 for removal. The card detection is done by GPIO. For Broadcom
  100. * IP to function properly the bit 0 of CORESTAT register needs to be set/reset
  101. * to generate the CD IRQ handled in sdhci.c which schedules card_tasklet.
  102. */
  103. static int sdhci_bcm_kona_sd_card_emulate(struct sdhci_host *host, int insert)
  104. {
  105. struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
  106. struct sdhci_bcm_kona_dev *kona_dev = sdhci_pltfm_priv(pltfm_priv);
  107. u32 val;
  108. /*
  109. * Back-to-Back register write needs a delay of min 10uS.
  110. * Back-to-Back writes to same register needs delay when SD bus clock
  111. * is very low w.r.t AHB clock, mainly during boot-time and during card
  112. * insert-removal.
  113. * We keep 20uS
  114. */
  115. mutex_lock(&kona_dev->write_lock);
  116. udelay(20);
  117. val = sdhci_readl(host, KONA_SDHOST_CORESTAT);
  118. if (insert) {
  119. int ret;
  120. ret = mmc_gpio_get_ro(host->mmc);
  121. if (ret >= 0)
  122. val = (val & ~KONA_SDHOST_WP) |
  123. ((ret) ? KONA_SDHOST_WP : 0);
  124. val |= KONA_SDHOST_CD_SW;
  125. sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
  126. } else {
  127. val &= ~KONA_SDHOST_CD_SW;
  128. sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
  129. }
  130. mutex_unlock(&kona_dev->write_lock);
  131. return 0;
  132. }
  133. /*
  134. * SD card interrupt event callback
  135. */
  136. static void sdhci_bcm_kona_card_event(struct sdhci_host *host)
  137. {
  138. if (mmc_gpio_get_cd(host->mmc) > 0) {
  139. dev_dbg(mmc_dev(host->mmc),
  140. "card inserted\n");
  141. sdhci_bcm_kona_sd_card_emulate(host, 1);
  142. } else {
  143. dev_dbg(mmc_dev(host->mmc),
  144. "card removed\n");
  145. sdhci_bcm_kona_sd_card_emulate(host, 0);
  146. }
  147. }
  148. static void sdhci_bcm_kona_init_74_clocks(struct sdhci_host *host,
  149. u8 power_mode)
  150. {
  151. /*
  152. * JEDEC and SD spec specify supplying 74 continuous clocks to
  153. * device after power up. With minimum bus (100KHz) that
  154. * that translates to 740us
  155. */
  156. if (power_mode != MMC_POWER_OFF)
  157. udelay(740);
  158. }
  159. static struct sdhci_ops sdhci_bcm_kona_ops = {
  160. .set_clock = sdhci_set_clock,
  161. .get_max_clock = sdhci_pltfm_clk_get_max_clock,
  162. .get_timeout_clock = sdhci_pltfm_clk_get_max_clock,
  163. .platform_send_init_74_clocks = sdhci_bcm_kona_init_74_clocks,
  164. .set_bus_width = sdhci_set_bus_width,
  165. .reset = sdhci_reset,
  166. .set_uhs_signaling = sdhci_set_uhs_signaling,
  167. .card_event = sdhci_bcm_kona_card_event,
  168. };
  169. static struct sdhci_pltfm_data sdhci_pltfm_data_kona = {
  170. .ops = &sdhci_bcm_kona_ops,
  171. .quirks = SDHCI_QUIRK_NO_CARD_NO_RESET |
  172. SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | SDHCI_QUIRK_32BIT_DMA_ADDR |
  173. SDHCI_QUIRK_32BIT_DMA_SIZE | SDHCI_QUIRK_32BIT_ADMA_SIZE |
  174. SDHCI_QUIRK_FORCE_BLK_SZ_2048 |
  175. SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
  176. };
  177. static const struct of_device_id sdhci_bcm_kona_of_match[] = {
  178. { .compatible = "brcm,kona-sdhci"},
  179. { .compatible = "bcm,kona-sdhci"}, /* deprecated name */
  180. {}
  181. };
  182. MODULE_DEVICE_TABLE(of, sdhci_bcm_kona_of_match);
  183. static int sdhci_bcm_kona_probe(struct platform_device *pdev)
  184. {
  185. struct sdhci_bcm_kona_dev *kona_dev = NULL;
  186. struct sdhci_pltfm_host *pltfm_priv;
  187. struct device *dev = &pdev->dev;
  188. struct sdhci_host *host;
  189. int ret;
  190. ret = 0;
  191. host = sdhci_pltfm_init(pdev, &sdhci_pltfm_data_kona,
  192. sizeof(*kona_dev));
  193. if (IS_ERR(host))
  194. return PTR_ERR(host);
  195. dev_dbg(dev, "%s: inited. IOADDR=%p\n", __func__, host->ioaddr);
  196. pltfm_priv = sdhci_priv(host);
  197. kona_dev = sdhci_pltfm_priv(pltfm_priv);
  198. mutex_init(&kona_dev->write_lock);
  199. ret = mmc_of_parse(host->mmc);
  200. if (ret)
  201. goto err_pltfm_free;
  202. if (!host->mmc->f_max) {
  203. dev_err(&pdev->dev, "Missing max-freq for SDHCI cfg\n");
  204. ret = -ENXIO;
  205. goto err_pltfm_free;
  206. }
  207. /* Get and enable the core clock */
  208. pltfm_priv->clk = devm_clk_get(dev, NULL);
  209. if (IS_ERR(pltfm_priv->clk)) {
  210. dev_err(dev, "Failed to get core clock\n");
  211. ret = PTR_ERR(pltfm_priv->clk);
  212. goto err_pltfm_free;
  213. }
  214. ret = clk_set_rate(pltfm_priv->clk, host->mmc->f_max);
  215. if (ret) {
  216. dev_err(dev, "Failed to set rate core clock\n");
  217. goto err_pltfm_free;
  218. }
  219. ret = clk_prepare_enable(pltfm_priv->clk);
  220. if (ret) {
  221. dev_err(dev, "Failed to enable core clock\n");
  222. goto err_pltfm_free;
  223. }
  224. dev_dbg(dev, "non-removable=%c\n",
  225. mmc_card_is_removable(host->mmc) ? 'N' : 'Y');
  226. dev_dbg(dev, "cd_gpio %c, wp_gpio %c\n",
  227. (mmc_gpio_get_cd(host->mmc) != -ENOSYS) ? 'Y' : 'N',
  228. (mmc_gpio_get_ro(host->mmc) != -ENOSYS) ? 'Y' : 'N');
  229. if (!mmc_card_is_removable(host->mmc))
  230. host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
  231. dev_dbg(dev, "is_8bit=%c\n",
  232. (host->mmc->caps & MMC_CAP_8_BIT_DATA) ? 'Y' : 'N');
  233. ret = sdhci_bcm_kona_sd_reset(host);
  234. if (ret)
  235. goto err_clk_disable;
  236. sdhci_bcm_kona_sd_init(host);
  237. ret = sdhci_add_host(host);
  238. if (ret) {
  239. dev_err(dev, "Failed sdhci_add_host\n");
  240. goto err_reset;
  241. }
  242. /* if device is eMMC, emulate card insert right here */
  243. if (!mmc_card_is_removable(host->mmc)) {
  244. ret = sdhci_bcm_kona_sd_card_emulate(host, 1);
  245. if (ret) {
  246. dev_err(dev,
  247. "unable to emulate card insertion\n");
  248. goto err_remove_host;
  249. }
  250. }
  251. /*
  252. * Since the card detection GPIO interrupt is configured to be
  253. * edge sensitive, check the initial GPIO value here, emulate
  254. * only if the card is present
  255. */
  256. if (mmc_gpio_get_cd(host->mmc) > 0)
  257. sdhci_bcm_kona_sd_card_emulate(host, 1);
  258. dev_dbg(dev, "initialized properly\n");
  259. return 0;
  260. err_remove_host:
  261. sdhci_remove_host(host, 0);
  262. err_reset:
  263. sdhci_bcm_kona_sd_reset(host);
  264. err_clk_disable:
  265. clk_disable_unprepare(pltfm_priv->clk);
  266. err_pltfm_free:
  267. sdhci_pltfm_free(pdev);
  268. dev_err(dev, "Probing of sdhci-pltfm failed: %d\n", ret);
  269. return ret;
  270. }
  271. static struct platform_driver sdhci_bcm_kona_driver = {
  272. .driver = {
  273. .name = "sdhci-kona",
  274. .pm = &sdhci_pltfm_pmops,
  275. .of_match_table = sdhci_bcm_kona_of_match,
  276. },
  277. .probe = sdhci_bcm_kona_probe,
  278. .remove = sdhci_pltfm_unregister,
  279. };
  280. module_platform_driver(sdhci_bcm_kona_driver);
  281. MODULE_DESCRIPTION("SDHCI driver for Broadcom Kona platform");
  282. MODULE_AUTHOR("Broadcom");
  283. MODULE_LICENSE("GPL v2");