rtsx_usb_sdmmc.c 36 KB

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  1. /* Realtek USB SD/MMC Card Interface driver
  2. *
  3. * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. * General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along
  15. * with this program; if not, see <http://www.gnu.org/licenses/>.
  16. *
  17. * Author:
  18. * Roger Tseng <rogerable@realtek.com>
  19. */
  20. #include <linux/module.h>
  21. #include <linux/slab.h>
  22. #include <linux/delay.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/usb.h>
  25. #include <linux/mmc/host.h>
  26. #include <linux/mmc/mmc.h>
  27. #include <linux/mmc/sd.h>
  28. #include <linux/mmc/sdio.h>
  29. #include <linux/mmc/card.h>
  30. #include <linux/scatterlist.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/mfd/rtsx_usb.h>
  33. #include <asm/unaligned.h>
  34. #if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \
  35. defined(CONFIG_MMC_REALTEK_USB_MODULE))
  36. #include <linux/leds.h>
  37. #include <linux/workqueue.h>
  38. #define RTSX_USB_USE_LEDS_CLASS
  39. #endif
  40. struct rtsx_usb_sdmmc {
  41. struct platform_device *pdev;
  42. struct rtsx_ucr *ucr;
  43. struct mmc_host *mmc;
  44. struct mmc_request *mrq;
  45. struct mutex host_mutex;
  46. u8 ssc_depth;
  47. unsigned int clock;
  48. bool vpclk;
  49. bool double_clk;
  50. bool host_removal;
  51. bool card_exist;
  52. bool initial_mode;
  53. bool ddr_mode;
  54. unsigned char power_mode;
  55. #ifdef RTSX_USB_USE_LEDS_CLASS
  56. struct led_classdev led;
  57. char led_name[32];
  58. struct work_struct led_work;
  59. #endif
  60. };
  61. static inline struct device *sdmmc_dev(struct rtsx_usb_sdmmc *host)
  62. {
  63. return &(host->pdev->dev);
  64. }
  65. static inline void sd_clear_error(struct rtsx_usb_sdmmc *host)
  66. {
  67. struct rtsx_ucr *ucr = host->ucr;
  68. rtsx_usb_ep0_write_register(ucr, CARD_STOP,
  69. SD_STOP | SD_CLR_ERR,
  70. SD_STOP | SD_CLR_ERR);
  71. rtsx_usb_clear_dma_err(ucr);
  72. rtsx_usb_clear_fsm_err(ucr);
  73. }
  74. #ifdef DEBUG
  75. static void sd_print_debug_regs(struct rtsx_usb_sdmmc *host)
  76. {
  77. struct rtsx_ucr *ucr = host->ucr;
  78. u8 val = 0;
  79. rtsx_usb_ep0_read_register(ucr, SD_STAT1, &val);
  80. dev_dbg(sdmmc_dev(host), "SD_STAT1: 0x%x\n", val);
  81. rtsx_usb_ep0_read_register(ucr, SD_STAT2, &val);
  82. dev_dbg(sdmmc_dev(host), "SD_STAT2: 0x%x\n", val);
  83. rtsx_usb_ep0_read_register(ucr, SD_BUS_STAT, &val);
  84. dev_dbg(sdmmc_dev(host), "SD_BUS_STAT: 0x%x\n", val);
  85. }
  86. #else
  87. #define sd_print_debug_regs(host)
  88. #endif /* DEBUG */
  89. static int sd_read_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd,
  90. u16 byte_cnt, u8 *buf, int buf_len, int timeout)
  91. {
  92. struct rtsx_ucr *ucr = host->ucr;
  93. int err;
  94. u8 trans_mode;
  95. if (!buf)
  96. buf_len = 0;
  97. rtsx_usb_init_cmd(ucr);
  98. if (cmd != NULL) {
  99. dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__
  100. , cmd->opcode);
  101. if (cmd->opcode == MMC_SEND_TUNING_BLOCK)
  102. trans_mode = SD_TM_AUTO_TUNING;
  103. else
  104. trans_mode = SD_TM_NORMAL_READ;
  105. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  106. SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40);
  107. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  108. SD_CMD1, 0xFF, (u8)(cmd->arg >> 24));
  109. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  110. SD_CMD2, 0xFF, (u8)(cmd->arg >> 16));
  111. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  112. SD_CMD3, 0xFF, (u8)(cmd->arg >> 8));
  113. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  114. SD_CMD4, 0xFF, (u8)cmd->arg);
  115. } else {
  116. trans_mode = SD_TM_AUTO_READ_3;
  117. }
  118. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
  119. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
  120. 0xFF, (u8)(byte_cnt >> 8));
  121. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
  122. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
  123. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
  124. SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
  125. SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6);
  126. if (trans_mode != SD_TM_AUTO_TUNING)
  127. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  128. CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
  129. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
  130. 0xFF, trans_mode | SD_TRANSFER_START);
  131. rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
  132. SD_TRANSFER_END, SD_TRANSFER_END);
  133. if (cmd != NULL) {
  134. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
  135. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
  136. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
  137. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
  138. }
  139. err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
  140. if (err) {
  141. dev_dbg(sdmmc_dev(host),
  142. "rtsx_usb_send_cmd failed (err = %d)\n", err);
  143. return err;
  144. }
  145. err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
  146. if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
  147. sd_print_debug_regs(host);
  148. if (!err) {
  149. dev_dbg(sdmmc_dev(host),
  150. "Transfer failed (SD_TRANSFER = %02x)\n",
  151. ucr->rsp_buf[0]);
  152. err = -EIO;
  153. } else {
  154. dev_dbg(sdmmc_dev(host),
  155. "rtsx_usb_get_rsp failed (err = %d)\n", err);
  156. }
  157. return err;
  158. }
  159. if (cmd != NULL) {
  160. cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
  161. dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
  162. cmd->resp[0]);
  163. }
  164. if (buf && buf_len) {
  165. /* 2-byte aligned part */
  166. err = rtsx_usb_read_ppbuf(ucr, buf, byte_cnt - (byte_cnt % 2));
  167. if (err) {
  168. dev_dbg(sdmmc_dev(host),
  169. "rtsx_usb_read_ppbuf failed (err = %d)\n", err);
  170. return err;
  171. }
  172. /* unaligned byte */
  173. if (byte_cnt % 2)
  174. return rtsx_usb_read_register(ucr,
  175. PPBUF_BASE2 + byte_cnt,
  176. buf + byte_cnt - 1);
  177. }
  178. return 0;
  179. }
  180. static int sd_write_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd,
  181. u16 byte_cnt, u8 *buf, int buf_len, int timeout)
  182. {
  183. struct rtsx_ucr *ucr = host->ucr;
  184. int err;
  185. u8 trans_mode;
  186. if (!buf)
  187. buf_len = 0;
  188. if (buf && buf_len) {
  189. err = rtsx_usb_write_ppbuf(ucr, buf, buf_len);
  190. if (err) {
  191. dev_dbg(sdmmc_dev(host),
  192. "rtsx_usb_write_ppbuf failed (err = %d)\n",
  193. err);
  194. return err;
  195. }
  196. }
  197. trans_mode = (cmd != NULL) ? SD_TM_AUTO_WRITE_2 : SD_TM_AUTO_WRITE_3;
  198. rtsx_usb_init_cmd(ucr);
  199. if (cmd != NULL) {
  200. dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__,
  201. cmd->opcode);
  202. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  203. SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40);
  204. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  205. SD_CMD1, 0xFF, (u8)(cmd->arg >> 24));
  206. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  207. SD_CMD2, 0xFF, (u8)(cmd->arg >> 16));
  208. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  209. SD_CMD3, 0xFF, (u8)(cmd->arg >> 8));
  210. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  211. SD_CMD4, 0xFF, (u8)cmd->arg);
  212. }
  213. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
  214. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
  215. 0xFF, (u8)(byte_cnt >> 8));
  216. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
  217. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
  218. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
  219. SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
  220. SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6);
  221. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  222. CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
  223. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
  224. trans_mode | SD_TRANSFER_START);
  225. rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
  226. SD_TRANSFER_END, SD_TRANSFER_END);
  227. if (cmd != NULL) {
  228. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
  229. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
  230. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
  231. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
  232. }
  233. err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
  234. if (err) {
  235. dev_dbg(sdmmc_dev(host),
  236. "rtsx_usb_send_cmd failed (err = %d)\n", err);
  237. return err;
  238. }
  239. err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
  240. if (err) {
  241. sd_print_debug_regs(host);
  242. dev_dbg(sdmmc_dev(host),
  243. "rtsx_usb_get_rsp failed (err = %d)\n", err);
  244. return err;
  245. }
  246. if (cmd != NULL) {
  247. cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
  248. dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
  249. cmd->resp[0]);
  250. }
  251. return 0;
  252. }
  253. static void sd_send_cmd_get_rsp(struct rtsx_usb_sdmmc *host,
  254. struct mmc_command *cmd)
  255. {
  256. struct rtsx_ucr *ucr = host->ucr;
  257. u8 cmd_idx = (u8)cmd->opcode;
  258. u32 arg = cmd->arg;
  259. int err = 0;
  260. int timeout = 100;
  261. int i;
  262. u8 *ptr;
  263. int stat_idx = 0;
  264. int len = 2;
  265. u8 rsp_type;
  266. dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD %d, arg = 0x%08x\n",
  267. __func__, cmd_idx, arg);
  268. /* Response type:
  269. * R0
  270. * R1, R5, R6, R7
  271. * R1b
  272. * R2
  273. * R3, R4
  274. */
  275. switch (mmc_resp_type(cmd)) {
  276. case MMC_RSP_NONE:
  277. rsp_type = SD_RSP_TYPE_R0;
  278. break;
  279. case MMC_RSP_R1:
  280. rsp_type = SD_RSP_TYPE_R1;
  281. break;
  282. case MMC_RSP_R1_NO_CRC:
  283. rsp_type = SD_RSP_TYPE_R1 | SD_NO_CHECK_CRC7;
  284. break;
  285. case MMC_RSP_R1B:
  286. rsp_type = SD_RSP_TYPE_R1b;
  287. break;
  288. case MMC_RSP_R2:
  289. rsp_type = SD_RSP_TYPE_R2;
  290. break;
  291. case MMC_RSP_R3:
  292. rsp_type = SD_RSP_TYPE_R3;
  293. break;
  294. default:
  295. dev_dbg(sdmmc_dev(host), "cmd->flag is not valid\n");
  296. err = -EINVAL;
  297. goto out;
  298. }
  299. if (rsp_type == SD_RSP_TYPE_R1b)
  300. timeout = 3000;
  301. if (cmd->opcode == SD_SWITCH_VOLTAGE) {
  302. err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
  303. SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
  304. SD_CLK_TOGGLE_EN);
  305. if (err)
  306. goto out;
  307. }
  308. rtsx_usb_init_cmd(ucr);
  309. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD0, 0xFF, 0x40 | cmd_idx);
  310. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD1, 0xFF, (u8)(arg >> 24));
  311. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD2, 0xFF, (u8)(arg >> 16));
  312. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD3, 0xFF, (u8)(arg >> 8));
  313. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD4, 0xFF, (u8)arg);
  314. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type);
  315. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
  316. 0x01, PINGPONG_BUFFER);
  317. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
  318. 0xFF, SD_TM_CMD_RSP | SD_TRANSFER_START);
  319. rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
  320. SD_TRANSFER_END | SD_STAT_IDLE,
  321. SD_TRANSFER_END | SD_STAT_IDLE);
  322. if (rsp_type == SD_RSP_TYPE_R2) {
  323. /* Read data from ping-pong buffer */
  324. for (i = PPBUF_BASE2; i < PPBUF_BASE2 + 16; i++)
  325. rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
  326. stat_idx = 16;
  327. } else if (rsp_type != SD_RSP_TYPE_R0) {
  328. /* Read data from SD_CMDx registers */
  329. for (i = SD_CMD0; i <= SD_CMD4; i++)
  330. rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
  331. stat_idx = 5;
  332. }
  333. len += stat_idx;
  334. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_STAT1, 0, 0);
  335. err = rtsx_usb_send_cmd(ucr, MODE_CR, 100);
  336. if (err) {
  337. dev_dbg(sdmmc_dev(host),
  338. "rtsx_usb_send_cmd error (err = %d)\n", err);
  339. goto out;
  340. }
  341. err = rtsx_usb_get_rsp(ucr, len, timeout);
  342. if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
  343. sd_print_debug_regs(host);
  344. sd_clear_error(host);
  345. if (!err) {
  346. dev_dbg(sdmmc_dev(host),
  347. "Transfer failed (SD_TRANSFER = %02x)\n",
  348. ucr->rsp_buf[0]);
  349. err = -EIO;
  350. } else {
  351. dev_dbg(sdmmc_dev(host),
  352. "rtsx_usb_get_rsp failed (err = %d)\n", err);
  353. }
  354. goto out;
  355. }
  356. if (rsp_type == SD_RSP_TYPE_R0) {
  357. err = 0;
  358. goto out;
  359. }
  360. /* Skip result of CHECK_REG_CMD */
  361. ptr = ucr->rsp_buf + 1;
  362. /* Check (Start,Transmission) bit of Response */
  363. if ((ptr[0] & 0xC0) != 0) {
  364. err = -EILSEQ;
  365. dev_dbg(sdmmc_dev(host), "Invalid response bit\n");
  366. goto out;
  367. }
  368. /* Check CRC7 */
  369. if (!(rsp_type & SD_NO_CHECK_CRC7)) {
  370. if (ptr[stat_idx] & SD_CRC7_ERR) {
  371. err = -EILSEQ;
  372. dev_dbg(sdmmc_dev(host), "CRC7 error\n");
  373. goto out;
  374. }
  375. }
  376. if (rsp_type == SD_RSP_TYPE_R2) {
  377. /*
  378. * The controller offloads the last byte {CRC-7, end bit 1'b1}
  379. * of response type R2. Assign dummy CRC, 0, and end bit to the
  380. * byte(ptr[16], goes into the LSB of resp[3] later).
  381. */
  382. ptr[16] = 1;
  383. for (i = 0; i < 4; i++) {
  384. cmd->resp[i] = get_unaligned_be32(ptr + 1 + i * 4);
  385. dev_dbg(sdmmc_dev(host), "cmd->resp[%d] = 0x%08x\n",
  386. i, cmd->resp[i]);
  387. }
  388. } else {
  389. cmd->resp[0] = get_unaligned_be32(ptr + 1);
  390. dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
  391. cmd->resp[0]);
  392. }
  393. out:
  394. cmd->error = err;
  395. }
  396. static int sd_rw_multi(struct rtsx_usb_sdmmc *host, struct mmc_request *mrq)
  397. {
  398. struct rtsx_ucr *ucr = host->ucr;
  399. struct mmc_data *data = mrq->data;
  400. int read = (data->flags & MMC_DATA_READ) ? 1 : 0;
  401. u8 cfg2, trans_mode;
  402. int err;
  403. u8 flag;
  404. size_t data_len = data->blksz * data->blocks;
  405. unsigned int pipe;
  406. if (read) {
  407. dev_dbg(sdmmc_dev(host), "%s: read %zu bytes\n",
  408. __func__, data_len);
  409. cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
  410. SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_0;
  411. trans_mode = SD_TM_AUTO_READ_3;
  412. } else {
  413. dev_dbg(sdmmc_dev(host), "%s: write %zu bytes\n",
  414. __func__, data_len);
  415. cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 |
  416. SD_NO_WAIT_BUSY_END | SD_NO_CHECK_CRC7 | SD_RSP_LEN_0;
  417. trans_mode = SD_TM_AUTO_WRITE_3;
  418. }
  419. rtsx_usb_init_cmd(ucr);
  420. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, 0x00);
  421. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H, 0xFF, 0x02);
  422. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L,
  423. 0xFF, (u8)data->blocks);
  424. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H,
  425. 0xFF, (u8)(data->blocks >> 8));
  426. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
  427. 0x01, RING_BUFFER);
  428. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC3,
  429. 0xFF, (u8)(data_len >> 24));
  430. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC2,
  431. 0xFF, (u8)(data_len >> 16));
  432. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC1,
  433. 0xFF, (u8)(data_len >> 8));
  434. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC0,
  435. 0xFF, (u8)data_len);
  436. if (read) {
  437. flag = MODE_CDIR;
  438. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
  439. 0x03 | DMA_PACK_SIZE_MASK,
  440. DMA_DIR_FROM_CARD | DMA_EN | DMA_512);
  441. } else {
  442. flag = MODE_CDOR;
  443. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
  444. 0x03 | DMA_PACK_SIZE_MASK,
  445. DMA_DIR_TO_CARD | DMA_EN | DMA_512);
  446. }
  447. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2);
  448. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
  449. trans_mode | SD_TRANSFER_START);
  450. rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
  451. SD_TRANSFER_END, SD_TRANSFER_END);
  452. err = rtsx_usb_send_cmd(ucr, flag, 100);
  453. if (err)
  454. return err;
  455. if (read)
  456. pipe = usb_rcvbulkpipe(ucr->pusb_dev, EP_BULK_IN);
  457. else
  458. pipe = usb_sndbulkpipe(ucr->pusb_dev, EP_BULK_OUT);
  459. err = rtsx_usb_transfer_data(ucr, pipe, data->sg, data_len,
  460. data->sg_len, NULL, 10000);
  461. if (err) {
  462. dev_dbg(sdmmc_dev(host), "rtsx_usb_transfer_data error %d\n"
  463. , err);
  464. sd_clear_error(host);
  465. return err;
  466. }
  467. return rtsx_usb_get_rsp(ucr, 1, 2000);
  468. }
  469. static inline void sd_enable_initial_mode(struct rtsx_usb_sdmmc *host)
  470. {
  471. rtsx_usb_write_register(host->ucr, SD_CFG1,
  472. SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_128);
  473. }
  474. static inline void sd_disable_initial_mode(struct rtsx_usb_sdmmc *host)
  475. {
  476. rtsx_usb_write_register(host->ucr, SD_CFG1,
  477. SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_0);
  478. }
  479. static void sd_normal_rw(struct rtsx_usb_sdmmc *host,
  480. struct mmc_request *mrq)
  481. {
  482. struct mmc_command *cmd = mrq->cmd;
  483. struct mmc_data *data = mrq->data;
  484. u8 *buf;
  485. buf = kzalloc(data->blksz, GFP_NOIO);
  486. if (!buf) {
  487. cmd->error = -ENOMEM;
  488. return;
  489. }
  490. if (data->flags & MMC_DATA_READ) {
  491. if (host->initial_mode)
  492. sd_disable_initial_mode(host);
  493. cmd->error = sd_read_data(host, cmd, (u16)data->blksz, buf,
  494. data->blksz, 200);
  495. if (host->initial_mode)
  496. sd_enable_initial_mode(host);
  497. sg_copy_from_buffer(data->sg, data->sg_len, buf, data->blksz);
  498. } else {
  499. sg_copy_to_buffer(data->sg, data->sg_len, buf, data->blksz);
  500. cmd->error = sd_write_data(host, cmd, (u16)data->blksz, buf,
  501. data->blksz, 200);
  502. }
  503. kfree(buf);
  504. }
  505. static int sd_change_phase(struct rtsx_usb_sdmmc *host, u8 sample_point, int tx)
  506. {
  507. struct rtsx_ucr *ucr = host->ucr;
  508. int err;
  509. dev_dbg(sdmmc_dev(host), "%s: %s sample_point = %d\n",
  510. __func__, tx ? "TX" : "RX", sample_point);
  511. rtsx_usb_init_cmd(ucr);
  512. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, CLK_CHANGE);
  513. if (tx)
  514. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
  515. 0x0F, sample_point);
  516. else
  517. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK1_CTL,
  518. 0x0F, sample_point);
  519. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0);
  520. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
  521. PHASE_NOT_RESET, PHASE_NOT_RESET);
  522. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, 0);
  523. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1, SD_ASYNC_FIFO_RST, 0);
  524. err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
  525. if (err)
  526. return err;
  527. return 0;
  528. }
  529. static inline u32 get_phase_point(u32 phase_map, unsigned int idx)
  530. {
  531. idx &= MAX_PHASE;
  532. return phase_map & (1 << idx);
  533. }
  534. static int get_phase_len(u32 phase_map, unsigned int idx)
  535. {
  536. int i;
  537. for (i = 0; i < MAX_PHASE + 1; i++) {
  538. if (get_phase_point(phase_map, idx + i) == 0)
  539. return i;
  540. }
  541. return MAX_PHASE + 1;
  542. }
  543. static u8 sd_search_final_phase(struct rtsx_usb_sdmmc *host, u32 phase_map)
  544. {
  545. int start = 0, len = 0;
  546. int start_final = 0, len_final = 0;
  547. u8 final_phase = 0xFF;
  548. if (phase_map == 0) {
  549. dev_dbg(sdmmc_dev(host), "Phase: [map:%x]\n", phase_map);
  550. return final_phase;
  551. }
  552. while (start < MAX_PHASE + 1) {
  553. len = get_phase_len(phase_map, start);
  554. if (len_final < len) {
  555. start_final = start;
  556. len_final = len;
  557. }
  558. start += len ? len : 1;
  559. }
  560. final_phase = (start_final + len_final / 2) & MAX_PHASE;
  561. dev_dbg(sdmmc_dev(host), "Phase: [map:%x] [maxlen:%d] [final:%d]\n",
  562. phase_map, len_final, final_phase);
  563. return final_phase;
  564. }
  565. static void sd_wait_data_idle(struct rtsx_usb_sdmmc *host)
  566. {
  567. int err, i;
  568. u8 val = 0;
  569. for (i = 0; i < 100; i++) {
  570. err = rtsx_usb_ep0_read_register(host->ucr,
  571. SD_DATA_STATE, &val);
  572. if (val & SD_DATA_IDLE)
  573. return;
  574. usleep_range(100, 1000);
  575. }
  576. }
  577. static int sd_tuning_rx_cmd(struct rtsx_usb_sdmmc *host,
  578. u8 opcode, u8 sample_point)
  579. {
  580. int err;
  581. struct mmc_command cmd = {0};
  582. err = sd_change_phase(host, sample_point, 0);
  583. if (err)
  584. return err;
  585. cmd.opcode = MMC_SEND_TUNING_BLOCK;
  586. err = sd_read_data(host, &cmd, 0x40, NULL, 0, 100);
  587. if (err) {
  588. /* Wait till SD DATA IDLE */
  589. sd_wait_data_idle(host);
  590. sd_clear_error(host);
  591. return err;
  592. }
  593. return 0;
  594. }
  595. static void sd_tuning_phase(struct rtsx_usb_sdmmc *host,
  596. u8 opcode, u16 *phase_map)
  597. {
  598. int err, i;
  599. u16 raw_phase_map = 0;
  600. for (i = MAX_PHASE; i >= 0; i--) {
  601. err = sd_tuning_rx_cmd(host, opcode, (u8)i);
  602. if (!err)
  603. raw_phase_map |= 1 << i;
  604. }
  605. if (phase_map)
  606. *phase_map = raw_phase_map;
  607. }
  608. static int sd_tuning_rx(struct rtsx_usb_sdmmc *host, u8 opcode)
  609. {
  610. int err, i;
  611. u16 raw_phase_map[RX_TUNING_CNT] = {0}, phase_map;
  612. u8 final_phase;
  613. /* setting fixed default TX phase */
  614. err = sd_change_phase(host, 0x01, 1);
  615. if (err) {
  616. dev_dbg(sdmmc_dev(host), "TX phase setting failed\n");
  617. return err;
  618. }
  619. /* tuning RX phase */
  620. for (i = 0; i < RX_TUNING_CNT; i++) {
  621. sd_tuning_phase(host, opcode, &(raw_phase_map[i]));
  622. if (raw_phase_map[i] == 0)
  623. break;
  624. }
  625. phase_map = 0xFFFF;
  626. for (i = 0; i < RX_TUNING_CNT; i++) {
  627. dev_dbg(sdmmc_dev(host), "RX raw_phase_map[%d] = 0x%04x\n",
  628. i, raw_phase_map[i]);
  629. phase_map &= raw_phase_map[i];
  630. }
  631. dev_dbg(sdmmc_dev(host), "RX phase_map = 0x%04x\n", phase_map);
  632. if (phase_map) {
  633. final_phase = sd_search_final_phase(host, phase_map);
  634. if (final_phase == 0xFF)
  635. return -EINVAL;
  636. err = sd_change_phase(host, final_phase, 0);
  637. if (err)
  638. return err;
  639. } else {
  640. return -EINVAL;
  641. }
  642. return 0;
  643. }
  644. static int sdmmc_get_ro(struct mmc_host *mmc)
  645. {
  646. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  647. struct rtsx_ucr *ucr = host->ucr;
  648. int err;
  649. u16 val;
  650. if (host->host_removal)
  651. return -ENOMEDIUM;
  652. mutex_lock(&ucr->dev_mutex);
  653. /* Check SD card detect */
  654. err = rtsx_usb_get_card_status(ucr, &val);
  655. mutex_unlock(&ucr->dev_mutex);
  656. /* Treat failed detection as non-ro */
  657. if (err)
  658. return 0;
  659. if (val & SD_WP)
  660. return 1;
  661. return 0;
  662. }
  663. static int sdmmc_get_cd(struct mmc_host *mmc)
  664. {
  665. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  666. struct rtsx_ucr *ucr = host->ucr;
  667. int err;
  668. u16 val;
  669. if (host->host_removal)
  670. return -ENOMEDIUM;
  671. mutex_lock(&ucr->dev_mutex);
  672. /* Check SD card detect */
  673. err = rtsx_usb_get_card_status(ucr, &val);
  674. mutex_unlock(&ucr->dev_mutex);
  675. /* Treat failed detection as non-exist */
  676. if (err)
  677. goto no_card;
  678. if (val & SD_CD) {
  679. host->card_exist = true;
  680. return 1;
  681. }
  682. no_card:
  683. host->card_exist = false;
  684. return 0;
  685. }
  686. static void sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
  687. {
  688. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  689. struct rtsx_ucr *ucr = host->ucr;
  690. struct mmc_command *cmd = mrq->cmd;
  691. struct mmc_data *data = mrq->data;
  692. unsigned int data_size = 0;
  693. dev_dbg(sdmmc_dev(host), "%s\n", __func__);
  694. if (host->host_removal) {
  695. cmd->error = -ENOMEDIUM;
  696. goto finish;
  697. }
  698. if ((!host->card_exist)) {
  699. cmd->error = -ENOMEDIUM;
  700. goto finish_detect_card;
  701. }
  702. /*
  703. * Reject SDIO CMDs to speed up card identification
  704. * since unsupported
  705. */
  706. if (cmd->opcode == SD_IO_SEND_OP_COND ||
  707. cmd->opcode == SD_IO_RW_DIRECT ||
  708. cmd->opcode == SD_IO_RW_EXTENDED) {
  709. cmd->error = -EINVAL;
  710. goto finish;
  711. }
  712. mutex_lock(&ucr->dev_mutex);
  713. mutex_lock(&host->host_mutex);
  714. host->mrq = mrq;
  715. mutex_unlock(&host->host_mutex);
  716. if (mrq->data)
  717. data_size = data->blocks * data->blksz;
  718. if (!data_size) {
  719. sd_send_cmd_get_rsp(host, cmd);
  720. } else if ((!(data_size % 512) && cmd->opcode != MMC_SEND_EXT_CSD) ||
  721. mmc_op_multi(cmd->opcode)) {
  722. sd_send_cmd_get_rsp(host, cmd);
  723. if (!cmd->error) {
  724. sd_rw_multi(host, mrq);
  725. if (mmc_op_multi(cmd->opcode) && mrq->stop) {
  726. sd_send_cmd_get_rsp(host, mrq->stop);
  727. rtsx_usb_write_register(ucr, MC_FIFO_CTL,
  728. FIFO_FLUSH, FIFO_FLUSH);
  729. }
  730. }
  731. } else {
  732. sd_normal_rw(host, mrq);
  733. }
  734. if (mrq->data) {
  735. if (cmd->error || data->error)
  736. data->bytes_xfered = 0;
  737. else
  738. data->bytes_xfered = data->blocks * data->blksz;
  739. }
  740. mutex_unlock(&ucr->dev_mutex);
  741. finish_detect_card:
  742. if (cmd->error) {
  743. /*
  744. * detect card when fail to update card existence state and
  745. * speed up card removal when retry
  746. */
  747. sdmmc_get_cd(mmc);
  748. dev_dbg(sdmmc_dev(host), "cmd->error = %d\n", cmd->error);
  749. }
  750. finish:
  751. mutex_lock(&host->host_mutex);
  752. host->mrq = NULL;
  753. mutex_unlock(&host->host_mutex);
  754. mmc_request_done(mmc, mrq);
  755. }
  756. static int sd_set_bus_width(struct rtsx_usb_sdmmc *host,
  757. unsigned char bus_width)
  758. {
  759. int err = 0;
  760. u8 width[] = {
  761. [MMC_BUS_WIDTH_1] = SD_BUS_WIDTH_1BIT,
  762. [MMC_BUS_WIDTH_4] = SD_BUS_WIDTH_4BIT,
  763. [MMC_BUS_WIDTH_8] = SD_BUS_WIDTH_8BIT,
  764. };
  765. if (bus_width <= MMC_BUS_WIDTH_8)
  766. err = rtsx_usb_write_register(host->ucr, SD_CFG1,
  767. 0x03, width[bus_width]);
  768. return err;
  769. }
  770. static int sd_pull_ctl_disable_lqfp48(struct rtsx_ucr *ucr)
  771. {
  772. rtsx_usb_init_cmd(ucr);
  773. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x55);
  774. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
  775. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
  776. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
  777. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
  778. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
  779. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  780. }
  781. static int sd_pull_ctl_disable_qfn24(struct rtsx_ucr *ucr)
  782. {
  783. rtsx_usb_init_cmd(ucr);
  784. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x65);
  785. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
  786. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
  787. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
  788. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x56);
  789. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x59);
  790. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  791. }
  792. static int sd_pull_ctl_enable_lqfp48(struct rtsx_ucr *ucr)
  793. {
  794. rtsx_usb_init_cmd(ucr);
  795. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xAA);
  796. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0xAA);
  797. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA9);
  798. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
  799. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
  800. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
  801. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  802. }
  803. static int sd_pull_ctl_enable_qfn24(struct rtsx_ucr *ucr)
  804. {
  805. rtsx_usb_init_cmd(ucr);
  806. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xA5);
  807. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x9A);
  808. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA5);
  809. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x9A);
  810. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x65);
  811. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x5A);
  812. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  813. }
  814. static int sd_power_on(struct rtsx_usb_sdmmc *host)
  815. {
  816. struct rtsx_ucr *ucr = host->ucr;
  817. int err;
  818. dev_dbg(sdmmc_dev(host), "%s\n", __func__);
  819. rtsx_usb_init_cmd(ucr);
  820. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SELECT, 0x07, SD_MOD_SEL);
  821. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SHARE_MODE,
  822. CARD_SHARE_MASK, CARD_SHARE_SD);
  823. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN,
  824. SD_CLK_EN, SD_CLK_EN);
  825. err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
  826. if (err)
  827. return err;
  828. if (CHECK_PKG(ucr, LQFP48))
  829. err = sd_pull_ctl_enable_lqfp48(ucr);
  830. else
  831. err = sd_pull_ctl_enable_qfn24(ucr);
  832. if (err)
  833. return err;
  834. err = rtsx_usb_write_register(ucr, CARD_PWR_CTL,
  835. POWER_MASK, PARTIAL_POWER_ON);
  836. if (err)
  837. return err;
  838. usleep_range(800, 1000);
  839. rtsx_usb_init_cmd(ucr);
  840. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
  841. POWER_MASK|LDO3318_PWR_MASK, POWER_ON|LDO_ON);
  842. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE,
  843. SD_OUTPUT_EN, SD_OUTPUT_EN);
  844. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  845. }
  846. static int sd_power_off(struct rtsx_usb_sdmmc *host)
  847. {
  848. struct rtsx_ucr *ucr = host->ucr;
  849. int err;
  850. dev_dbg(sdmmc_dev(host), "%s\n", __func__);
  851. rtsx_usb_init_cmd(ucr);
  852. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN, SD_CLK_EN, 0);
  853. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE, SD_OUTPUT_EN, 0);
  854. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
  855. POWER_MASK, POWER_OFF);
  856. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
  857. POWER_MASK|LDO3318_PWR_MASK, POWER_OFF|LDO_SUSPEND);
  858. err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
  859. if (err)
  860. return err;
  861. if (CHECK_PKG(ucr, LQFP48))
  862. return sd_pull_ctl_disable_lqfp48(ucr);
  863. return sd_pull_ctl_disable_qfn24(ucr);
  864. }
  865. static int sd_set_power_mode(struct rtsx_usb_sdmmc *host,
  866. unsigned char power_mode)
  867. {
  868. int err;
  869. if (power_mode != MMC_POWER_OFF)
  870. power_mode = MMC_POWER_ON;
  871. if (power_mode == host->power_mode)
  872. return 0;
  873. if (power_mode == MMC_POWER_OFF) {
  874. err = sd_power_off(host);
  875. pm_runtime_put(sdmmc_dev(host));
  876. } else {
  877. pm_runtime_get_sync(sdmmc_dev(host));
  878. err = sd_power_on(host);
  879. }
  880. if (!err)
  881. host->power_mode = power_mode;
  882. return err;
  883. }
  884. static int sd_set_timing(struct rtsx_usb_sdmmc *host,
  885. unsigned char timing, bool *ddr_mode)
  886. {
  887. struct rtsx_ucr *ucr = host->ucr;
  888. int err;
  889. *ddr_mode = false;
  890. rtsx_usb_init_cmd(ucr);
  891. switch (timing) {
  892. case MMC_TIMING_UHS_SDR104:
  893. case MMC_TIMING_UHS_SDR50:
  894. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
  895. 0x0C | SD_ASYNC_FIFO_RST,
  896. SD_30_MODE | SD_ASYNC_FIFO_RST);
  897. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
  898. CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
  899. break;
  900. case MMC_TIMING_UHS_DDR50:
  901. *ddr_mode = true;
  902. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
  903. 0x0C | SD_ASYNC_FIFO_RST,
  904. SD_DDR_MODE | SD_ASYNC_FIFO_RST);
  905. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
  906. CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
  907. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
  908. DDR_VAR_TX_CMD_DAT, DDR_VAR_TX_CMD_DAT);
  909. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
  910. DDR_VAR_RX_DAT | DDR_VAR_RX_CMD,
  911. DDR_VAR_RX_DAT | DDR_VAR_RX_CMD);
  912. break;
  913. case MMC_TIMING_MMC_HS:
  914. case MMC_TIMING_SD_HS:
  915. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
  916. 0x0C, SD_20_MODE);
  917. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
  918. CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
  919. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
  920. SD20_TX_SEL_MASK, SD20_TX_14_AHEAD);
  921. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
  922. SD20_RX_SEL_MASK, SD20_RX_14_DELAY);
  923. break;
  924. default:
  925. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  926. SD_CFG1, 0x0C, SD_20_MODE);
  927. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
  928. CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
  929. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  930. SD_PUSH_POINT_CTL, 0xFF, 0);
  931. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
  932. SD20_RX_SEL_MASK, SD20_RX_POS_EDGE);
  933. break;
  934. }
  935. err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
  936. return err;
  937. }
  938. static void sdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
  939. {
  940. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  941. struct rtsx_ucr *ucr = host->ucr;
  942. dev_dbg(sdmmc_dev(host), "%s\n", __func__);
  943. mutex_lock(&ucr->dev_mutex);
  944. sd_set_power_mode(host, ios->power_mode);
  945. sd_set_bus_width(host, ios->bus_width);
  946. sd_set_timing(host, ios->timing, &host->ddr_mode);
  947. host->vpclk = false;
  948. host->double_clk = true;
  949. switch (ios->timing) {
  950. case MMC_TIMING_UHS_SDR104:
  951. case MMC_TIMING_UHS_SDR50:
  952. host->ssc_depth = SSC_DEPTH_2M;
  953. host->vpclk = true;
  954. host->double_clk = false;
  955. break;
  956. case MMC_TIMING_UHS_DDR50:
  957. case MMC_TIMING_UHS_SDR25:
  958. host->ssc_depth = SSC_DEPTH_1M;
  959. break;
  960. default:
  961. host->ssc_depth = SSC_DEPTH_512K;
  962. break;
  963. }
  964. host->initial_mode = (ios->clock <= 1000000) ? true : false;
  965. host->clock = ios->clock;
  966. rtsx_usb_switch_clock(host->ucr, host->clock, host->ssc_depth,
  967. host->initial_mode, host->double_clk, host->vpclk);
  968. mutex_unlock(&ucr->dev_mutex);
  969. dev_dbg(sdmmc_dev(host), "%s end\n", __func__);
  970. }
  971. static int sdmmc_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios)
  972. {
  973. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  974. struct rtsx_ucr *ucr = host->ucr;
  975. int err = 0;
  976. dev_dbg(sdmmc_dev(host), "%s: signal_voltage = %d\n",
  977. __func__, ios->signal_voltage);
  978. if (host->host_removal)
  979. return -ENOMEDIUM;
  980. if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_120)
  981. return -EPERM;
  982. mutex_lock(&ucr->dev_mutex);
  983. err = rtsx_usb_card_exclusive_check(ucr, RTSX_USB_SD_CARD);
  984. if (err) {
  985. mutex_unlock(&ucr->dev_mutex);
  986. return err;
  987. }
  988. /* Let mmc core do the busy checking, simply stop the forced-toggle
  989. * clock(while issuing CMD11) and switch voltage.
  990. */
  991. rtsx_usb_init_cmd(ucr);
  992. if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) {
  993. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
  994. SD_IO_USING_1V8, SD_IO_USING_3V3);
  995. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
  996. TUNE_SD18_MASK, TUNE_SD18_3V3);
  997. } else {
  998. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BUS_STAT,
  999. SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
  1000. SD_CLK_FORCE_STOP);
  1001. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
  1002. SD_IO_USING_1V8, SD_IO_USING_1V8);
  1003. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
  1004. TUNE_SD18_MASK, TUNE_SD18_1V8);
  1005. }
  1006. err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
  1007. mutex_unlock(&ucr->dev_mutex);
  1008. return err;
  1009. }
  1010. static int sdmmc_card_busy(struct mmc_host *mmc)
  1011. {
  1012. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  1013. struct rtsx_ucr *ucr = host->ucr;
  1014. int err;
  1015. u8 stat;
  1016. u8 mask = SD_DAT3_STATUS | SD_DAT2_STATUS | SD_DAT1_STATUS
  1017. | SD_DAT0_STATUS;
  1018. dev_dbg(sdmmc_dev(host), "%s\n", __func__);
  1019. mutex_lock(&ucr->dev_mutex);
  1020. err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
  1021. SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
  1022. SD_CLK_TOGGLE_EN);
  1023. if (err)
  1024. goto out;
  1025. mdelay(1);
  1026. err = rtsx_usb_read_register(ucr, SD_BUS_STAT, &stat);
  1027. if (err)
  1028. goto out;
  1029. err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
  1030. SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
  1031. out:
  1032. mutex_unlock(&ucr->dev_mutex);
  1033. if (err)
  1034. return err;
  1035. /* check if any pin between dat[0:3] is low */
  1036. if ((stat & mask) != mask)
  1037. return 1;
  1038. else
  1039. return 0;
  1040. }
  1041. static int sdmmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
  1042. {
  1043. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  1044. struct rtsx_ucr *ucr = host->ucr;
  1045. int err = 0;
  1046. if (host->host_removal)
  1047. return -ENOMEDIUM;
  1048. mutex_lock(&ucr->dev_mutex);
  1049. if (!host->ddr_mode)
  1050. err = sd_tuning_rx(host, MMC_SEND_TUNING_BLOCK);
  1051. mutex_unlock(&ucr->dev_mutex);
  1052. return err;
  1053. }
  1054. static const struct mmc_host_ops rtsx_usb_sdmmc_ops = {
  1055. .request = sdmmc_request,
  1056. .set_ios = sdmmc_set_ios,
  1057. .get_ro = sdmmc_get_ro,
  1058. .get_cd = sdmmc_get_cd,
  1059. .start_signal_voltage_switch = sdmmc_switch_voltage,
  1060. .card_busy = sdmmc_card_busy,
  1061. .execute_tuning = sdmmc_execute_tuning,
  1062. };
  1063. #ifdef RTSX_USB_USE_LEDS_CLASS
  1064. static void rtsx_usb_led_control(struct led_classdev *led,
  1065. enum led_brightness brightness)
  1066. {
  1067. struct rtsx_usb_sdmmc *host = container_of(led,
  1068. struct rtsx_usb_sdmmc, led);
  1069. if (host->host_removal)
  1070. return;
  1071. host->led.brightness = brightness;
  1072. schedule_work(&host->led_work);
  1073. }
  1074. static void rtsx_usb_update_led(struct work_struct *work)
  1075. {
  1076. struct rtsx_usb_sdmmc *host =
  1077. container_of(work, struct rtsx_usb_sdmmc, led_work);
  1078. struct rtsx_ucr *ucr = host->ucr;
  1079. pm_runtime_get_sync(sdmmc_dev(host));
  1080. mutex_lock(&ucr->dev_mutex);
  1081. if (host->led.brightness == LED_OFF)
  1082. rtsx_usb_turn_off_led(ucr);
  1083. else
  1084. rtsx_usb_turn_on_led(ucr);
  1085. mutex_unlock(&ucr->dev_mutex);
  1086. pm_runtime_put(sdmmc_dev(host));
  1087. }
  1088. #endif
  1089. static void rtsx_usb_init_host(struct rtsx_usb_sdmmc *host)
  1090. {
  1091. struct mmc_host *mmc = host->mmc;
  1092. mmc->f_min = 250000;
  1093. mmc->f_max = 208000000;
  1094. mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
  1095. mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED |
  1096. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_BUS_WIDTH_TEST |
  1097. MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | MMC_CAP_UHS_SDR50 |
  1098. MMC_CAP_NEEDS_POLL;
  1099. mmc->caps2 = MMC_CAP2_NO_PRESCAN_POWERUP | MMC_CAP2_FULL_PWR_CYCLE;
  1100. mmc->max_current_330 = 400;
  1101. mmc->max_current_180 = 800;
  1102. mmc->ops = &rtsx_usb_sdmmc_ops;
  1103. mmc->max_segs = 256;
  1104. mmc->max_seg_size = 65536;
  1105. mmc->max_blk_size = 512;
  1106. mmc->max_blk_count = 65535;
  1107. mmc->max_req_size = 524288;
  1108. host->power_mode = MMC_POWER_OFF;
  1109. }
  1110. static int rtsx_usb_sdmmc_drv_probe(struct platform_device *pdev)
  1111. {
  1112. struct mmc_host *mmc;
  1113. struct rtsx_usb_sdmmc *host;
  1114. struct rtsx_ucr *ucr;
  1115. #ifdef RTSX_USB_USE_LEDS_CLASS
  1116. int err;
  1117. #endif
  1118. ucr = usb_get_intfdata(to_usb_interface(pdev->dev.parent));
  1119. if (!ucr)
  1120. return -ENXIO;
  1121. dev_dbg(&(pdev->dev), ": Realtek USB SD/MMC controller found\n");
  1122. mmc = mmc_alloc_host(sizeof(*host), &pdev->dev);
  1123. if (!mmc)
  1124. return -ENOMEM;
  1125. host = mmc_priv(mmc);
  1126. host->ucr = ucr;
  1127. host->mmc = mmc;
  1128. host->pdev = pdev;
  1129. platform_set_drvdata(pdev, host);
  1130. mutex_init(&host->host_mutex);
  1131. rtsx_usb_init_host(host);
  1132. pm_runtime_enable(&pdev->dev);
  1133. #ifdef RTSX_USB_USE_LEDS_CLASS
  1134. snprintf(host->led_name, sizeof(host->led_name),
  1135. "%s::", mmc_hostname(mmc));
  1136. host->led.name = host->led_name;
  1137. host->led.brightness = LED_OFF;
  1138. host->led.default_trigger = mmc_hostname(mmc);
  1139. host->led.brightness_set = rtsx_usb_led_control;
  1140. err = led_classdev_register(mmc_dev(mmc), &host->led);
  1141. if (err)
  1142. dev_err(&(pdev->dev),
  1143. "Failed to register LED device: %d\n", err);
  1144. INIT_WORK(&host->led_work, rtsx_usb_update_led);
  1145. #endif
  1146. mmc_add_host(mmc);
  1147. return 0;
  1148. }
  1149. static int rtsx_usb_sdmmc_drv_remove(struct platform_device *pdev)
  1150. {
  1151. struct rtsx_usb_sdmmc *host = platform_get_drvdata(pdev);
  1152. struct mmc_host *mmc;
  1153. if (!host)
  1154. return 0;
  1155. mmc = host->mmc;
  1156. host->host_removal = true;
  1157. mutex_lock(&host->host_mutex);
  1158. if (host->mrq) {
  1159. dev_dbg(&(pdev->dev),
  1160. "%s: Controller removed during transfer\n",
  1161. mmc_hostname(mmc));
  1162. host->mrq->cmd->error = -ENOMEDIUM;
  1163. if (host->mrq->stop)
  1164. host->mrq->stop->error = -ENOMEDIUM;
  1165. mmc_request_done(mmc, host->mrq);
  1166. }
  1167. mutex_unlock(&host->host_mutex);
  1168. mmc_remove_host(mmc);
  1169. #ifdef RTSX_USB_USE_LEDS_CLASS
  1170. cancel_work_sync(&host->led_work);
  1171. led_classdev_unregister(&host->led);
  1172. #endif
  1173. mmc_free_host(mmc);
  1174. pm_runtime_disable(&pdev->dev);
  1175. platform_set_drvdata(pdev, NULL);
  1176. dev_dbg(&(pdev->dev),
  1177. ": Realtek USB SD/MMC module has been removed\n");
  1178. return 0;
  1179. }
  1180. static const struct platform_device_id rtsx_usb_sdmmc_ids[] = {
  1181. {
  1182. .name = "rtsx_usb_sdmmc",
  1183. }, {
  1184. /* sentinel */
  1185. }
  1186. };
  1187. MODULE_DEVICE_TABLE(platform, rtsx_usb_sdmmc_ids);
  1188. static struct platform_driver rtsx_usb_sdmmc_driver = {
  1189. .probe = rtsx_usb_sdmmc_drv_probe,
  1190. .remove = rtsx_usb_sdmmc_drv_remove,
  1191. .id_table = rtsx_usb_sdmmc_ids,
  1192. .driver = {
  1193. .name = "rtsx_usb_sdmmc",
  1194. },
  1195. };
  1196. module_platform_driver(rtsx_usb_sdmmc_driver);
  1197. MODULE_LICENSE("GPL v2");
  1198. MODULE_AUTHOR("Roger Tseng <rogerable@realtek.com>");
  1199. MODULE_DESCRIPTION("Realtek USB SD/MMC Card Host Driver");