core.c 24 KB

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  1. /*
  2. * Copyright (C) 2006, Rusty Russell <rusty@rustcorp.com.au> IBM Corporation.
  3. * Copyright (C) 2007, Jes Sorensen <jes@sgi.com> SGI.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13. * NON INFRINGEMENT. See the GNU General Public License for more
  14. * details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. /*P:450
  21. * This file contains the x86-specific lguest code. It used to be all
  22. * mixed in with drivers/lguest/core.c but several foolhardy code slashers
  23. * wrestled most of the dependencies out to here in preparation for porting
  24. * lguest to other architectures (see what I mean by foolhardy?).
  25. *
  26. * This also contains a couple of non-obvious setup and teardown pieces which
  27. * were implemented after days of debugging pain.
  28. :*/
  29. #include <linux/kernel.h>
  30. #include <linux/start_kernel.h>
  31. #include <linux/string.h>
  32. #include <linux/console.h>
  33. #include <linux/screen_info.h>
  34. #include <linux/irq.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/clocksource.h>
  37. #include <linux/clockchips.h>
  38. #include <linux/cpu.h>
  39. #include <linux/lguest.h>
  40. #include <linux/lguest_launcher.h>
  41. #include <asm/paravirt.h>
  42. #include <asm/param.h>
  43. #include <asm/page.h>
  44. #include <asm/pgtable.h>
  45. #include <asm/desc.h>
  46. #include <asm/setup.h>
  47. #include <asm/lguest.h>
  48. #include <asm/uaccess.h>
  49. #include <asm/fpu/internal.h>
  50. #include <asm/tlbflush.h>
  51. #include "../lg.h"
  52. static int cpu_had_pge;
  53. static struct {
  54. unsigned long offset;
  55. unsigned short segment;
  56. } lguest_entry;
  57. /* Offset from where switcher.S was compiled to where we've copied it */
  58. static unsigned long switcher_offset(void)
  59. {
  60. return switcher_addr - (unsigned long)start_switcher_text;
  61. }
  62. /* This cpu's struct lguest_pages (after the Switcher text page) */
  63. static struct lguest_pages *lguest_pages(unsigned int cpu)
  64. {
  65. return &(((struct lguest_pages *)(switcher_addr + PAGE_SIZE))[cpu]);
  66. }
  67. static DEFINE_PER_CPU(struct lg_cpu *, lg_last_cpu);
  68. /*S:010
  69. * We approach the Switcher.
  70. *
  71. * Remember that each CPU has two pages which are visible to the Guest when it
  72. * runs on that CPU. This has to contain the state for that Guest: we copy the
  73. * state in just before we run the Guest.
  74. *
  75. * Each Guest has "changed" flags which indicate what has changed in the Guest
  76. * since it last ran. We saw this set in interrupts_and_traps.c and
  77. * segments.c.
  78. */
  79. static void copy_in_guest_info(struct lg_cpu *cpu, struct lguest_pages *pages)
  80. {
  81. /*
  82. * Copying all this data can be quite expensive. We usually run the
  83. * same Guest we ran last time (and that Guest hasn't run anywhere else
  84. * meanwhile). If that's not the case, we pretend everything in the
  85. * Guest has changed.
  86. */
  87. if (__this_cpu_read(lg_last_cpu) != cpu || cpu->last_pages != pages) {
  88. __this_cpu_write(lg_last_cpu, cpu);
  89. cpu->last_pages = pages;
  90. cpu->changed = CHANGED_ALL;
  91. }
  92. /*
  93. * These copies are pretty cheap, so we do them unconditionally: */
  94. /* Save the current Host top-level page directory.
  95. */
  96. pages->state.host_cr3 = __pa(current->mm->pgd);
  97. /*
  98. * Set up the Guest's page tables to see this CPU's pages (and no
  99. * other CPU's pages).
  100. */
  101. map_switcher_in_guest(cpu, pages);
  102. /*
  103. * Set up the two "TSS" members which tell the CPU what stack to use
  104. * for traps which do directly into the Guest (ie. traps at privilege
  105. * level 1).
  106. */
  107. pages->state.guest_tss.sp1 = cpu->esp1;
  108. pages->state.guest_tss.ss1 = cpu->ss1;
  109. /* Copy direct-to-Guest trap entries. */
  110. if (cpu->changed & CHANGED_IDT)
  111. copy_traps(cpu, pages->state.guest_idt, default_idt_entries);
  112. /* Copy all GDT entries which the Guest can change. */
  113. if (cpu->changed & CHANGED_GDT)
  114. copy_gdt(cpu, pages->state.guest_gdt);
  115. /* If only the TLS entries have changed, copy them. */
  116. else if (cpu->changed & CHANGED_GDT_TLS)
  117. copy_gdt_tls(cpu, pages->state.guest_gdt);
  118. /* Mark the Guest as unchanged for next time. */
  119. cpu->changed = 0;
  120. }
  121. /* Finally: the code to actually call into the Switcher to run the Guest. */
  122. static void run_guest_once(struct lg_cpu *cpu, struct lguest_pages *pages)
  123. {
  124. /* This is a dummy value we need for GCC's sake. */
  125. unsigned int clobber;
  126. /*
  127. * Copy the guest-specific information into this CPU's "struct
  128. * lguest_pages".
  129. */
  130. copy_in_guest_info(cpu, pages);
  131. /*
  132. * Set the trap number to 256 (impossible value). If we fault while
  133. * switching to the Guest (bad segment registers or bug), this will
  134. * cause us to abort the Guest.
  135. */
  136. cpu->regs->trapnum = 256;
  137. /*
  138. * Now: we push the "eflags" register on the stack, then do an "lcall".
  139. * This is how we change from using the kernel code segment to using
  140. * the dedicated lguest code segment, as well as jumping into the
  141. * Switcher.
  142. *
  143. * The lcall also pushes the old code segment (KERNEL_CS) onto the
  144. * stack, then the address of this call. This stack layout happens to
  145. * exactly match the stack layout created by an interrupt...
  146. */
  147. asm volatile("pushf; lcall *%4"
  148. /*
  149. * This is how we tell GCC that %eax ("a") and %ebx ("b")
  150. * are changed by this routine. The "=" means output.
  151. */
  152. : "=a"(clobber), "=b"(clobber)
  153. /*
  154. * %eax contains the pages pointer. ("0" refers to the
  155. * 0-th argument above, ie "a"). %ebx contains the
  156. * physical address of the Guest's top-level page
  157. * directory.
  158. */
  159. : "0"(pages),
  160. "1"(__pa(cpu->lg->pgdirs[cpu->cpu_pgd].pgdir)),
  161. "m"(lguest_entry)
  162. /*
  163. * We tell gcc that all these registers could change,
  164. * which means we don't have to save and restore them in
  165. * the Switcher.
  166. */
  167. : "memory", "%edx", "%ecx", "%edi", "%esi");
  168. }
  169. /*:*/
  170. unsigned long *lguest_arch_regptr(struct lg_cpu *cpu, size_t reg_off, bool any)
  171. {
  172. switch (reg_off) {
  173. case offsetof(struct pt_regs, bx):
  174. return &cpu->regs->ebx;
  175. case offsetof(struct pt_regs, cx):
  176. return &cpu->regs->ecx;
  177. case offsetof(struct pt_regs, dx):
  178. return &cpu->regs->edx;
  179. case offsetof(struct pt_regs, si):
  180. return &cpu->regs->esi;
  181. case offsetof(struct pt_regs, di):
  182. return &cpu->regs->edi;
  183. case offsetof(struct pt_regs, bp):
  184. return &cpu->regs->ebp;
  185. case offsetof(struct pt_regs, ax):
  186. return &cpu->regs->eax;
  187. case offsetof(struct pt_regs, ip):
  188. return &cpu->regs->eip;
  189. case offsetof(struct pt_regs, sp):
  190. return &cpu->regs->esp;
  191. }
  192. /* Launcher can read these, but we don't allow any setting. */
  193. if (any) {
  194. switch (reg_off) {
  195. case offsetof(struct pt_regs, ds):
  196. return &cpu->regs->ds;
  197. case offsetof(struct pt_regs, es):
  198. return &cpu->regs->es;
  199. case offsetof(struct pt_regs, fs):
  200. return &cpu->regs->fs;
  201. case offsetof(struct pt_regs, gs):
  202. return &cpu->regs->gs;
  203. case offsetof(struct pt_regs, cs):
  204. return &cpu->regs->cs;
  205. case offsetof(struct pt_regs, flags):
  206. return &cpu->regs->eflags;
  207. case offsetof(struct pt_regs, ss):
  208. return &cpu->regs->ss;
  209. }
  210. }
  211. return NULL;
  212. }
  213. /*M:002
  214. * There are hooks in the scheduler which we can register to tell when we
  215. * get kicked off the CPU (preempt_notifier_register()). This would allow us
  216. * to lazily disable SYSENTER which would regain some performance, and should
  217. * also simplify copy_in_guest_info(). Note that we'd still need to restore
  218. * things when we exit to Launcher userspace, but that's fairly easy.
  219. *
  220. * We could also try using these hooks for PGE, but that might be too expensive.
  221. *
  222. * The hooks were designed for KVM, but we can also put them to good use.
  223. :*/
  224. /*H:040
  225. * This is the i386-specific code to setup and run the Guest. Interrupts
  226. * are disabled: we own the CPU.
  227. */
  228. void lguest_arch_run_guest(struct lg_cpu *cpu)
  229. {
  230. /*
  231. * Remember the awfully-named TS bit? If the Guest has asked to set it
  232. * we set it now, so we can trap and pass that trap to the Guest if it
  233. * uses the FPU.
  234. */
  235. if (cpu->ts && fpregs_active())
  236. stts();
  237. /*
  238. * SYSENTER is an optimized way of doing system calls. We can't allow
  239. * it because it always jumps to privilege level 0. A normal Guest
  240. * won't try it because we don't advertise it in CPUID, but a malicious
  241. * Guest (or malicious Guest userspace program) could, so we tell the
  242. * CPU to disable it before running the Guest.
  243. */
  244. if (boot_cpu_has(X86_FEATURE_SEP))
  245. wrmsr(MSR_IA32_SYSENTER_CS, 0, 0);
  246. /*
  247. * Now we actually run the Guest. It will return when something
  248. * interesting happens, and we can examine its registers to see what it
  249. * was doing.
  250. */
  251. run_guest_once(cpu, lguest_pages(raw_smp_processor_id()));
  252. /*
  253. * Note that the "regs" structure contains two extra entries which are
  254. * not really registers: a trap number which says what interrupt or
  255. * trap made the switcher code come back, and an error code which some
  256. * traps set.
  257. */
  258. /* Restore SYSENTER if it's supposed to be on. */
  259. if (boot_cpu_has(X86_FEATURE_SEP))
  260. wrmsr(MSR_IA32_SYSENTER_CS, __KERNEL_CS, 0);
  261. /* Clear the host TS bit if it was set above. */
  262. if (cpu->ts && fpregs_active())
  263. clts();
  264. /*
  265. * If the Guest page faulted, then the cr2 register will tell us the
  266. * bad virtual address. We have to grab this now, because once we
  267. * re-enable interrupts an interrupt could fault and thus overwrite
  268. * cr2, or we could even move off to a different CPU.
  269. */
  270. if (cpu->regs->trapnum == 14)
  271. cpu->arch.last_pagefault = read_cr2();
  272. /*
  273. * Similarly, if we took a trap because the Guest used the FPU,
  274. * we have to restore the FPU it expects to see.
  275. * fpu__restore() may sleep and we may even move off to
  276. * a different CPU. So all the critical stuff should be done
  277. * before this.
  278. */
  279. else if (cpu->regs->trapnum == 7 && !fpregs_active())
  280. fpu__restore(&current->thread.fpu);
  281. }
  282. /*H:130
  283. * Now we've examined the hypercall code; our Guest can make requests.
  284. * Our Guest is usually so well behaved; it never tries to do things it isn't
  285. * allowed to, and uses hypercalls instead. Unfortunately, Linux's paravirtual
  286. * infrastructure isn't quite complete, because it doesn't contain replacements
  287. * for the Intel I/O instructions. As a result, the Guest sometimes fumbles
  288. * across one during the boot process as it probes for various things which are
  289. * usually attached to a PC.
  290. *
  291. * When the Guest uses one of these instructions, we get a trap (General
  292. * Protection Fault) and come here. We queue this to be sent out to the
  293. * Launcher to handle.
  294. */
  295. /*
  296. * The eip contains the *virtual* address of the Guest's instruction:
  297. * we copy the instruction here so the Launcher doesn't have to walk
  298. * the page tables to decode it. We handle the case (eg. in a kernel
  299. * module) where the instruction is over two pages, and the pages are
  300. * virtually but not physically contiguous.
  301. *
  302. * The longest possible x86 instruction is 15 bytes, but we don't handle
  303. * anything that strange.
  304. */
  305. static void copy_from_guest(struct lg_cpu *cpu,
  306. void *dst, unsigned long vaddr, size_t len)
  307. {
  308. size_t to_page_end = PAGE_SIZE - (vaddr % PAGE_SIZE);
  309. unsigned long paddr;
  310. BUG_ON(len > PAGE_SIZE);
  311. /* If it goes over a page, copy in two parts. */
  312. if (len > to_page_end) {
  313. /* But make sure the next page is mapped! */
  314. if (__guest_pa(cpu, vaddr + to_page_end, &paddr))
  315. copy_from_guest(cpu, dst + to_page_end,
  316. vaddr + to_page_end,
  317. len - to_page_end);
  318. else
  319. /* Otherwise fill with zeroes. */
  320. memset(dst + to_page_end, 0, len - to_page_end);
  321. len = to_page_end;
  322. }
  323. /* This will kill the guest if it isn't mapped, but that
  324. * shouldn't happen. */
  325. __lgread(cpu, dst, guest_pa(cpu, vaddr), len);
  326. }
  327. static void setup_emulate_insn(struct lg_cpu *cpu)
  328. {
  329. cpu->pending.trap = 13;
  330. copy_from_guest(cpu, cpu->pending.insn, cpu->regs->eip,
  331. sizeof(cpu->pending.insn));
  332. }
  333. static void setup_iomem_insn(struct lg_cpu *cpu, unsigned long iomem_addr)
  334. {
  335. cpu->pending.trap = 14;
  336. cpu->pending.addr = iomem_addr;
  337. copy_from_guest(cpu, cpu->pending.insn, cpu->regs->eip,
  338. sizeof(cpu->pending.insn));
  339. }
  340. /*H:050 Once we've re-enabled interrupts, we look at why the Guest exited. */
  341. void lguest_arch_handle_trap(struct lg_cpu *cpu)
  342. {
  343. unsigned long iomem_addr;
  344. switch (cpu->regs->trapnum) {
  345. case 13: /* We've intercepted a General Protection Fault. */
  346. /* Hand to Launcher to emulate those pesky IN and OUT insns */
  347. if (cpu->regs->errcode == 0) {
  348. setup_emulate_insn(cpu);
  349. return;
  350. }
  351. break;
  352. case 14: /* We've intercepted a Page Fault. */
  353. /*
  354. * The Guest accessed a virtual address that wasn't mapped.
  355. * This happens a lot: we don't actually set up most of the page
  356. * tables for the Guest at all when we start: as it runs it asks
  357. * for more and more, and we set them up as required. In this
  358. * case, we don't even tell the Guest that the fault happened.
  359. *
  360. * The errcode tells whether this was a read or a write, and
  361. * whether kernel or userspace code.
  362. */
  363. if (demand_page(cpu, cpu->arch.last_pagefault,
  364. cpu->regs->errcode, &iomem_addr))
  365. return;
  366. /* Was this an access to memory mapped IO? */
  367. if (iomem_addr) {
  368. /* Tell Launcher, let it handle it. */
  369. setup_iomem_insn(cpu, iomem_addr);
  370. return;
  371. }
  372. /*
  373. * OK, it's really not there (or not OK): the Guest needs to
  374. * know. We write out the cr2 value so it knows where the
  375. * fault occurred.
  376. *
  377. * Note that if the Guest were really messed up, this could
  378. * happen before it's done the LHCALL_LGUEST_INIT hypercall, so
  379. * lg->lguest_data could be NULL
  380. */
  381. if (cpu->lg->lguest_data &&
  382. put_user(cpu->arch.last_pagefault,
  383. &cpu->lg->lguest_data->cr2))
  384. kill_guest(cpu, "Writing cr2");
  385. break;
  386. case 7: /* We've intercepted a Device Not Available fault. */
  387. /*
  388. * If the Guest doesn't want to know, we already restored the
  389. * Floating Point Unit, so we just continue without telling it.
  390. */
  391. if (!cpu->ts)
  392. return;
  393. break;
  394. case 32 ... 255:
  395. /* This might be a syscall. */
  396. if (could_be_syscall(cpu->regs->trapnum))
  397. break;
  398. /*
  399. * Other values mean a real interrupt occurred, in which case
  400. * the Host handler has already been run. We just do a
  401. * friendly check if another process should now be run, then
  402. * return to run the Guest again.
  403. */
  404. cond_resched();
  405. return;
  406. case LGUEST_TRAP_ENTRY:
  407. /*
  408. * Our 'struct hcall_args' maps directly over our regs: we set
  409. * up the pointer now to indicate a hypercall is pending.
  410. */
  411. cpu->hcall = (struct hcall_args *)cpu->regs;
  412. return;
  413. }
  414. /* We didn't handle the trap, so it needs to go to the Guest. */
  415. if (!deliver_trap(cpu, cpu->regs->trapnum))
  416. /*
  417. * If the Guest doesn't have a handler (either it hasn't
  418. * registered any yet, or it's one of the faults we don't let
  419. * it handle), it dies with this cryptic error message.
  420. */
  421. kill_guest(cpu, "unhandled trap %li at %#lx (%#lx)",
  422. cpu->regs->trapnum, cpu->regs->eip,
  423. cpu->regs->trapnum == 14 ? cpu->arch.last_pagefault
  424. : cpu->regs->errcode);
  425. }
  426. /*
  427. * Now we can look at each of the routines this calls, in increasing order of
  428. * complexity: do_hypercalls(), emulate_insn(), maybe_do_interrupt(),
  429. * deliver_trap() and demand_page(). After all those, we'll be ready to
  430. * examine the Switcher, and our philosophical understanding of the Host/Guest
  431. * duality will be complete.
  432. :*/
  433. static void adjust_pge(void *on)
  434. {
  435. if (on)
  436. cr4_set_bits(X86_CR4_PGE);
  437. else
  438. cr4_clear_bits(X86_CR4_PGE);
  439. }
  440. /*H:020
  441. * Now the Switcher is mapped and every thing else is ready, we need to do
  442. * some more i386-specific initialization.
  443. */
  444. void __init lguest_arch_host_init(void)
  445. {
  446. int i;
  447. /*
  448. * Most of the x86/switcher_32.S doesn't care that it's been moved; on
  449. * Intel, jumps are relative, and it doesn't access any references to
  450. * external code or data.
  451. *
  452. * The only exception is the interrupt handlers in switcher.S: their
  453. * addresses are placed in a table (default_idt_entries), so we need to
  454. * update the table with the new addresses. switcher_offset() is a
  455. * convenience function which returns the distance between the
  456. * compiled-in switcher code and the high-mapped copy we just made.
  457. */
  458. for (i = 0; i < IDT_ENTRIES; i++)
  459. default_idt_entries[i] += switcher_offset();
  460. /*
  461. * Set up the Switcher's per-cpu areas.
  462. *
  463. * Each CPU gets two pages of its own within the high-mapped region
  464. * (aka. "struct lguest_pages"). Much of this can be initialized now,
  465. * but some depends on what Guest we are running (which is set up in
  466. * copy_in_guest_info()).
  467. */
  468. for_each_possible_cpu(i) {
  469. /* lguest_pages() returns this CPU's two pages. */
  470. struct lguest_pages *pages = lguest_pages(i);
  471. /* This is a convenience pointer to make the code neater. */
  472. struct lguest_ro_state *state = &pages->state;
  473. /*
  474. * The Global Descriptor Table: the Host has a different one
  475. * for each CPU. We keep a descriptor for the GDT which says
  476. * where it is and how big it is (the size is actually the last
  477. * byte, not the size, hence the "-1").
  478. */
  479. state->host_gdt_desc.size = GDT_SIZE-1;
  480. state->host_gdt_desc.address = (long)get_cpu_gdt_table(i);
  481. /*
  482. * All CPUs on the Host use the same Interrupt Descriptor
  483. * Table, so we just use store_idt(), which gets this CPU's IDT
  484. * descriptor.
  485. */
  486. store_idt(&state->host_idt_desc);
  487. /*
  488. * The descriptors for the Guest's GDT and IDT can be filled
  489. * out now, too. We copy the GDT & IDT into ->guest_gdt and
  490. * ->guest_idt before actually running the Guest.
  491. */
  492. state->guest_idt_desc.size = sizeof(state->guest_idt)-1;
  493. state->guest_idt_desc.address = (long)&state->guest_idt;
  494. state->guest_gdt_desc.size = sizeof(state->guest_gdt)-1;
  495. state->guest_gdt_desc.address = (long)&state->guest_gdt;
  496. /*
  497. * We know where we want the stack to be when the Guest enters
  498. * the Switcher: in pages->regs. The stack grows upwards, so
  499. * we start it at the end of that structure.
  500. */
  501. state->guest_tss.sp0 = (long)(&pages->regs + 1);
  502. /*
  503. * And this is the GDT entry to use for the stack: we keep a
  504. * couple of special LGUEST entries.
  505. */
  506. state->guest_tss.ss0 = LGUEST_DS;
  507. /*
  508. * x86 can have a finegrained bitmap which indicates what I/O
  509. * ports the process can use. We set it to the end of our
  510. * structure, meaning "none".
  511. */
  512. state->guest_tss.io_bitmap_base = sizeof(state->guest_tss);
  513. /*
  514. * Some GDT entries are the same across all Guests, so we can
  515. * set them up now.
  516. */
  517. setup_default_gdt_entries(state);
  518. /* Most IDT entries are the same for all Guests, too.*/
  519. setup_default_idt_entries(state, default_idt_entries);
  520. /*
  521. * The Host needs to be able to use the LGUEST segments on this
  522. * CPU, too, so put them in the Host GDT.
  523. */
  524. get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_CS] = FULL_EXEC_SEGMENT;
  525. get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_DS] = FULL_SEGMENT;
  526. }
  527. /*
  528. * In the Switcher, we want the %cs segment register to use the
  529. * LGUEST_CS GDT entry: we've put that in the Host and Guest GDTs, so
  530. * it will be undisturbed when we switch. To change %cs and jump we
  531. * need this structure to feed to Intel's "lcall" instruction.
  532. */
  533. lguest_entry.offset = (long)switch_to_guest + switcher_offset();
  534. lguest_entry.segment = LGUEST_CS;
  535. /*
  536. * Finally, we need to turn off "Page Global Enable". PGE is an
  537. * optimization where page table entries are specially marked to show
  538. * they never change. The Host kernel marks all the kernel pages this
  539. * way because it's always present, even when userspace is running.
  540. *
  541. * Lguest breaks this: unbeknownst to the rest of the Host kernel, we
  542. * switch to the Guest kernel. If you don't disable this on all CPUs,
  543. * you'll get really weird bugs that you'll chase for two days.
  544. *
  545. * I used to turn PGE off every time we switched to the Guest and back
  546. * on when we return, but that slowed the Switcher down noticibly.
  547. */
  548. /*
  549. * We don't need the complexity of CPUs coming and going while we're
  550. * doing this.
  551. */
  552. get_online_cpus();
  553. if (boot_cpu_has(X86_FEATURE_PGE)) { /* We have a broader idea of "global". */
  554. /* Remember that this was originally set (for cleanup). */
  555. cpu_had_pge = 1;
  556. /*
  557. * adjust_pge is a helper function which sets or unsets the PGE
  558. * bit on its CPU, depending on the argument (0 == unset).
  559. */
  560. on_each_cpu(adjust_pge, (void *)0, 1);
  561. /* Turn off the feature in the global feature set. */
  562. clear_cpu_cap(&boot_cpu_data, X86_FEATURE_PGE);
  563. }
  564. put_online_cpus();
  565. }
  566. /*:*/
  567. void __exit lguest_arch_host_fini(void)
  568. {
  569. /* If we had PGE before we started, turn it back on now. */
  570. get_online_cpus();
  571. if (cpu_had_pge) {
  572. set_cpu_cap(&boot_cpu_data, X86_FEATURE_PGE);
  573. /* adjust_pge's argument "1" means set PGE. */
  574. on_each_cpu(adjust_pge, (void *)1, 1);
  575. }
  576. put_online_cpus();
  577. }
  578. /*H:122 The i386-specific hypercalls simply farm out to the right functions. */
  579. int lguest_arch_do_hcall(struct lg_cpu *cpu, struct hcall_args *args)
  580. {
  581. switch (args->arg0) {
  582. case LHCALL_LOAD_GDT_ENTRY:
  583. load_guest_gdt_entry(cpu, args->arg1, args->arg2, args->arg3);
  584. break;
  585. case LHCALL_LOAD_IDT_ENTRY:
  586. load_guest_idt_entry(cpu, args->arg1, args->arg2, args->arg3);
  587. break;
  588. case LHCALL_LOAD_TLS:
  589. guest_load_tls(cpu, args->arg1);
  590. break;
  591. default:
  592. /* Bad Guest. Bad! */
  593. return -EIO;
  594. }
  595. return 0;
  596. }
  597. /*H:126 i386-specific hypercall initialization: */
  598. int lguest_arch_init_hypercalls(struct lg_cpu *cpu)
  599. {
  600. u32 tsc_speed;
  601. /*
  602. * The pointer to the Guest's "struct lguest_data" is the only argument.
  603. * We check that address now.
  604. */
  605. if (!lguest_address_ok(cpu->lg, cpu->hcall->arg1,
  606. sizeof(*cpu->lg->lguest_data)))
  607. return -EFAULT;
  608. /*
  609. * Having checked it, we simply set lg->lguest_data to point straight
  610. * into the Launcher's memory at the right place and then use
  611. * copy_to_user/from_user from now on, instead of lgread/write. I put
  612. * this in to show that I'm not immune to writing stupid
  613. * optimizations.
  614. */
  615. cpu->lg->lguest_data = cpu->lg->mem_base + cpu->hcall->arg1;
  616. /*
  617. * We insist that the Time Stamp Counter exist and doesn't change with
  618. * cpu frequency. Some devious chip manufacturers decided that TSC
  619. * changes could be handled in software. I decided that time going
  620. * backwards might be good for benchmarks, but it's bad for users.
  621. *
  622. * We also insist that the TSC be stable: the kernel detects unreliable
  623. * TSCs for its own purposes, and we use that here.
  624. */
  625. if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && !check_tsc_unstable())
  626. tsc_speed = tsc_khz;
  627. else
  628. tsc_speed = 0;
  629. if (put_user(tsc_speed, &cpu->lg->lguest_data->tsc_khz))
  630. return -EFAULT;
  631. /* The interrupt code might not like the system call vector. */
  632. if (!check_syscall_vector(cpu->lg))
  633. kill_guest(cpu, "bad syscall vector");
  634. return 0;
  635. }
  636. /*:*/
  637. /*L:030
  638. * Most of the Guest's registers are left alone: we used get_zeroed_page() to
  639. * allocate the structure, so they will be 0.
  640. */
  641. void lguest_arch_setup_regs(struct lg_cpu *cpu, unsigned long start)
  642. {
  643. struct lguest_regs *regs = cpu->regs;
  644. /*
  645. * There are four "segment" registers which the Guest needs to boot:
  646. * The "code segment" register (cs) refers to the kernel code segment
  647. * __KERNEL_CS, and the "data", "extra" and "stack" segment registers
  648. * refer to the kernel data segment __KERNEL_DS.
  649. *
  650. * The privilege level is packed into the lower bits. The Guest runs
  651. * at privilege level 1 (GUEST_PL).
  652. */
  653. regs->ds = regs->es = regs->ss = __KERNEL_DS|GUEST_PL;
  654. regs->cs = __KERNEL_CS|GUEST_PL;
  655. /*
  656. * The "eflags" register contains miscellaneous flags. Bit 1 (0x002)
  657. * is supposed to always be "1". Bit 9 (0x200) controls whether
  658. * interrupts are enabled. We always leave interrupts enabled while
  659. * running the Guest.
  660. */
  661. regs->eflags = X86_EFLAGS_IF | X86_EFLAGS_FIXED;
  662. /*
  663. * The "Extended Instruction Pointer" register says where the Guest is
  664. * running.
  665. */
  666. regs->eip = start;
  667. /*
  668. * %esi points to our boot information, at physical address 0, so don't
  669. * touch it.
  670. */
  671. /* There are a couple of GDT entries the Guest expects at boot. */
  672. setup_guest_gdt(cpu);
  673. }