irq-gic-realview.c 2.2 KB

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  1. /*
  2. * Special GIC quirks for the ARM RealView
  3. * Copyright (C) 2015 Linus Walleij
  4. */
  5. #include <linux/of.h>
  6. #include <linux/regmap.h>
  7. #include <linux/mfd/syscon.h>
  8. #include <linux/bitops.h>
  9. #include <linux/irqchip.h>
  10. #include <linux/irqchip/arm-gic.h>
  11. #define REALVIEW_SYS_LOCK_OFFSET 0x20
  12. #define REALVIEW_SYS_PLD_CTRL1 0x74
  13. #define REALVIEW_EB_REVB_SYS_PLD_CTRL1 0xD8
  14. #define VERSATILE_LOCK_VAL 0xA05F
  15. #define PLD_INTMODE_MASK BIT(22)|BIT(23)|BIT(24)
  16. #define PLD_INTMODE_LEGACY 0x0
  17. #define PLD_INTMODE_NEW_DCC BIT(22)
  18. #define PLD_INTMODE_NEW_NO_DCC BIT(23)
  19. #define PLD_INTMODE_FIQ_ENABLE BIT(24)
  20. /* For some reason RealView EB Rev B moved this register */
  21. static const struct of_device_id syscon_pldset_of_match[] = {
  22. {
  23. .compatible = "arm,realview-eb11mp-revb-syscon",
  24. .data = (void *)REALVIEW_EB_REVB_SYS_PLD_CTRL1,
  25. },
  26. {
  27. .compatible = "arm,realview-eb11mp-revc-syscon",
  28. .data = (void *)REALVIEW_SYS_PLD_CTRL1,
  29. },
  30. {
  31. .compatible = "arm,realview-eb-syscon",
  32. .data = (void *)REALVIEW_SYS_PLD_CTRL1,
  33. },
  34. {
  35. .compatible = "arm,realview-pb11mp-syscon",
  36. .data = (void *)REALVIEW_SYS_PLD_CTRL1,
  37. },
  38. {},
  39. };
  40. static int __init
  41. realview_gic_of_init(struct device_node *node, struct device_node *parent)
  42. {
  43. static struct regmap *map;
  44. struct device_node *np;
  45. const struct of_device_id *gic_id;
  46. u32 pld1_ctrl;
  47. np = of_find_matching_node_and_match(NULL, syscon_pldset_of_match,
  48. &gic_id);
  49. if (!np)
  50. return -ENODEV;
  51. pld1_ctrl = (u32)gic_id->data;
  52. /* The PB11MPCore GIC needs to be configured in the syscon */
  53. map = syscon_node_to_regmap(np);
  54. if (!IS_ERR(map)) {
  55. /* new irq mode with no DCC */
  56. regmap_write(map, REALVIEW_SYS_LOCK_OFFSET,
  57. VERSATILE_LOCK_VAL);
  58. regmap_update_bits(map, pld1_ctrl,
  59. PLD_INTMODE_NEW_NO_DCC,
  60. PLD_INTMODE_MASK);
  61. regmap_write(map, REALVIEW_SYS_LOCK_OFFSET, 0x0000);
  62. pr_info("RealView GIC: set up interrupt controller to NEW mode, no DCC\n");
  63. } else {
  64. pr_err("RealView GIC setup: could not find syscon\n");
  65. return -ENODEV;
  66. }
  67. return gic_of_init(node, parent);
  68. }
  69. IRQCHIP_DECLARE(armtc11mp_gic, "arm,tc11mp-gic", realview_gic_of_init);
  70. IRQCHIP_DECLARE(armeb11mp_gic, "arm,eb11mp-gic", realview_gic_of_init);