i40iw_p.h 4.0 KB

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  1. /*******************************************************************************
  2. *
  3. * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenFabrics.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. *
  33. *******************************************************************************/
  34. #ifndef I40IW_P_H
  35. #define I40IW_P_H
  36. #define PAUSE_TIMER_VALUE 0xFFFF
  37. #define REFRESH_THRESHOLD 0x7FFF
  38. #define HIGH_THRESHOLD 0x800
  39. #define LOW_THRESHOLD 0x200
  40. #define ALL_TC2PFC 0xFF
  41. void i40iw_debug_buf(struct i40iw_sc_dev *dev, enum i40iw_debug_flag mask,
  42. char *desc, u64 *buf, u32 size);
  43. /* init operations */
  44. enum i40iw_status_code i40iw_device_init(struct i40iw_sc_dev *dev,
  45. struct i40iw_device_init_info *info);
  46. enum i40iw_status_code i40iw_device_init_pestat(struct i40iw_dev_pestat *);
  47. void i40iw_sc_cqp_post_sq(struct i40iw_sc_cqp *cqp);
  48. u64 *i40iw_sc_cqp_get_next_send_wqe(struct i40iw_sc_cqp *cqp, u64 scratch);
  49. enum i40iw_status_code i40iw_sc_mr_fast_register(struct i40iw_sc_qp *qp,
  50. struct i40iw_fast_reg_stag_info *info,
  51. bool post_sq);
  52. /* HMC/FPM functions */
  53. enum i40iw_status_code i40iw_sc_init_iw_hmc(struct i40iw_sc_dev *dev,
  54. u8 hmc_fn_id);
  55. enum i40iw_status_code i40iw_pf_init_vfhmc(struct i40iw_sc_dev *dev, u8 vf_hmc_fn_id,
  56. u32 *vf_cnt_array);
  57. /* cqp misc functions */
  58. void i40iw_terminate_send_fin(struct i40iw_sc_qp *qp);
  59. void i40iw_terminate_connection(struct i40iw_sc_qp *qp, struct i40iw_aeqe_info *info);
  60. void i40iw_terminate_received(struct i40iw_sc_qp *qp, struct i40iw_aeqe_info *info);
  61. enum i40iw_status_code i40iw_sc_suspend_qp(struct i40iw_sc_cqp *cqp,
  62. struct i40iw_sc_qp *qp, u64 scratch);
  63. enum i40iw_status_code i40iw_sc_resume_qp(struct i40iw_sc_cqp *cqp,
  64. struct i40iw_sc_qp *qp, u64 scratch);
  65. enum i40iw_status_code i40iw_sc_static_hmc_pages_allocated(struct i40iw_sc_cqp *cqp,
  66. u64 scratch, u8 hmc_fn_id,
  67. bool post_sq,
  68. bool poll_registers);
  69. enum i40iw_status_code i40iw_config_fpm_values(struct i40iw_sc_dev *dev, u32 qp_count);
  70. void free_sd_mem(struct i40iw_sc_dev *dev);
  71. enum i40iw_status_code i40iw_process_cqp_cmd(struct i40iw_sc_dev *dev,
  72. struct cqp_commands_info *pcmdinfo);
  73. enum i40iw_status_code i40iw_process_bh(struct i40iw_sc_dev *dev);
  74. /* prototype for functions used for dynamic memory allocation */
  75. enum i40iw_status_code i40iw_allocate_dma_mem(struct i40iw_hw *hw,
  76. struct i40iw_dma_mem *mem, u64 size,
  77. u32 alignment);
  78. void i40iw_free_dma_mem(struct i40iw_hw *hw, struct i40iw_dma_mem *mem);
  79. enum i40iw_status_code i40iw_allocate_virt_mem(struct i40iw_hw *hw,
  80. struct i40iw_virt_mem *mem, u32 size);
  81. enum i40iw_status_code i40iw_free_virt_mem(struct i40iw_hw *hw,
  82. struct i40iw_virt_mem *mem);
  83. u8 i40iw_get_encoded_wqe_size(u32 wqsize, bool cqpsq);
  84. #endif