i40iw_hmc.h 7.2 KB

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  1. /*******************************************************************************
  2. *
  3. * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenFabrics.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. *
  33. *******************************************************************************/
  34. #ifndef I40IW_HMC_H
  35. #define I40IW_HMC_H
  36. #include "i40iw_d.h"
  37. struct i40iw_hw;
  38. enum i40iw_status_code;
  39. #define I40IW_HMC_MAX_BP_COUNT 512
  40. #define I40IW_MAX_SD_ENTRIES 11
  41. #define I40IW_HW_DBG_HMC_INVALID_BP_MARK 0xCA
  42. #define I40IW_HMC_INFO_SIGNATURE 0x484D5347
  43. #define I40IW_HMC_PD_CNT_IN_SD 512
  44. #define I40IW_HMC_DIRECT_BP_SIZE 0x200000
  45. #define I40IW_HMC_MAX_SD_COUNT 4096
  46. #define I40IW_HMC_PAGED_BP_SIZE 4096
  47. #define I40IW_HMC_PD_BP_BUF_ALIGNMENT 4096
  48. #define I40IW_FIRST_VF_FPM_ID 16
  49. #define FPM_MULTIPLIER 1024
  50. #define I40IW_INC_SD_REFCNT(sd_table) ((sd_table)->ref_cnt++)
  51. #define I40IW_INC_PD_REFCNT(pd_table) ((pd_table)->ref_cnt++)
  52. #define I40IW_INC_BP_REFCNT(bp) ((bp)->ref_cnt++)
  53. #define I40IW_DEC_SD_REFCNT(sd_table) ((sd_table)->ref_cnt--)
  54. #define I40IW_DEC_PD_REFCNT(pd_table) ((pd_table)->ref_cnt--)
  55. #define I40IW_DEC_BP_REFCNT(bp) ((bp)->ref_cnt--)
  56. /**
  57. * I40IW_INVALIDATE_PF_HMC_PD - Invalidates the pd cache in the hardware
  58. * @hw: pointer to our hw struct
  59. * @sd_idx: segment descriptor index
  60. * @pd_idx: page descriptor index
  61. */
  62. #define I40IW_INVALIDATE_PF_HMC_PD(hw, sd_idx, pd_idx) \
  63. i40iw_wr32((hw), I40E_PFHMC_PDINV, \
  64. (((sd_idx) << I40E_PFHMC_PDINV_PMSDIDX_SHIFT) | \
  65. (0x1 << I40E_PFHMC_PDINV_PMSDPARTSEL_SHIFT) | \
  66. ((pd_idx) << I40E_PFHMC_PDINV_PMPDIDX_SHIFT)))
  67. /**
  68. * I40IW_INVALIDATE_VF_HMC_PD - Invalidates the pd cache in the hardware
  69. * @hw: pointer to our hw struct
  70. * @sd_idx: segment descriptor index
  71. * @pd_idx: page descriptor index
  72. * @hmc_fn_id: VF's function id
  73. */
  74. #define I40IW_INVALIDATE_VF_HMC_PD(hw, sd_idx, pd_idx, hmc_fn_id) \
  75. i40iw_wr32(hw, I40E_GLHMC_VFPDINV(hmc_fn_id - I40IW_FIRST_VF_FPM_ID), \
  76. ((sd_idx << I40E_PFHMC_PDINV_PMSDIDX_SHIFT) | \
  77. (pd_idx << I40E_PFHMC_PDINV_PMPDIDX_SHIFT)))
  78. struct i40iw_hmc_obj_info {
  79. u64 base;
  80. u32 max_cnt;
  81. u32 cnt;
  82. u64 size;
  83. };
  84. enum i40iw_sd_entry_type {
  85. I40IW_SD_TYPE_INVALID = 0,
  86. I40IW_SD_TYPE_PAGED = 1,
  87. I40IW_SD_TYPE_DIRECT = 2
  88. };
  89. struct i40iw_hmc_bp {
  90. enum i40iw_sd_entry_type entry_type;
  91. struct i40iw_dma_mem addr;
  92. u32 sd_pd_index;
  93. u32 ref_cnt;
  94. };
  95. struct i40iw_hmc_pd_entry {
  96. struct i40iw_hmc_bp bp;
  97. u32 sd_index;
  98. bool rsrc_pg;
  99. bool valid;
  100. };
  101. struct i40iw_hmc_pd_table {
  102. struct i40iw_dma_mem pd_page_addr;
  103. struct i40iw_hmc_pd_entry *pd_entry;
  104. struct i40iw_virt_mem pd_entry_virt_mem;
  105. u32 ref_cnt;
  106. u32 sd_index;
  107. };
  108. struct i40iw_hmc_sd_entry {
  109. enum i40iw_sd_entry_type entry_type;
  110. bool valid;
  111. union {
  112. struct i40iw_hmc_pd_table pd_table;
  113. struct i40iw_hmc_bp bp;
  114. } u;
  115. };
  116. struct i40iw_hmc_sd_table {
  117. struct i40iw_virt_mem addr;
  118. u32 sd_cnt;
  119. u32 ref_cnt;
  120. struct i40iw_hmc_sd_entry *sd_entry;
  121. };
  122. struct i40iw_hmc_info {
  123. u32 signature;
  124. u8 hmc_fn_id;
  125. u16 first_sd_index;
  126. struct i40iw_hmc_obj_info *hmc_obj;
  127. struct i40iw_virt_mem hmc_obj_virt_mem;
  128. struct i40iw_hmc_sd_table sd_table;
  129. u16 sd_indexes[I40IW_HMC_MAX_SD_COUNT];
  130. };
  131. struct update_sd_entry {
  132. u64 cmd;
  133. u64 data;
  134. };
  135. struct i40iw_update_sds_info {
  136. u32 cnt;
  137. u8 hmc_fn_id;
  138. struct update_sd_entry entry[I40IW_MAX_SD_ENTRIES];
  139. };
  140. struct i40iw_ccq_cqe_info;
  141. struct i40iw_hmc_fcn_info {
  142. void (*callback_fcn)(struct i40iw_sc_dev *, void *,
  143. struct i40iw_ccq_cqe_info *);
  144. void *cqp_callback_param;
  145. u32 vf_id;
  146. u16 iw_vf_idx;
  147. bool free_fcn;
  148. };
  149. enum i40iw_hmc_rsrc_type {
  150. I40IW_HMC_IW_QP = 0,
  151. I40IW_HMC_IW_CQ = 1,
  152. I40IW_HMC_IW_SRQ = 2,
  153. I40IW_HMC_IW_HTE = 3,
  154. I40IW_HMC_IW_ARP = 4,
  155. I40IW_HMC_IW_APBVT_ENTRY = 5,
  156. I40IW_HMC_IW_MR = 6,
  157. I40IW_HMC_IW_XF = 7,
  158. I40IW_HMC_IW_XFFL = 8,
  159. I40IW_HMC_IW_Q1 = 9,
  160. I40IW_HMC_IW_Q1FL = 10,
  161. I40IW_HMC_IW_TIMER = 11,
  162. I40IW_HMC_IW_FSIMC = 12,
  163. I40IW_HMC_IW_FSIAV = 13,
  164. I40IW_HMC_IW_PBLE = 14,
  165. I40IW_HMC_IW_MAX = 15,
  166. };
  167. struct i40iw_hmc_create_obj_info {
  168. struct i40iw_hmc_info *hmc_info;
  169. struct i40iw_virt_mem add_sd_virt_mem;
  170. u32 rsrc_type;
  171. u32 start_idx;
  172. u32 count;
  173. u32 add_sd_cnt;
  174. enum i40iw_sd_entry_type entry_type;
  175. bool is_pf;
  176. };
  177. struct i40iw_hmc_del_obj_info {
  178. struct i40iw_hmc_info *hmc_info;
  179. struct i40iw_virt_mem del_sd_virt_mem;
  180. u32 rsrc_type;
  181. u32 start_idx;
  182. u32 count;
  183. u32 del_sd_cnt;
  184. bool is_pf;
  185. };
  186. enum i40iw_status_code i40iw_copy_dma_mem(struct i40iw_hw *hw, void *dest_buf,
  187. struct i40iw_dma_mem *src_mem, u64 src_offset, u64 size);
  188. enum i40iw_status_code i40iw_sc_create_hmc_obj(struct i40iw_sc_dev *dev,
  189. struct i40iw_hmc_create_obj_info *info);
  190. enum i40iw_status_code i40iw_sc_del_hmc_obj(struct i40iw_sc_dev *dev,
  191. struct i40iw_hmc_del_obj_info *info,
  192. bool reset);
  193. enum i40iw_status_code i40iw_hmc_sd_one(struct i40iw_sc_dev *dev, u8 hmc_fn_id,
  194. u64 pa, u32 sd_idx, enum i40iw_sd_entry_type type,
  195. bool setsd);
  196. enum i40iw_status_code i40iw_update_sds_noccq(struct i40iw_sc_dev *dev,
  197. struct i40iw_update_sds_info *info);
  198. struct i40iw_vfdev *i40iw_vfdev_from_fpm(struct i40iw_sc_dev *dev, u8 hmc_fn_id);
  199. struct i40iw_hmc_info *i40iw_vf_hmcinfo_from_fpm(struct i40iw_sc_dev *dev,
  200. u8 hmc_fn_id);
  201. enum i40iw_status_code i40iw_add_sd_table_entry(struct i40iw_hw *hw,
  202. struct i40iw_hmc_info *hmc_info, u32 sd_index,
  203. enum i40iw_sd_entry_type type, u64 direct_mode_sz);
  204. enum i40iw_status_code i40iw_add_pd_table_entry(struct i40iw_hw *hw,
  205. struct i40iw_hmc_info *hmc_info, u32 pd_index,
  206. struct i40iw_dma_mem *rsrc_pg);
  207. enum i40iw_status_code i40iw_remove_pd_bp(struct i40iw_hw *hw,
  208. struct i40iw_hmc_info *hmc_info, u32 idx, bool is_pf);
  209. enum i40iw_status_code i40iw_prep_remove_sd_bp(struct i40iw_hmc_info *hmc_info, u32 idx);
  210. enum i40iw_status_code i40iw_prep_remove_pd_page(struct i40iw_hmc_info *hmc_info, u32 idx);
  211. #define ENTER_SHARED_FUNCTION()
  212. #define EXIT_SHARED_FUNCTION()
  213. #endif /* I40IW_HMC_H */