f71805f.c 48 KB

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  1. /*
  2. * f71805f.c - driver for the Fintek F71805F/FG and F71872F/FG Super-I/O
  3. * chips integrated hardware monitoring features
  4. * Copyright (C) 2005-2006 Jean Delvare <jdelvare@suse.de>
  5. *
  6. * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates
  7. * complete hardware monitoring features: voltage, fan and temperature
  8. * sensors, and manual and automatic fan speed control.
  9. *
  10. * The F71872F/FG is almost the same, with two more voltages monitored,
  11. * and 6 VID inputs.
  12. *
  13. * The F71806F/FG is essentially the same as the F71872F/FG. It even has
  14. * the same chip ID, so the driver can't differentiate between.
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful,
  22. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24. * GNU General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software
  28. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  29. */
  30. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/slab.h>
  34. #include <linux/jiffies.h>
  35. #include <linux/platform_device.h>
  36. #include <linux/hwmon.h>
  37. #include <linux/hwmon-sysfs.h>
  38. #include <linux/err.h>
  39. #include <linux/mutex.h>
  40. #include <linux/sysfs.h>
  41. #include <linux/ioport.h>
  42. #include <linux/acpi.h>
  43. #include <linux/io.h>
  44. static unsigned short force_id;
  45. module_param(force_id, ushort, 0);
  46. MODULE_PARM_DESC(force_id, "Override the detected device ID");
  47. static struct platform_device *pdev;
  48. #define DRVNAME "f71805f"
  49. enum kinds { f71805f, f71872f };
  50. /*
  51. * Super-I/O constants and functions
  52. */
  53. #define F71805F_LD_HWM 0x04
  54. #define SIO_REG_LDSEL 0x07 /* Logical device select */
  55. #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
  56. #define SIO_REG_DEVREV 0x22 /* Device revision */
  57. #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
  58. #define SIO_REG_FNSEL1 0x29 /* Multi Function Select 1 (F71872F) */
  59. #define SIO_REG_ENABLE 0x30 /* Logical device enable */
  60. #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
  61. #define SIO_FINTEK_ID 0x1934
  62. #define SIO_F71805F_ID 0x0406
  63. #define SIO_F71872F_ID 0x0341
  64. static inline int
  65. superio_inb(int base, int reg)
  66. {
  67. outb(reg, base);
  68. return inb(base + 1);
  69. }
  70. static int
  71. superio_inw(int base, int reg)
  72. {
  73. int val;
  74. outb(reg++, base);
  75. val = inb(base + 1) << 8;
  76. outb(reg, base);
  77. val |= inb(base + 1);
  78. return val;
  79. }
  80. static inline void
  81. superio_select(int base, int ld)
  82. {
  83. outb(SIO_REG_LDSEL, base);
  84. outb(ld, base + 1);
  85. }
  86. static inline void
  87. superio_enter(int base)
  88. {
  89. outb(0x87, base);
  90. outb(0x87, base);
  91. }
  92. static inline void
  93. superio_exit(int base)
  94. {
  95. outb(0xaa, base);
  96. }
  97. /*
  98. * ISA constants
  99. */
  100. #define REGION_LENGTH 8
  101. #define ADDR_REG_OFFSET 5
  102. #define DATA_REG_OFFSET 6
  103. /*
  104. * Registers
  105. */
  106. /* in nr from 0 to 10 (8-bit values) */
  107. #define F71805F_REG_IN(nr) (0x10 + (nr))
  108. #define F71805F_REG_IN_HIGH(nr) ((nr) < 10 ? 0x40 + 2 * (nr) : 0x2E)
  109. #define F71805F_REG_IN_LOW(nr) ((nr) < 10 ? 0x41 + 2 * (nr) : 0x2F)
  110. /* fan nr from 0 to 2 (12-bit values, two registers) */
  111. #define F71805F_REG_FAN(nr) (0x20 + 2 * (nr))
  112. #define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr))
  113. #define F71805F_REG_FAN_TARGET(nr) (0x69 + 16 * (nr))
  114. #define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr))
  115. #define F71805F_REG_PWM_FREQ(nr) (0x63 + 16 * (nr))
  116. #define F71805F_REG_PWM_DUTY(nr) (0x6B + 16 * (nr))
  117. /* temp nr from 0 to 2 (8-bit values) */
  118. #define F71805F_REG_TEMP(nr) (0x1B + (nr))
  119. #define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr))
  120. #define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr))
  121. #define F71805F_REG_TEMP_MODE 0x01
  122. /* pwm/fan pwmnr from 0 to 2, auto point apnr from 0 to 2 */
  123. /* map Fintek numbers to our numbers as follows: 9->0, 5->1, 1->2 */
  124. #define F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr) \
  125. (0xA0 + 0x10 * (pwmnr) + (2 - (apnr)))
  126. #define F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr) \
  127. (0xA4 + 0x10 * (pwmnr) + \
  128. 2 * (2 - (apnr)))
  129. #define F71805F_REG_START 0x00
  130. /* status nr from 0 to 2 */
  131. #define F71805F_REG_STATUS(nr) (0x36 + (nr))
  132. /* individual register bits */
  133. #define FAN_CTRL_DC_MODE 0x10
  134. #define FAN_CTRL_LATCH_FULL 0x08
  135. #define FAN_CTRL_MODE_MASK 0x03
  136. #define FAN_CTRL_MODE_SPEED 0x00
  137. #define FAN_CTRL_MODE_TEMPERATURE 0x01
  138. #define FAN_CTRL_MODE_MANUAL 0x02
  139. /*
  140. * Data structures and manipulation thereof
  141. */
  142. struct f71805f_auto_point {
  143. u8 temp[3];
  144. u16 fan[3];
  145. };
  146. struct f71805f_data {
  147. unsigned short addr;
  148. const char *name;
  149. struct device *hwmon_dev;
  150. struct mutex update_lock;
  151. char valid; /* !=0 if following fields are valid */
  152. unsigned long last_updated; /* In jiffies */
  153. unsigned long last_limits; /* In jiffies */
  154. /* Register values */
  155. u8 in[11];
  156. u8 in_high[11];
  157. u8 in_low[11];
  158. u16 has_in;
  159. u16 fan[3];
  160. u16 fan_low[3];
  161. u16 fan_target[3];
  162. u8 fan_ctrl[3];
  163. u8 pwm[3];
  164. u8 pwm_freq[3];
  165. u8 temp[3];
  166. u8 temp_high[3];
  167. u8 temp_hyst[3];
  168. u8 temp_mode;
  169. unsigned long alarms;
  170. struct f71805f_auto_point auto_points[3];
  171. };
  172. struct f71805f_sio_data {
  173. enum kinds kind;
  174. u8 fnsel1;
  175. };
  176. static inline long in_from_reg(u8 reg)
  177. {
  178. return reg * 8;
  179. }
  180. /* The 2 least significant bits are not used */
  181. static inline u8 in_to_reg(long val)
  182. {
  183. if (val <= 0)
  184. return 0;
  185. if (val >= 2016)
  186. return 0xfc;
  187. return ((val + 16) / 32) << 2;
  188. }
  189. /* in0 is downscaled by a factor 2 internally */
  190. static inline long in0_from_reg(u8 reg)
  191. {
  192. return reg * 16;
  193. }
  194. static inline u8 in0_to_reg(long val)
  195. {
  196. if (val <= 0)
  197. return 0;
  198. if (val >= 4032)
  199. return 0xfc;
  200. return ((val + 32) / 64) << 2;
  201. }
  202. /* The 4 most significant bits are not used */
  203. static inline long fan_from_reg(u16 reg)
  204. {
  205. reg &= 0xfff;
  206. if (!reg || reg == 0xfff)
  207. return 0;
  208. return 1500000 / reg;
  209. }
  210. static inline u16 fan_to_reg(long rpm)
  211. {
  212. /*
  213. * If the low limit is set below what the chip can measure,
  214. * store the largest possible 12-bit value in the registers,
  215. * so that no alarm will ever trigger.
  216. */
  217. if (rpm < 367)
  218. return 0xfff;
  219. return 1500000 / rpm;
  220. }
  221. static inline unsigned long pwm_freq_from_reg(u8 reg)
  222. {
  223. unsigned long clock = (reg & 0x80) ? 48000000UL : 1000000UL;
  224. reg &= 0x7f;
  225. if (reg == 0)
  226. reg++;
  227. return clock / (reg << 8);
  228. }
  229. static inline u8 pwm_freq_to_reg(unsigned long val)
  230. {
  231. if (val >= 187500) /* The highest we can do */
  232. return 0x80;
  233. if (val >= 1475) /* Use 48 MHz clock */
  234. return 0x80 | (48000000UL / (val << 8));
  235. if (val < 31) /* The lowest we can do */
  236. return 0x7f;
  237. else /* Use 1 MHz clock */
  238. return 1000000UL / (val << 8);
  239. }
  240. static inline int pwm_mode_from_reg(u8 reg)
  241. {
  242. return !(reg & FAN_CTRL_DC_MODE);
  243. }
  244. static inline long temp_from_reg(u8 reg)
  245. {
  246. return reg * 1000;
  247. }
  248. static inline u8 temp_to_reg(long val)
  249. {
  250. if (val <= 0)
  251. return 0;
  252. if (val >= 1000 * 0xff)
  253. return 0xff;
  254. return (val + 500) / 1000;
  255. }
  256. /*
  257. * Device I/O access
  258. */
  259. /* Must be called with data->update_lock held, except during initialization */
  260. static u8 f71805f_read8(struct f71805f_data *data, u8 reg)
  261. {
  262. outb(reg, data->addr + ADDR_REG_OFFSET);
  263. return inb(data->addr + DATA_REG_OFFSET);
  264. }
  265. /* Must be called with data->update_lock held, except during initialization */
  266. static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val)
  267. {
  268. outb(reg, data->addr + ADDR_REG_OFFSET);
  269. outb(val, data->addr + DATA_REG_OFFSET);
  270. }
  271. /*
  272. * It is important to read the MSB first, because doing so latches the
  273. * value of the LSB, so we are sure both bytes belong to the same value.
  274. * Must be called with data->update_lock held, except during initialization
  275. */
  276. static u16 f71805f_read16(struct f71805f_data *data, u8 reg)
  277. {
  278. u16 val;
  279. outb(reg, data->addr + ADDR_REG_OFFSET);
  280. val = inb(data->addr + DATA_REG_OFFSET) << 8;
  281. outb(++reg, data->addr + ADDR_REG_OFFSET);
  282. val |= inb(data->addr + DATA_REG_OFFSET);
  283. return val;
  284. }
  285. /* Must be called with data->update_lock held, except during initialization */
  286. static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val)
  287. {
  288. outb(reg, data->addr + ADDR_REG_OFFSET);
  289. outb(val >> 8, data->addr + DATA_REG_OFFSET);
  290. outb(++reg, data->addr + ADDR_REG_OFFSET);
  291. outb(val & 0xff, data->addr + DATA_REG_OFFSET);
  292. }
  293. static struct f71805f_data *f71805f_update_device(struct device *dev)
  294. {
  295. struct f71805f_data *data = dev_get_drvdata(dev);
  296. int nr, apnr;
  297. mutex_lock(&data->update_lock);
  298. /* Limit registers cache is refreshed after 60 seconds */
  299. if (time_after(jiffies, data->last_updated + 60 * HZ)
  300. || !data->valid) {
  301. for (nr = 0; nr < 11; nr++) {
  302. if (!(data->has_in & (1 << nr)))
  303. continue;
  304. data->in_high[nr] = f71805f_read8(data,
  305. F71805F_REG_IN_HIGH(nr));
  306. data->in_low[nr] = f71805f_read8(data,
  307. F71805F_REG_IN_LOW(nr));
  308. }
  309. for (nr = 0; nr < 3; nr++) {
  310. data->fan_low[nr] = f71805f_read16(data,
  311. F71805F_REG_FAN_LOW(nr));
  312. data->fan_target[nr] = f71805f_read16(data,
  313. F71805F_REG_FAN_TARGET(nr));
  314. data->pwm_freq[nr] = f71805f_read8(data,
  315. F71805F_REG_PWM_FREQ(nr));
  316. }
  317. for (nr = 0; nr < 3; nr++) {
  318. data->temp_high[nr] = f71805f_read8(data,
  319. F71805F_REG_TEMP_HIGH(nr));
  320. data->temp_hyst[nr] = f71805f_read8(data,
  321. F71805F_REG_TEMP_HYST(nr));
  322. }
  323. data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE);
  324. for (nr = 0; nr < 3; nr++) {
  325. for (apnr = 0; apnr < 3; apnr++) {
  326. data->auto_points[nr].temp[apnr] =
  327. f71805f_read8(data,
  328. F71805F_REG_PWM_AUTO_POINT_TEMP(nr,
  329. apnr));
  330. data->auto_points[nr].fan[apnr] =
  331. f71805f_read16(data,
  332. F71805F_REG_PWM_AUTO_POINT_FAN(nr,
  333. apnr));
  334. }
  335. }
  336. data->last_limits = jiffies;
  337. }
  338. /* Measurement registers cache is refreshed after 1 second */
  339. if (time_after(jiffies, data->last_updated + HZ)
  340. || !data->valid) {
  341. for (nr = 0; nr < 11; nr++) {
  342. if (!(data->has_in & (1 << nr)))
  343. continue;
  344. data->in[nr] = f71805f_read8(data,
  345. F71805F_REG_IN(nr));
  346. }
  347. for (nr = 0; nr < 3; nr++) {
  348. data->fan[nr] = f71805f_read16(data,
  349. F71805F_REG_FAN(nr));
  350. data->fan_ctrl[nr] = f71805f_read8(data,
  351. F71805F_REG_FAN_CTRL(nr));
  352. data->pwm[nr] = f71805f_read8(data,
  353. F71805F_REG_PWM_DUTY(nr));
  354. }
  355. for (nr = 0; nr < 3; nr++) {
  356. data->temp[nr] = f71805f_read8(data,
  357. F71805F_REG_TEMP(nr));
  358. }
  359. data->alarms = f71805f_read8(data, F71805F_REG_STATUS(0))
  360. + (f71805f_read8(data, F71805F_REG_STATUS(1)) << 8)
  361. + (f71805f_read8(data, F71805F_REG_STATUS(2)) << 16);
  362. data->last_updated = jiffies;
  363. data->valid = 1;
  364. }
  365. mutex_unlock(&data->update_lock);
  366. return data;
  367. }
  368. /*
  369. * Sysfs interface
  370. */
  371. static ssize_t show_in0(struct device *dev, struct device_attribute *devattr,
  372. char *buf)
  373. {
  374. struct f71805f_data *data = f71805f_update_device(dev);
  375. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  376. int nr = attr->index;
  377. return sprintf(buf, "%ld\n", in0_from_reg(data->in[nr]));
  378. }
  379. static ssize_t show_in0_max(struct device *dev, struct device_attribute
  380. *devattr, char *buf)
  381. {
  382. struct f71805f_data *data = f71805f_update_device(dev);
  383. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  384. int nr = attr->index;
  385. return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[nr]));
  386. }
  387. static ssize_t show_in0_min(struct device *dev, struct device_attribute
  388. *devattr, char *buf)
  389. {
  390. struct f71805f_data *data = f71805f_update_device(dev);
  391. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  392. int nr = attr->index;
  393. return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[nr]));
  394. }
  395. static ssize_t set_in0_max(struct device *dev, struct device_attribute
  396. *devattr, const char *buf, size_t count)
  397. {
  398. struct f71805f_data *data = dev_get_drvdata(dev);
  399. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  400. int nr = attr->index;
  401. long val;
  402. int err;
  403. err = kstrtol(buf, 10, &val);
  404. if (err)
  405. return err;
  406. mutex_lock(&data->update_lock);
  407. data->in_high[nr] = in0_to_reg(val);
  408. f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
  409. mutex_unlock(&data->update_lock);
  410. return count;
  411. }
  412. static ssize_t set_in0_min(struct device *dev, struct device_attribute
  413. *devattr, const char *buf, size_t count)
  414. {
  415. struct f71805f_data *data = dev_get_drvdata(dev);
  416. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  417. int nr = attr->index;
  418. long val;
  419. int err;
  420. err = kstrtol(buf, 10, &val);
  421. if (err)
  422. return err;
  423. mutex_lock(&data->update_lock);
  424. data->in_low[nr] = in0_to_reg(val);
  425. f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
  426. mutex_unlock(&data->update_lock);
  427. return count;
  428. }
  429. static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
  430. char *buf)
  431. {
  432. struct f71805f_data *data = f71805f_update_device(dev);
  433. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  434. int nr = attr->index;
  435. return sprintf(buf, "%ld\n", in_from_reg(data->in[nr]));
  436. }
  437. static ssize_t show_in_max(struct device *dev, struct device_attribute
  438. *devattr, char *buf)
  439. {
  440. struct f71805f_data *data = f71805f_update_device(dev);
  441. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  442. int nr = attr->index;
  443. return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr]));
  444. }
  445. static ssize_t show_in_min(struct device *dev, struct device_attribute
  446. *devattr, char *buf)
  447. {
  448. struct f71805f_data *data = f71805f_update_device(dev);
  449. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  450. int nr = attr->index;
  451. return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr]));
  452. }
  453. static ssize_t set_in_max(struct device *dev, struct device_attribute
  454. *devattr, const char *buf, size_t count)
  455. {
  456. struct f71805f_data *data = dev_get_drvdata(dev);
  457. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  458. int nr = attr->index;
  459. long val;
  460. int err;
  461. err = kstrtol(buf, 10, &val);
  462. if (err)
  463. return err;
  464. mutex_lock(&data->update_lock);
  465. data->in_high[nr] = in_to_reg(val);
  466. f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
  467. mutex_unlock(&data->update_lock);
  468. return count;
  469. }
  470. static ssize_t set_in_min(struct device *dev, struct device_attribute
  471. *devattr, const char *buf, size_t count)
  472. {
  473. struct f71805f_data *data = dev_get_drvdata(dev);
  474. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  475. int nr = attr->index;
  476. long val;
  477. int err;
  478. err = kstrtol(buf, 10, &val);
  479. if (err)
  480. return err;
  481. mutex_lock(&data->update_lock);
  482. data->in_low[nr] = in_to_reg(val);
  483. f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
  484. mutex_unlock(&data->update_lock);
  485. return count;
  486. }
  487. static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
  488. char *buf)
  489. {
  490. struct f71805f_data *data = f71805f_update_device(dev);
  491. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  492. int nr = attr->index;
  493. return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr]));
  494. }
  495. static ssize_t show_fan_min(struct device *dev, struct device_attribute
  496. *devattr, char *buf)
  497. {
  498. struct f71805f_data *data = f71805f_update_device(dev);
  499. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  500. int nr = attr->index;
  501. return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr]));
  502. }
  503. static ssize_t show_fan_target(struct device *dev, struct device_attribute
  504. *devattr, char *buf)
  505. {
  506. struct f71805f_data *data = f71805f_update_device(dev);
  507. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  508. int nr = attr->index;
  509. return sprintf(buf, "%ld\n", fan_from_reg(data->fan_target[nr]));
  510. }
  511. static ssize_t set_fan_min(struct device *dev, struct device_attribute
  512. *devattr, const char *buf, size_t count)
  513. {
  514. struct f71805f_data *data = dev_get_drvdata(dev);
  515. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  516. int nr = attr->index;
  517. long val;
  518. int err;
  519. err = kstrtol(buf, 10, &val);
  520. if (err)
  521. return err;
  522. mutex_lock(&data->update_lock);
  523. data->fan_low[nr] = fan_to_reg(val);
  524. f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]);
  525. mutex_unlock(&data->update_lock);
  526. return count;
  527. }
  528. static ssize_t set_fan_target(struct device *dev, struct device_attribute
  529. *devattr, const char *buf, size_t count)
  530. {
  531. struct f71805f_data *data = dev_get_drvdata(dev);
  532. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  533. int nr = attr->index;
  534. long val;
  535. int err;
  536. err = kstrtol(buf, 10, &val);
  537. if (err)
  538. return err;
  539. mutex_lock(&data->update_lock);
  540. data->fan_target[nr] = fan_to_reg(val);
  541. f71805f_write16(data, F71805F_REG_FAN_TARGET(nr),
  542. data->fan_target[nr]);
  543. mutex_unlock(&data->update_lock);
  544. return count;
  545. }
  546. static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
  547. char *buf)
  548. {
  549. struct f71805f_data *data = f71805f_update_device(dev);
  550. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  551. int nr = attr->index;
  552. return sprintf(buf, "%d\n", (int)data->pwm[nr]);
  553. }
  554. static ssize_t show_pwm_enable(struct device *dev, struct device_attribute
  555. *devattr, char *buf)
  556. {
  557. struct f71805f_data *data = f71805f_update_device(dev);
  558. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  559. int nr = attr->index;
  560. int mode;
  561. switch (data->fan_ctrl[nr] & FAN_CTRL_MODE_MASK) {
  562. case FAN_CTRL_MODE_SPEED:
  563. mode = 3;
  564. break;
  565. case FAN_CTRL_MODE_TEMPERATURE:
  566. mode = 2;
  567. break;
  568. default: /* MANUAL */
  569. mode = 1;
  570. }
  571. return sprintf(buf, "%d\n", mode);
  572. }
  573. static ssize_t show_pwm_freq(struct device *dev, struct device_attribute
  574. *devattr, char *buf)
  575. {
  576. struct f71805f_data *data = f71805f_update_device(dev);
  577. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  578. int nr = attr->index;
  579. return sprintf(buf, "%lu\n", pwm_freq_from_reg(data->pwm_freq[nr]));
  580. }
  581. static ssize_t show_pwm_mode(struct device *dev, struct device_attribute
  582. *devattr, char *buf)
  583. {
  584. struct f71805f_data *data = f71805f_update_device(dev);
  585. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  586. int nr = attr->index;
  587. return sprintf(buf, "%d\n", pwm_mode_from_reg(data->fan_ctrl[nr]));
  588. }
  589. static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr,
  590. const char *buf, size_t count)
  591. {
  592. struct f71805f_data *data = dev_get_drvdata(dev);
  593. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  594. int nr = attr->index;
  595. unsigned long val;
  596. int err;
  597. err = kstrtoul(buf, 10, &val);
  598. if (err)
  599. return err;
  600. if (val > 255)
  601. return -EINVAL;
  602. mutex_lock(&data->update_lock);
  603. data->pwm[nr] = val;
  604. f71805f_write8(data, F71805F_REG_PWM_DUTY(nr), data->pwm[nr]);
  605. mutex_unlock(&data->update_lock);
  606. return count;
  607. }
  608. static struct attribute *f71805f_attr_pwm[];
  609. static ssize_t set_pwm_enable(struct device *dev, struct device_attribute
  610. *devattr, const char *buf, size_t count)
  611. {
  612. struct f71805f_data *data = dev_get_drvdata(dev);
  613. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  614. int nr = attr->index;
  615. u8 reg;
  616. unsigned long val;
  617. int err;
  618. err = kstrtoul(buf, 10, &val);
  619. if (err)
  620. return err;
  621. if (val < 1 || val > 3)
  622. return -EINVAL;
  623. if (val > 1) { /* Automatic mode, user can't set PWM value */
  624. if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
  625. S_IRUGO))
  626. dev_dbg(dev, "chmod -w pwm%d failed\n", nr + 1);
  627. }
  628. mutex_lock(&data->update_lock);
  629. reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(nr))
  630. & ~FAN_CTRL_MODE_MASK;
  631. switch (val) {
  632. case 1:
  633. reg |= FAN_CTRL_MODE_MANUAL;
  634. break;
  635. case 2:
  636. reg |= FAN_CTRL_MODE_TEMPERATURE;
  637. break;
  638. case 3:
  639. reg |= FAN_CTRL_MODE_SPEED;
  640. break;
  641. }
  642. data->fan_ctrl[nr] = reg;
  643. f71805f_write8(data, F71805F_REG_FAN_CTRL(nr), reg);
  644. mutex_unlock(&data->update_lock);
  645. if (val == 1) { /* Manual mode, user can set PWM value */
  646. if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
  647. S_IRUGO | S_IWUSR))
  648. dev_dbg(dev, "chmod +w pwm%d failed\n", nr + 1);
  649. }
  650. return count;
  651. }
  652. static ssize_t set_pwm_freq(struct device *dev, struct device_attribute
  653. *devattr, const char *buf, size_t count)
  654. {
  655. struct f71805f_data *data = dev_get_drvdata(dev);
  656. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  657. int nr = attr->index;
  658. unsigned long val;
  659. int err;
  660. err = kstrtoul(buf, 10, &val);
  661. if (err)
  662. return err;
  663. mutex_lock(&data->update_lock);
  664. data->pwm_freq[nr] = pwm_freq_to_reg(val);
  665. f71805f_write8(data, F71805F_REG_PWM_FREQ(nr), data->pwm_freq[nr]);
  666. mutex_unlock(&data->update_lock);
  667. return count;
  668. }
  669. static ssize_t show_pwm_auto_point_temp(struct device *dev,
  670. struct device_attribute *devattr,
  671. char *buf)
  672. {
  673. struct f71805f_data *data = dev_get_drvdata(dev);
  674. struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
  675. int pwmnr = attr->nr;
  676. int apnr = attr->index;
  677. return sprintf(buf, "%ld\n",
  678. temp_from_reg(data->auto_points[pwmnr].temp[apnr]));
  679. }
  680. static ssize_t set_pwm_auto_point_temp(struct device *dev,
  681. struct device_attribute *devattr,
  682. const char *buf, size_t count)
  683. {
  684. struct f71805f_data *data = dev_get_drvdata(dev);
  685. struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
  686. int pwmnr = attr->nr;
  687. int apnr = attr->index;
  688. unsigned long val;
  689. int err;
  690. err = kstrtoul(buf, 10, &val);
  691. if (err)
  692. return err;
  693. mutex_lock(&data->update_lock);
  694. data->auto_points[pwmnr].temp[apnr] = temp_to_reg(val);
  695. f71805f_write8(data, F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr),
  696. data->auto_points[pwmnr].temp[apnr]);
  697. mutex_unlock(&data->update_lock);
  698. return count;
  699. }
  700. static ssize_t show_pwm_auto_point_fan(struct device *dev,
  701. struct device_attribute *devattr,
  702. char *buf)
  703. {
  704. struct f71805f_data *data = dev_get_drvdata(dev);
  705. struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
  706. int pwmnr = attr->nr;
  707. int apnr = attr->index;
  708. return sprintf(buf, "%ld\n",
  709. fan_from_reg(data->auto_points[pwmnr].fan[apnr]));
  710. }
  711. static ssize_t set_pwm_auto_point_fan(struct device *dev,
  712. struct device_attribute *devattr,
  713. const char *buf, size_t count)
  714. {
  715. struct f71805f_data *data = dev_get_drvdata(dev);
  716. struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
  717. int pwmnr = attr->nr;
  718. int apnr = attr->index;
  719. unsigned long val;
  720. int err;
  721. err = kstrtoul(buf, 10, &val);
  722. if (err)
  723. return err;
  724. mutex_lock(&data->update_lock);
  725. data->auto_points[pwmnr].fan[apnr] = fan_to_reg(val);
  726. f71805f_write16(data, F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr),
  727. data->auto_points[pwmnr].fan[apnr]);
  728. mutex_unlock(&data->update_lock);
  729. return count;
  730. }
  731. static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
  732. char *buf)
  733. {
  734. struct f71805f_data *data = f71805f_update_device(dev);
  735. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  736. int nr = attr->index;
  737. return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr]));
  738. }
  739. static ssize_t show_temp_max(struct device *dev, struct device_attribute
  740. *devattr, char *buf)
  741. {
  742. struct f71805f_data *data = f71805f_update_device(dev);
  743. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  744. int nr = attr->index;
  745. return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr]));
  746. }
  747. static ssize_t show_temp_hyst(struct device *dev, struct device_attribute
  748. *devattr, char *buf)
  749. {
  750. struct f71805f_data *data = f71805f_update_device(dev);
  751. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  752. int nr = attr->index;
  753. return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr]));
  754. }
  755. static ssize_t show_temp_type(struct device *dev, struct device_attribute
  756. *devattr, char *buf)
  757. {
  758. struct f71805f_data *data = f71805f_update_device(dev);
  759. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  760. int nr = attr->index;
  761. /* 3 is diode, 4 is thermistor */
  762. return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4);
  763. }
  764. static ssize_t set_temp_max(struct device *dev, struct device_attribute
  765. *devattr, const char *buf, size_t count)
  766. {
  767. struct f71805f_data *data = dev_get_drvdata(dev);
  768. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  769. int nr = attr->index;
  770. long val;
  771. int err;
  772. err = kstrtol(buf, 10, &val);
  773. if (err)
  774. return err;
  775. mutex_lock(&data->update_lock);
  776. data->temp_high[nr] = temp_to_reg(val);
  777. f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]);
  778. mutex_unlock(&data->update_lock);
  779. return count;
  780. }
  781. static ssize_t set_temp_hyst(struct device *dev, struct device_attribute
  782. *devattr, const char *buf, size_t count)
  783. {
  784. struct f71805f_data *data = dev_get_drvdata(dev);
  785. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  786. int nr = attr->index;
  787. long val;
  788. int err;
  789. err = kstrtol(buf, 10, &val);
  790. if (err)
  791. return err;
  792. mutex_lock(&data->update_lock);
  793. data->temp_hyst[nr] = temp_to_reg(val);
  794. f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]);
  795. mutex_unlock(&data->update_lock);
  796. return count;
  797. }
  798. static ssize_t show_alarms_in(struct device *dev, struct device_attribute
  799. *devattr, char *buf)
  800. {
  801. struct f71805f_data *data = f71805f_update_device(dev);
  802. return sprintf(buf, "%lu\n", data->alarms & 0x7ff);
  803. }
  804. static ssize_t show_alarms_fan(struct device *dev, struct device_attribute
  805. *devattr, char *buf)
  806. {
  807. struct f71805f_data *data = f71805f_update_device(dev);
  808. return sprintf(buf, "%lu\n", (data->alarms >> 16) & 0x07);
  809. }
  810. static ssize_t show_alarms_temp(struct device *dev, struct device_attribute
  811. *devattr, char *buf)
  812. {
  813. struct f71805f_data *data = f71805f_update_device(dev);
  814. return sprintf(buf, "%lu\n", (data->alarms >> 11) & 0x07);
  815. }
  816. static ssize_t show_alarm(struct device *dev, struct device_attribute
  817. *devattr, char *buf)
  818. {
  819. struct f71805f_data *data = f71805f_update_device(dev);
  820. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  821. int bitnr = attr->index;
  822. return sprintf(buf, "%lu\n", (data->alarms >> bitnr) & 1);
  823. }
  824. static ssize_t show_name(struct device *dev, struct device_attribute
  825. *devattr, char *buf)
  826. {
  827. struct f71805f_data *data = dev_get_drvdata(dev);
  828. return sprintf(buf, "%s\n", data->name);
  829. }
  830. static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, show_in0, NULL, 0);
  831. static SENSOR_DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
  832. show_in0_max, set_in0_max, 0);
  833. static SENSOR_DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
  834. show_in0_min, set_in0_min, 0);
  835. static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1);
  836. static SENSOR_DEVICE_ATTR(in1_max, S_IRUGO | S_IWUSR,
  837. show_in_max, set_in_max, 1);
  838. static SENSOR_DEVICE_ATTR(in1_min, S_IRUGO | S_IWUSR,
  839. show_in_min, set_in_min, 1);
  840. static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2);
  841. static SENSOR_DEVICE_ATTR(in2_max, S_IRUGO | S_IWUSR,
  842. show_in_max, set_in_max, 2);
  843. static SENSOR_DEVICE_ATTR(in2_min, S_IRUGO | S_IWUSR,
  844. show_in_min, set_in_min, 2);
  845. static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3);
  846. static SENSOR_DEVICE_ATTR(in3_max, S_IRUGO | S_IWUSR,
  847. show_in_max, set_in_max, 3);
  848. static SENSOR_DEVICE_ATTR(in3_min, S_IRUGO | S_IWUSR,
  849. show_in_min, set_in_min, 3);
  850. static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4);
  851. static SENSOR_DEVICE_ATTR(in4_max, S_IRUGO | S_IWUSR,
  852. show_in_max, set_in_max, 4);
  853. static SENSOR_DEVICE_ATTR(in4_min, S_IRUGO | S_IWUSR,
  854. show_in_min, set_in_min, 4);
  855. static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5);
  856. static SENSOR_DEVICE_ATTR(in5_max, S_IRUGO | S_IWUSR,
  857. show_in_max, set_in_max, 5);
  858. static SENSOR_DEVICE_ATTR(in5_min, S_IRUGO | S_IWUSR,
  859. show_in_min, set_in_min, 5);
  860. static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6);
  861. static SENSOR_DEVICE_ATTR(in6_max, S_IRUGO | S_IWUSR,
  862. show_in_max, set_in_max, 6);
  863. static SENSOR_DEVICE_ATTR(in6_min, S_IRUGO | S_IWUSR,
  864. show_in_min, set_in_min, 6);
  865. static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7);
  866. static SENSOR_DEVICE_ATTR(in7_max, S_IRUGO | S_IWUSR,
  867. show_in_max, set_in_max, 7);
  868. static SENSOR_DEVICE_ATTR(in7_min, S_IRUGO | S_IWUSR,
  869. show_in_min, set_in_min, 7);
  870. static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8);
  871. static SENSOR_DEVICE_ATTR(in8_max, S_IRUGO | S_IWUSR,
  872. show_in_max, set_in_max, 8);
  873. static SENSOR_DEVICE_ATTR(in8_min, S_IRUGO | S_IWUSR,
  874. show_in_min, set_in_min, 8);
  875. static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, show_in0, NULL, 9);
  876. static SENSOR_DEVICE_ATTR(in9_max, S_IRUGO | S_IWUSR,
  877. show_in0_max, set_in0_max, 9);
  878. static SENSOR_DEVICE_ATTR(in9_min, S_IRUGO | S_IWUSR,
  879. show_in0_min, set_in0_min, 9);
  880. static SENSOR_DEVICE_ATTR(in10_input, S_IRUGO, show_in0, NULL, 10);
  881. static SENSOR_DEVICE_ATTR(in10_max, S_IRUGO | S_IWUSR,
  882. show_in0_max, set_in0_max, 10);
  883. static SENSOR_DEVICE_ATTR(in10_min, S_IRUGO | S_IWUSR,
  884. show_in0_min, set_in0_min, 10);
  885. static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
  886. static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
  887. show_fan_min, set_fan_min, 0);
  888. static SENSOR_DEVICE_ATTR(fan1_target, S_IRUGO | S_IWUSR,
  889. show_fan_target, set_fan_target, 0);
  890. static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
  891. static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
  892. show_fan_min, set_fan_min, 1);
  893. static SENSOR_DEVICE_ATTR(fan2_target, S_IRUGO | S_IWUSR,
  894. show_fan_target, set_fan_target, 1);
  895. static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
  896. static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
  897. show_fan_min, set_fan_min, 2);
  898. static SENSOR_DEVICE_ATTR(fan3_target, S_IRUGO | S_IWUSR,
  899. show_fan_target, set_fan_target, 2);
  900. static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0);
  901. static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR,
  902. show_temp_max, set_temp_max, 0);
  903. static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR,
  904. show_temp_hyst, set_temp_hyst, 0);
  905. static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0);
  906. static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1);
  907. static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR,
  908. show_temp_max, set_temp_max, 1);
  909. static SENSOR_DEVICE_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR,
  910. show_temp_hyst, set_temp_hyst, 1);
  911. static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1);
  912. static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2);
  913. static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO | S_IWUSR,
  914. show_temp_max, set_temp_max, 2);
  915. static SENSOR_DEVICE_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR,
  916. show_temp_hyst, set_temp_hyst, 2);
  917. static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2);
  918. /*
  919. * pwm (value) files are created read-only, write permission is
  920. * then added or removed dynamically as needed
  921. */
  922. static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO, show_pwm, set_pwm, 0);
  923. static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
  924. show_pwm_enable, set_pwm_enable, 0);
  925. static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR,
  926. show_pwm_freq, set_pwm_freq, 0);
  927. static SENSOR_DEVICE_ATTR(pwm1_mode, S_IRUGO, show_pwm_mode, NULL, 0);
  928. static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO, show_pwm, set_pwm, 1);
  929. static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
  930. show_pwm_enable, set_pwm_enable, 1);
  931. static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO | S_IWUSR,
  932. show_pwm_freq, set_pwm_freq, 1);
  933. static SENSOR_DEVICE_ATTR(pwm2_mode, S_IRUGO, show_pwm_mode, NULL, 1);
  934. static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO, show_pwm, set_pwm, 2);
  935. static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
  936. show_pwm_enable, set_pwm_enable, 2);
  937. static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO | S_IWUSR,
  938. show_pwm_freq, set_pwm_freq, 2);
  939. static SENSOR_DEVICE_ATTR(pwm3_mode, S_IRUGO, show_pwm_mode, NULL, 2);
  940. static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
  941. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  942. 0, 0);
  943. static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_fan, S_IRUGO | S_IWUSR,
  944. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  945. 0, 0);
  946. static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
  947. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  948. 0, 1);
  949. static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_fan, S_IRUGO | S_IWUSR,
  950. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  951. 0, 1);
  952. static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
  953. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  954. 0, 2);
  955. static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_fan, S_IRUGO | S_IWUSR,
  956. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  957. 0, 2);
  958. static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
  959. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  960. 1, 0);
  961. static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_fan, S_IRUGO | S_IWUSR,
  962. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  963. 1, 0);
  964. static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
  965. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  966. 1, 1);
  967. static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_fan, S_IRUGO | S_IWUSR,
  968. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  969. 1, 1);
  970. static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
  971. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  972. 1, 2);
  973. static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_fan, S_IRUGO | S_IWUSR,
  974. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  975. 1, 2);
  976. static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
  977. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  978. 2, 0);
  979. static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_fan, S_IRUGO | S_IWUSR,
  980. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  981. 2, 0);
  982. static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
  983. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  984. 2, 1);
  985. static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_fan, S_IRUGO | S_IWUSR,
  986. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  987. 2, 1);
  988. static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
  989. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  990. 2, 2);
  991. static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_fan, S_IRUGO | S_IWUSR,
  992. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  993. 2, 2);
  994. static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
  995. static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
  996. static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
  997. static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
  998. static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
  999. static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
  1000. static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
  1001. static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
  1002. static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
  1003. static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
  1004. static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
  1005. static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 11);
  1006. static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 12);
  1007. static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
  1008. static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 16);
  1009. static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 17);
  1010. static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 18);
  1011. static DEVICE_ATTR(alarms_in, S_IRUGO, show_alarms_in, NULL);
  1012. static DEVICE_ATTR(alarms_fan, S_IRUGO, show_alarms_fan, NULL);
  1013. static DEVICE_ATTR(alarms_temp, S_IRUGO, show_alarms_temp, NULL);
  1014. static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
  1015. static struct attribute *f71805f_attributes[] = {
  1016. &sensor_dev_attr_in0_input.dev_attr.attr,
  1017. &sensor_dev_attr_in0_max.dev_attr.attr,
  1018. &sensor_dev_attr_in0_min.dev_attr.attr,
  1019. &sensor_dev_attr_in1_input.dev_attr.attr,
  1020. &sensor_dev_attr_in1_max.dev_attr.attr,
  1021. &sensor_dev_attr_in1_min.dev_attr.attr,
  1022. &sensor_dev_attr_in2_input.dev_attr.attr,
  1023. &sensor_dev_attr_in2_max.dev_attr.attr,
  1024. &sensor_dev_attr_in2_min.dev_attr.attr,
  1025. &sensor_dev_attr_in3_input.dev_attr.attr,
  1026. &sensor_dev_attr_in3_max.dev_attr.attr,
  1027. &sensor_dev_attr_in3_min.dev_attr.attr,
  1028. &sensor_dev_attr_in5_input.dev_attr.attr,
  1029. &sensor_dev_attr_in5_max.dev_attr.attr,
  1030. &sensor_dev_attr_in5_min.dev_attr.attr,
  1031. &sensor_dev_attr_in6_input.dev_attr.attr,
  1032. &sensor_dev_attr_in6_max.dev_attr.attr,
  1033. &sensor_dev_attr_in6_min.dev_attr.attr,
  1034. &sensor_dev_attr_in7_input.dev_attr.attr,
  1035. &sensor_dev_attr_in7_max.dev_attr.attr,
  1036. &sensor_dev_attr_in7_min.dev_attr.attr,
  1037. &sensor_dev_attr_fan1_input.dev_attr.attr,
  1038. &sensor_dev_attr_fan1_min.dev_attr.attr,
  1039. &sensor_dev_attr_fan1_alarm.dev_attr.attr,
  1040. &sensor_dev_attr_fan1_target.dev_attr.attr,
  1041. &sensor_dev_attr_fan2_input.dev_attr.attr,
  1042. &sensor_dev_attr_fan2_min.dev_attr.attr,
  1043. &sensor_dev_attr_fan2_alarm.dev_attr.attr,
  1044. &sensor_dev_attr_fan2_target.dev_attr.attr,
  1045. &sensor_dev_attr_fan3_input.dev_attr.attr,
  1046. &sensor_dev_attr_fan3_min.dev_attr.attr,
  1047. &sensor_dev_attr_fan3_alarm.dev_attr.attr,
  1048. &sensor_dev_attr_fan3_target.dev_attr.attr,
  1049. &sensor_dev_attr_pwm1.dev_attr.attr,
  1050. &sensor_dev_attr_pwm1_enable.dev_attr.attr,
  1051. &sensor_dev_attr_pwm1_mode.dev_attr.attr,
  1052. &sensor_dev_attr_pwm2.dev_attr.attr,
  1053. &sensor_dev_attr_pwm2_enable.dev_attr.attr,
  1054. &sensor_dev_attr_pwm2_mode.dev_attr.attr,
  1055. &sensor_dev_attr_pwm3.dev_attr.attr,
  1056. &sensor_dev_attr_pwm3_enable.dev_attr.attr,
  1057. &sensor_dev_attr_pwm3_mode.dev_attr.attr,
  1058. &sensor_dev_attr_temp1_input.dev_attr.attr,
  1059. &sensor_dev_attr_temp1_max.dev_attr.attr,
  1060. &sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
  1061. &sensor_dev_attr_temp1_type.dev_attr.attr,
  1062. &sensor_dev_attr_temp2_input.dev_attr.attr,
  1063. &sensor_dev_attr_temp2_max.dev_attr.attr,
  1064. &sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
  1065. &sensor_dev_attr_temp2_type.dev_attr.attr,
  1066. &sensor_dev_attr_temp3_input.dev_attr.attr,
  1067. &sensor_dev_attr_temp3_max.dev_attr.attr,
  1068. &sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
  1069. &sensor_dev_attr_temp3_type.dev_attr.attr,
  1070. &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
  1071. &sensor_dev_attr_pwm1_auto_point1_fan.dev_attr.attr,
  1072. &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
  1073. &sensor_dev_attr_pwm1_auto_point2_fan.dev_attr.attr,
  1074. &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
  1075. &sensor_dev_attr_pwm1_auto_point3_fan.dev_attr.attr,
  1076. &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
  1077. &sensor_dev_attr_pwm2_auto_point1_fan.dev_attr.attr,
  1078. &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
  1079. &sensor_dev_attr_pwm2_auto_point2_fan.dev_attr.attr,
  1080. &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
  1081. &sensor_dev_attr_pwm2_auto_point3_fan.dev_attr.attr,
  1082. &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
  1083. &sensor_dev_attr_pwm3_auto_point1_fan.dev_attr.attr,
  1084. &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
  1085. &sensor_dev_attr_pwm3_auto_point2_fan.dev_attr.attr,
  1086. &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
  1087. &sensor_dev_attr_pwm3_auto_point3_fan.dev_attr.attr,
  1088. &sensor_dev_attr_in0_alarm.dev_attr.attr,
  1089. &sensor_dev_attr_in1_alarm.dev_attr.attr,
  1090. &sensor_dev_attr_in2_alarm.dev_attr.attr,
  1091. &sensor_dev_attr_in3_alarm.dev_attr.attr,
  1092. &sensor_dev_attr_in5_alarm.dev_attr.attr,
  1093. &sensor_dev_attr_in6_alarm.dev_attr.attr,
  1094. &sensor_dev_attr_in7_alarm.dev_attr.attr,
  1095. &dev_attr_alarms_in.attr,
  1096. &sensor_dev_attr_temp1_alarm.dev_attr.attr,
  1097. &sensor_dev_attr_temp2_alarm.dev_attr.attr,
  1098. &sensor_dev_attr_temp3_alarm.dev_attr.attr,
  1099. &dev_attr_alarms_temp.attr,
  1100. &dev_attr_alarms_fan.attr,
  1101. &dev_attr_name.attr,
  1102. NULL
  1103. };
  1104. static const struct attribute_group f71805f_group = {
  1105. .attrs = f71805f_attributes,
  1106. };
  1107. static struct attribute *f71805f_attributes_optin[4][5] = {
  1108. {
  1109. &sensor_dev_attr_in4_input.dev_attr.attr,
  1110. &sensor_dev_attr_in4_max.dev_attr.attr,
  1111. &sensor_dev_attr_in4_min.dev_attr.attr,
  1112. &sensor_dev_attr_in4_alarm.dev_attr.attr,
  1113. NULL
  1114. }, {
  1115. &sensor_dev_attr_in8_input.dev_attr.attr,
  1116. &sensor_dev_attr_in8_max.dev_attr.attr,
  1117. &sensor_dev_attr_in8_min.dev_attr.attr,
  1118. &sensor_dev_attr_in8_alarm.dev_attr.attr,
  1119. NULL
  1120. }, {
  1121. &sensor_dev_attr_in9_input.dev_attr.attr,
  1122. &sensor_dev_attr_in9_max.dev_attr.attr,
  1123. &sensor_dev_attr_in9_min.dev_attr.attr,
  1124. &sensor_dev_attr_in9_alarm.dev_attr.attr,
  1125. NULL
  1126. }, {
  1127. &sensor_dev_attr_in10_input.dev_attr.attr,
  1128. &sensor_dev_attr_in10_max.dev_attr.attr,
  1129. &sensor_dev_attr_in10_min.dev_attr.attr,
  1130. &sensor_dev_attr_in10_alarm.dev_attr.attr,
  1131. NULL
  1132. }
  1133. };
  1134. static const struct attribute_group f71805f_group_optin[4] = {
  1135. { .attrs = f71805f_attributes_optin[0] },
  1136. { .attrs = f71805f_attributes_optin[1] },
  1137. { .attrs = f71805f_attributes_optin[2] },
  1138. { .attrs = f71805f_attributes_optin[3] },
  1139. };
  1140. /*
  1141. * We don't include pwm_freq files in the arrays above, because they must be
  1142. * created conditionally (only if pwm_mode is 1 == PWM)
  1143. */
  1144. static struct attribute *f71805f_attributes_pwm_freq[] = {
  1145. &sensor_dev_attr_pwm1_freq.dev_attr.attr,
  1146. &sensor_dev_attr_pwm2_freq.dev_attr.attr,
  1147. &sensor_dev_attr_pwm3_freq.dev_attr.attr,
  1148. NULL
  1149. };
  1150. static const struct attribute_group f71805f_group_pwm_freq = {
  1151. .attrs = f71805f_attributes_pwm_freq,
  1152. };
  1153. /* We also need an indexed access to pwmN files to toggle writability */
  1154. static struct attribute *f71805f_attr_pwm[] = {
  1155. &sensor_dev_attr_pwm1.dev_attr.attr,
  1156. &sensor_dev_attr_pwm2.dev_attr.attr,
  1157. &sensor_dev_attr_pwm3.dev_attr.attr,
  1158. };
  1159. /*
  1160. * Device registration and initialization
  1161. */
  1162. static void f71805f_init_device(struct f71805f_data *data)
  1163. {
  1164. u8 reg;
  1165. int i;
  1166. reg = f71805f_read8(data, F71805F_REG_START);
  1167. if ((reg & 0x41) != 0x01) {
  1168. pr_debug("Starting monitoring operations\n");
  1169. f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40);
  1170. }
  1171. /*
  1172. * Fan monitoring can be disabled. If it is, we won't be polling
  1173. * the register values, and won't create the related sysfs files.
  1174. */
  1175. for (i = 0; i < 3; i++) {
  1176. data->fan_ctrl[i] = f71805f_read8(data,
  1177. F71805F_REG_FAN_CTRL(i));
  1178. /*
  1179. * Clear latch full bit, else "speed mode" fan speed control
  1180. * doesn't work
  1181. */
  1182. if (data->fan_ctrl[i] & FAN_CTRL_LATCH_FULL) {
  1183. data->fan_ctrl[i] &= ~FAN_CTRL_LATCH_FULL;
  1184. f71805f_write8(data, F71805F_REG_FAN_CTRL(i),
  1185. data->fan_ctrl[i]);
  1186. }
  1187. }
  1188. }
  1189. static int f71805f_probe(struct platform_device *pdev)
  1190. {
  1191. struct f71805f_sio_data *sio_data = dev_get_platdata(&pdev->dev);
  1192. struct f71805f_data *data;
  1193. struct resource *res;
  1194. int i, err;
  1195. static const char * const names[] = {
  1196. "f71805f",
  1197. "f71872f",
  1198. };
  1199. data = devm_kzalloc(&pdev->dev, sizeof(struct f71805f_data),
  1200. GFP_KERNEL);
  1201. if (!data)
  1202. return -ENOMEM;
  1203. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1204. if (!devm_request_region(&pdev->dev, res->start + ADDR_REG_OFFSET, 2,
  1205. DRVNAME)) {
  1206. dev_err(&pdev->dev, "Failed to request region 0x%lx-0x%lx\n",
  1207. (unsigned long)(res->start + ADDR_REG_OFFSET),
  1208. (unsigned long)(res->start + ADDR_REG_OFFSET + 1));
  1209. return -EBUSY;
  1210. }
  1211. data->addr = res->start;
  1212. data->name = names[sio_data->kind];
  1213. mutex_init(&data->update_lock);
  1214. platform_set_drvdata(pdev, data);
  1215. /* Some voltage inputs depend on chip model and configuration */
  1216. switch (sio_data->kind) {
  1217. case f71805f:
  1218. data->has_in = 0x1ff;
  1219. break;
  1220. case f71872f:
  1221. data->has_in = 0x6ef;
  1222. if (sio_data->fnsel1 & 0x01)
  1223. data->has_in |= (1 << 4); /* in4 */
  1224. if (sio_data->fnsel1 & 0x02)
  1225. data->has_in |= (1 << 8); /* in8 */
  1226. break;
  1227. }
  1228. /* Initialize the F71805F chip */
  1229. f71805f_init_device(data);
  1230. /* Register sysfs interface files */
  1231. err = sysfs_create_group(&pdev->dev.kobj, &f71805f_group);
  1232. if (err)
  1233. return err;
  1234. if (data->has_in & (1 << 4)) { /* in4 */
  1235. err = sysfs_create_group(&pdev->dev.kobj,
  1236. &f71805f_group_optin[0]);
  1237. if (err)
  1238. goto exit_remove_files;
  1239. }
  1240. if (data->has_in & (1 << 8)) { /* in8 */
  1241. err = sysfs_create_group(&pdev->dev.kobj,
  1242. &f71805f_group_optin[1]);
  1243. if (err)
  1244. goto exit_remove_files;
  1245. }
  1246. if (data->has_in & (1 << 9)) { /* in9 (F71872F/FG only) */
  1247. err = sysfs_create_group(&pdev->dev.kobj,
  1248. &f71805f_group_optin[2]);
  1249. if (err)
  1250. goto exit_remove_files;
  1251. }
  1252. if (data->has_in & (1 << 10)) { /* in9 (F71872F/FG only) */
  1253. err = sysfs_create_group(&pdev->dev.kobj,
  1254. &f71805f_group_optin[3]);
  1255. if (err)
  1256. goto exit_remove_files;
  1257. }
  1258. for (i = 0; i < 3; i++) {
  1259. /* If control mode is PWM, create pwm_freq file */
  1260. if (!(data->fan_ctrl[i] & FAN_CTRL_DC_MODE)) {
  1261. err = sysfs_create_file(&pdev->dev.kobj,
  1262. f71805f_attributes_pwm_freq[i]);
  1263. if (err)
  1264. goto exit_remove_files;
  1265. }
  1266. /* If PWM is in manual mode, add write permission */
  1267. if (data->fan_ctrl[i] & FAN_CTRL_MODE_MANUAL) {
  1268. err = sysfs_chmod_file(&pdev->dev.kobj,
  1269. f71805f_attr_pwm[i],
  1270. S_IRUGO | S_IWUSR);
  1271. if (err) {
  1272. dev_err(&pdev->dev, "chmod +w pwm%d failed\n",
  1273. i + 1);
  1274. goto exit_remove_files;
  1275. }
  1276. }
  1277. }
  1278. data->hwmon_dev = hwmon_device_register(&pdev->dev);
  1279. if (IS_ERR(data->hwmon_dev)) {
  1280. err = PTR_ERR(data->hwmon_dev);
  1281. dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
  1282. goto exit_remove_files;
  1283. }
  1284. return 0;
  1285. exit_remove_files:
  1286. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
  1287. for (i = 0; i < 4; i++)
  1288. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
  1289. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
  1290. return err;
  1291. }
  1292. static int f71805f_remove(struct platform_device *pdev)
  1293. {
  1294. struct f71805f_data *data = platform_get_drvdata(pdev);
  1295. int i;
  1296. hwmon_device_unregister(data->hwmon_dev);
  1297. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
  1298. for (i = 0; i < 4; i++)
  1299. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
  1300. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
  1301. return 0;
  1302. }
  1303. static struct platform_driver f71805f_driver = {
  1304. .driver = {
  1305. .name = DRVNAME,
  1306. },
  1307. .probe = f71805f_probe,
  1308. .remove = f71805f_remove,
  1309. };
  1310. static int __init f71805f_device_add(unsigned short address,
  1311. const struct f71805f_sio_data *sio_data)
  1312. {
  1313. struct resource res = {
  1314. .start = address,
  1315. .end = address + REGION_LENGTH - 1,
  1316. .flags = IORESOURCE_IO,
  1317. };
  1318. int err;
  1319. pdev = platform_device_alloc(DRVNAME, address);
  1320. if (!pdev) {
  1321. err = -ENOMEM;
  1322. pr_err("Device allocation failed\n");
  1323. goto exit;
  1324. }
  1325. res.name = pdev->name;
  1326. err = acpi_check_resource_conflict(&res);
  1327. if (err)
  1328. goto exit_device_put;
  1329. err = platform_device_add_resources(pdev, &res, 1);
  1330. if (err) {
  1331. pr_err("Device resource addition failed (%d)\n", err);
  1332. goto exit_device_put;
  1333. }
  1334. err = platform_device_add_data(pdev, sio_data,
  1335. sizeof(struct f71805f_sio_data));
  1336. if (err) {
  1337. pr_err("Platform data allocation failed\n");
  1338. goto exit_device_put;
  1339. }
  1340. err = platform_device_add(pdev);
  1341. if (err) {
  1342. pr_err("Device addition failed (%d)\n", err);
  1343. goto exit_device_put;
  1344. }
  1345. return 0;
  1346. exit_device_put:
  1347. platform_device_put(pdev);
  1348. exit:
  1349. return err;
  1350. }
  1351. static int __init f71805f_find(int sioaddr, unsigned short *address,
  1352. struct f71805f_sio_data *sio_data)
  1353. {
  1354. int err = -ENODEV;
  1355. u16 devid;
  1356. static const char * const names[] = {
  1357. "F71805F/FG",
  1358. "F71872F/FG or F71806F/FG",
  1359. };
  1360. superio_enter(sioaddr);
  1361. devid = superio_inw(sioaddr, SIO_REG_MANID);
  1362. if (devid != SIO_FINTEK_ID)
  1363. goto exit;
  1364. devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
  1365. switch (devid) {
  1366. case SIO_F71805F_ID:
  1367. sio_data->kind = f71805f;
  1368. break;
  1369. case SIO_F71872F_ID:
  1370. sio_data->kind = f71872f;
  1371. sio_data->fnsel1 = superio_inb(sioaddr, SIO_REG_FNSEL1);
  1372. break;
  1373. default:
  1374. pr_info("Unsupported Fintek device, skipping\n");
  1375. goto exit;
  1376. }
  1377. superio_select(sioaddr, F71805F_LD_HWM);
  1378. if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
  1379. pr_warn("Device not activated, skipping\n");
  1380. goto exit;
  1381. }
  1382. *address = superio_inw(sioaddr, SIO_REG_ADDR);
  1383. if (*address == 0) {
  1384. pr_warn("Base address not set, skipping\n");
  1385. goto exit;
  1386. }
  1387. *address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
  1388. err = 0;
  1389. pr_info("Found %s chip at %#x, revision %u\n",
  1390. names[sio_data->kind], *address,
  1391. superio_inb(sioaddr, SIO_REG_DEVREV));
  1392. exit:
  1393. superio_exit(sioaddr);
  1394. return err;
  1395. }
  1396. static int __init f71805f_init(void)
  1397. {
  1398. int err;
  1399. unsigned short address;
  1400. struct f71805f_sio_data sio_data;
  1401. if (f71805f_find(0x2e, &address, &sio_data)
  1402. && f71805f_find(0x4e, &address, &sio_data))
  1403. return -ENODEV;
  1404. err = platform_driver_register(&f71805f_driver);
  1405. if (err)
  1406. goto exit;
  1407. /* Sets global pdev as a side effect */
  1408. err = f71805f_device_add(address, &sio_data);
  1409. if (err)
  1410. goto exit_driver;
  1411. return 0;
  1412. exit_driver:
  1413. platform_driver_unregister(&f71805f_driver);
  1414. exit:
  1415. return err;
  1416. }
  1417. static void __exit f71805f_exit(void)
  1418. {
  1419. platform_device_unregister(pdev);
  1420. platform_driver_unregister(&f71805f_driver);
  1421. }
  1422. MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
  1423. MODULE_LICENSE("GPL");
  1424. MODULE_DESCRIPTION("F71805F/F71872F hardware monitoring driver");
  1425. module_init(f71805f_init);
  1426. module_exit(f71805f_exit);