intel_dp_mst.c 17 KB

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  1. /*
  2. * Copyright © 2008 Intel Corporation
  3. * 2014 Red Hat Inc.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22. * IN THE SOFTWARE.
  23. *
  24. */
  25. #include <drm/drmP.h>
  26. #include "i915_drv.h"
  27. #include "intel_drv.h"
  28. #include <drm/drm_atomic_helper.h>
  29. #include <drm/drm_crtc_helper.h>
  30. #include <drm/drm_edid.h>
  31. static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
  32. struct intel_crtc_state *pipe_config,
  33. struct drm_connector_state *conn_state)
  34. {
  35. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  36. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  37. struct intel_dp *intel_dp = &intel_dig_port->dp;
  38. struct drm_atomic_state *state;
  39. int bpp;
  40. int lane_count, slots;
  41. const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  42. int mst_pbn;
  43. pipe_config->dp_encoder_is_mst = true;
  44. pipe_config->has_pch_encoder = false;
  45. bpp = 24;
  46. /*
  47. * for MST we always configure max link bw - the spec doesn't
  48. * seem to suggest we should do otherwise.
  49. */
  50. lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
  51. pipe_config->lane_count = lane_count;
  52. pipe_config->pipe_bpp = 24;
  53. pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
  54. state = pipe_config->base.state;
  55. mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
  56. pipe_config->pbn = mst_pbn;
  57. slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);
  58. intel_link_compute_m_n(bpp, lane_count,
  59. adjusted_mode->crtc_clock,
  60. pipe_config->port_clock,
  61. &pipe_config->dp_m_n);
  62. pipe_config->dp_m_n.tu = slots;
  63. return true;
  64. }
  65. static void intel_mst_disable_dp(struct intel_encoder *encoder,
  66. struct intel_crtc_state *old_crtc_state,
  67. struct drm_connector_state *old_conn_state)
  68. {
  69. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  70. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  71. struct intel_dp *intel_dp = &intel_dig_port->dp;
  72. struct intel_connector *connector =
  73. to_intel_connector(old_conn_state->connector);
  74. int ret;
  75. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  76. drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port);
  77. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  78. if (ret) {
  79. DRM_ERROR("failed to update payload %d\n", ret);
  80. }
  81. }
  82. static void intel_mst_post_disable_dp(struct intel_encoder *encoder,
  83. struct intel_crtc_state *old_crtc_state,
  84. struct drm_connector_state *old_conn_state)
  85. {
  86. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  87. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  88. struct intel_dp *intel_dp = &intel_dig_port->dp;
  89. struct intel_connector *connector =
  90. to_intel_connector(old_conn_state->connector);
  91. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  92. /* this can fail */
  93. drm_dp_check_act_status(&intel_dp->mst_mgr);
  94. /* and this can also fail */
  95. drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  96. drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port);
  97. intel_dp->active_mst_links--;
  98. intel_mst->connector = NULL;
  99. if (intel_dp->active_mst_links == 0) {
  100. intel_dig_port->base.post_disable(&intel_dig_port->base,
  101. NULL, NULL);
  102. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
  103. }
  104. }
  105. static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
  106. struct intel_crtc_state *pipe_config,
  107. struct drm_connector_state *conn_state)
  108. {
  109. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  110. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  111. struct intel_dp *intel_dp = &intel_dig_port->dp;
  112. struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  113. enum port port = intel_dig_port->port;
  114. struct intel_connector *connector =
  115. to_intel_connector(conn_state->connector);
  116. int ret;
  117. uint32_t temp;
  118. int slots;
  119. /* MST encoders are bound to a crtc, not to a connector,
  120. * force the mapping here for get_hw_state.
  121. */
  122. connector->encoder = encoder;
  123. intel_mst->connector = connector;
  124. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  125. if (intel_dp->active_mst_links == 0) {
  126. intel_ddi_clk_select(&intel_dig_port->base,
  127. pipe_config->shared_dpll);
  128. intel_prepare_dp_ddi_buffers(&intel_dig_port->base);
  129. intel_dp_set_link_params(intel_dp,
  130. pipe_config->port_clock,
  131. pipe_config->lane_count,
  132. true);
  133. intel_ddi_init_dp_buf_reg(&intel_dig_port->base);
  134. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
  135. intel_dp_start_link_train(intel_dp);
  136. intel_dp_stop_link_train(intel_dp);
  137. }
  138. ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
  139. connector->port,
  140. pipe_config->pbn, &slots);
  141. if (ret == false) {
  142. DRM_ERROR("failed to allocate vcpi\n");
  143. return;
  144. }
  145. intel_dp->active_mst_links++;
  146. temp = I915_READ(DP_TP_STATUS(port));
  147. I915_WRITE(DP_TP_STATUS(port), temp);
  148. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  149. }
  150. static void intel_mst_enable_dp(struct intel_encoder *encoder,
  151. struct intel_crtc_state *pipe_config,
  152. struct drm_connector_state *conn_state)
  153. {
  154. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  155. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  156. struct intel_dp *intel_dp = &intel_dig_port->dp;
  157. struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  158. enum port port = intel_dig_port->port;
  159. int ret;
  160. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  161. if (intel_wait_for_register(dev_priv,
  162. DP_TP_STATUS(port),
  163. DP_TP_STATUS_ACT_SENT,
  164. DP_TP_STATUS_ACT_SENT,
  165. 1))
  166. DRM_ERROR("Timed out waiting for ACT sent\n");
  167. ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
  168. ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  169. }
  170. static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
  171. enum pipe *pipe)
  172. {
  173. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  174. *pipe = intel_mst->pipe;
  175. if (intel_mst->connector)
  176. return true;
  177. return false;
  178. }
  179. static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
  180. struct intel_crtc_state *pipe_config)
  181. {
  182. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  183. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  184. struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
  185. struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  186. enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
  187. u32 temp, flags = 0;
  188. temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
  189. if (temp & TRANS_DDI_PHSYNC)
  190. flags |= DRM_MODE_FLAG_PHSYNC;
  191. else
  192. flags |= DRM_MODE_FLAG_NHSYNC;
  193. if (temp & TRANS_DDI_PVSYNC)
  194. flags |= DRM_MODE_FLAG_PVSYNC;
  195. else
  196. flags |= DRM_MODE_FLAG_NVSYNC;
  197. switch (temp & TRANS_DDI_BPC_MASK) {
  198. case TRANS_DDI_BPC_6:
  199. pipe_config->pipe_bpp = 18;
  200. break;
  201. case TRANS_DDI_BPC_8:
  202. pipe_config->pipe_bpp = 24;
  203. break;
  204. case TRANS_DDI_BPC_10:
  205. pipe_config->pipe_bpp = 30;
  206. break;
  207. case TRANS_DDI_BPC_12:
  208. pipe_config->pipe_bpp = 36;
  209. break;
  210. default:
  211. break;
  212. }
  213. pipe_config->base.adjusted_mode.flags |= flags;
  214. pipe_config->lane_count =
  215. ((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;
  216. intel_dp_get_m_n(crtc, pipe_config);
  217. intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
  218. }
  219. static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
  220. {
  221. struct intel_connector *intel_connector = to_intel_connector(connector);
  222. struct intel_dp *intel_dp = intel_connector->mst_port;
  223. struct edid *edid;
  224. int ret;
  225. if (!intel_dp) {
  226. return intel_connector_update_modes(connector, NULL);
  227. }
  228. edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
  229. ret = intel_connector_update_modes(connector, edid);
  230. kfree(edid);
  231. return ret;
  232. }
  233. static enum drm_connector_status
  234. intel_dp_mst_detect(struct drm_connector *connector, bool force)
  235. {
  236. struct intel_connector *intel_connector = to_intel_connector(connector);
  237. struct intel_dp *intel_dp = intel_connector->mst_port;
  238. if (!intel_dp)
  239. return connector_status_disconnected;
  240. return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port);
  241. }
  242. static int
  243. intel_dp_mst_set_property(struct drm_connector *connector,
  244. struct drm_property *property,
  245. uint64_t val)
  246. {
  247. return 0;
  248. }
  249. static void
  250. intel_dp_mst_connector_destroy(struct drm_connector *connector)
  251. {
  252. struct intel_connector *intel_connector = to_intel_connector(connector);
  253. if (!IS_ERR_OR_NULL(intel_connector->edid))
  254. kfree(intel_connector->edid);
  255. drm_connector_cleanup(connector);
  256. kfree(connector);
  257. }
  258. static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
  259. .dpms = drm_atomic_helper_connector_dpms,
  260. .detect = intel_dp_mst_detect,
  261. .fill_modes = drm_helper_probe_single_connector_modes,
  262. .set_property = intel_dp_mst_set_property,
  263. .atomic_get_property = intel_connector_atomic_get_property,
  264. .late_register = intel_connector_register,
  265. .early_unregister = intel_connector_unregister,
  266. .destroy = intel_dp_mst_connector_destroy,
  267. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  268. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  269. };
  270. static int intel_dp_mst_get_modes(struct drm_connector *connector)
  271. {
  272. return intel_dp_mst_get_ddc_modes(connector);
  273. }
  274. static enum drm_mode_status
  275. intel_dp_mst_mode_valid(struct drm_connector *connector,
  276. struct drm_display_mode *mode)
  277. {
  278. int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
  279. /* TODO - validate mode against available PBN for link */
  280. if (mode->clock < 10000)
  281. return MODE_CLOCK_LOW;
  282. if (mode->flags & DRM_MODE_FLAG_DBLCLK)
  283. return MODE_H_ILLEGAL;
  284. if (mode->clock > max_dotclk)
  285. return MODE_CLOCK_HIGH;
  286. return MODE_OK;
  287. }
  288. static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
  289. struct drm_connector_state *state)
  290. {
  291. struct intel_connector *intel_connector = to_intel_connector(connector);
  292. struct intel_dp *intel_dp = intel_connector->mst_port;
  293. struct intel_crtc *crtc = to_intel_crtc(state->crtc);
  294. if (!intel_dp)
  295. return NULL;
  296. return &intel_dp->mst_encoders[crtc->pipe]->base.base;
  297. }
  298. static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
  299. {
  300. struct intel_connector *intel_connector = to_intel_connector(connector);
  301. struct intel_dp *intel_dp = intel_connector->mst_port;
  302. if (!intel_dp)
  303. return NULL;
  304. return &intel_dp->mst_encoders[0]->base.base;
  305. }
  306. static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
  307. .get_modes = intel_dp_mst_get_modes,
  308. .mode_valid = intel_dp_mst_mode_valid,
  309. .atomic_best_encoder = intel_mst_atomic_best_encoder,
  310. .best_encoder = intel_mst_best_encoder,
  311. };
  312. static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
  313. {
  314. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  315. drm_encoder_cleanup(encoder);
  316. kfree(intel_mst);
  317. }
  318. static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
  319. .destroy = intel_dp_mst_encoder_destroy,
  320. };
  321. static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
  322. {
  323. if (connector->encoder && connector->base.state->crtc) {
  324. enum pipe pipe;
  325. if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
  326. return false;
  327. return true;
  328. }
  329. return false;
  330. }
  331. static void intel_connector_add_to_fbdev(struct intel_connector *connector)
  332. {
  333. #ifdef CONFIG_DRM_FBDEV_EMULATION
  334. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  335. if (dev_priv->fbdev)
  336. drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper,
  337. &connector->base);
  338. #endif
  339. }
  340. static void intel_connector_remove_from_fbdev(struct intel_connector *connector)
  341. {
  342. #ifdef CONFIG_DRM_FBDEV_EMULATION
  343. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  344. if (dev_priv->fbdev)
  345. drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper,
  346. &connector->base);
  347. #endif
  348. }
  349. static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
  350. {
  351. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  352. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  353. struct drm_device *dev = intel_dig_port->base.base.dev;
  354. struct intel_connector *intel_connector;
  355. struct drm_connector *connector;
  356. int i;
  357. intel_connector = intel_connector_alloc();
  358. if (!intel_connector)
  359. return NULL;
  360. connector = &intel_connector->base;
  361. drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
  362. drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
  363. intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
  364. intel_connector->mst_port = intel_dp;
  365. intel_connector->port = port;
  366. for (i = PIPE_A; i <= PIPE_C; i++) {
  367. drm_mode_connector_attach_encoder(&intel_connector->base,
  368. &intel_dp->mst_encoders[i]->base.base);
  369. }
  370. intel_dp_add_properties(intel_dp, connector);
  371. drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
  372. drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
  373. drm_mode_connector_set_path_property(connector, pathprop);
  374. return connector;
  375. }
  376. static void intel_dp_register_mst_connector(struct drm_connector *connector)
  377. {
  378. struct intel_connector *intel_connector = to_intel_connector(connector);
  379. struct drm_device *dev = connector->dev;
  380. drm_modeset_lock_all(dev);
  381. intel_connector_add_to_fbdev(intel_connector);
  382. drm_modeset_unlock_all(dev);
  383. drm_connector_register(&intel_connector->base);
  384. }
  385. static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
  386. struct drm_connector *connector)
  387. {
  388. struct intel_connector *intel_connector = to_intel_connector(connector);
  389. struct drm_device *dev = connector->dev;
  390. drm_connector_unregister(connector);
  391. /* need to nuke the connector */
  392. drm_modeset_lock_all(dev);
  393. intel_connector_remove_from_fbdev(intel_connector);
  394. intel_connector->mst_port = NULL;
  395. drm_modeset_unlock_all(dev);
  396. drm_connector_unreference(&intel_connector->base);
  397. DRM_DEBUG_KMS("\n");
  398. }
  399. static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
  400. {
  401. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  402. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  403. struct drm_device *dev = intel_dig_port->base.base.dev;
  404. drm_kms_helper_hotplug_event(dev);
  405. }
  406. static const struct drm_dp_mst_topology_cbs mst_cbs = {
  407. .add_connector = intel_dp_add_mst_connector,
  408. .register_connector = intel_dp_register_mst_connector,
  409. .destroy_connector = intel_dp_destroy_mst_connector,
  410. .hotplug = intel_dp_mst_hotplug,
  411. };
  412. static struct intel_dp_mst_encoder *
  413. intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
  414. {
  415. struct intel_dp_mst_encoder *intel_mst;
  416. struct intel_encoder *intel_encoder;
  417. struct drm_device *dev = intel_dig_port->base.base.dev;
  418. intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
  419. if (!intel_mst)
  420. return NULL;
  421. intel_mst->pipe = pipe;
  422. intel_encoder = &intel_mst->base;
  423. intel_mst->primary = intel_dig_port;
  424. drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
  425. DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));
  426. intel_encoder->type = INTEL_OUTPUT_DP_MST;
  427. intel_encoder->crtc_mask = 0x7;
  428. intel_encoder->cloneable = 0;
  429. intel_encoder->compute_config = intel_dp_mst_compute_config;
  430. intel_encoder->disable = intel_mst_disable_dp;
  431. intel_encoder->post_disable = intel_mst_post_disable_dp;
  432. intel_encoder->pre_enable = intel_mst_pre_enable_dp;
  433. intel_encoder->enable = intel_mst_enable_dp;
  434. intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
  435. intel_encoder->get_config = intel_dp_mst_enc_get_config;
  436. return intel_mst;
  437. }
  438. static bool
  439. intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
  440. {
  441. int i;
  442. struct intel_dp *intel_dp = &intel_dig_port->dp;
  443. for (i = PIPE_A; i <= PIPE_C; i++)
  444. intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
  445. return true;
  446. }
  447. int
  448. intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
  449. {
  450. struct intel_dp *intel_dp = &intel_dig_port->dp;
  451. struct drm_device *dev = intel_dig_port->base.base.dev;
  452. int ret;
  453. intel_dp->can_mst = true;
  454. intel_dp->mst_mgr.cbs = &mst_cbs;
  455. /* create encoders */
  456. intel_dp_create_fake_mst_encoders(intel_dig_port);
  457. ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id);
  458. if (ret) {
  459. intel_dp->can_mst = false;
  460. return ret;
  461. }
  462. return 0;
  463. }
  464. void
  465. intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
  466. {
  467. struct intel_dp *intel_dp = &intel_dig_port->dp;
  468. if (!intel_dp->can_mst)
  469. return;
  470. drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
  471. /* encoders will get killed by normal cleanup */
  472. }