i915_vgpu.c 9.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265
  1. /*
  2. * Copyright(c) 2011-2015 Intel Corporation. All rights reserved.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21. * SOFTWARE.
  22. */
  23. #include "intel_drv.h"
  24. #include "i915_vgpu.h"
  25. /**
  26. * DOC: Intel GVT-g guest support
  27. *
  28. * Intel GVT-g is a graphics virtualization technology which shares the
  29. * GPU among multiple virtual machines on a time-sharing basis. Each
  30. * virtual machine is presented a virtual GPU (vGPU), which has equivalent
  31. * features as the underlying physical GPU (pGPU), so i915 driver can run
  32. * seamlessly in a virtual machine. This file provides vGPU specific
  33. * optimizations when running in a virtual machine, to reduce the complexity
  34. * of vGPU emulation and to improve the overall performance.
  35. *
  36. * A primary function introduced here is so-called "address space ballooning"
  37. * technique. Intel GVT-g partitions global graphics memory among multiple VMs,
  38. * so each VM can directly access a portion of the memory without hypervisor's
  39. * intervention, e.g. filling textures or queuing commands. However with the
  40. * partitioning an unmodified i915 driver would assume a smaller graphics
  41. * memory starting from address ZERO, then requires vGPU emulation module to
  42. * translate the graphics address between 'guest view' and 'host view', for
  43. * all registers and command opcodes which contain a graphics memory address.
  44. * To reduce the complexity, Intel GVT-g introduces "address space ballooning",
  45. * by telling the exact partitioning knowledge to each guest i915 driver, which
  46. * then reserves and prevents non-allocated portions from allocation. Thus vGPU
  47. * emulation module only needs to scan and validate graphics addresses without
  48. * complexity of address translation.
  49. *
  50. */
  51. /**
  52. * i915_check_vgpu - detect virtual GPU
  53. * @dev_priv: i915 device private
  54. *
  55. * This function is called at the initialization stage, to detect whether
  56. * running on a vGPU.
  57. */
  58. void i915_check_vgpu(struct drm_i915_private *dev_priv)
  59. {
  60. u64 magic;
  61. u16 version_major;
  62. BUILD_BUG_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE);
  63. magic = __raw_i915_read64(dev_priv, vgtif_reg(magic));
  64. if (magic != VGT_MAGIC)
  65. return;
  66. version_major = __raw_i915_read16(dev_priv, vgtif_reg(version_major));
  67. if (version_major < VGT_VERSION_MAJOR) {
  68. DRM_INFO("VGT interface version mismatch!\n");
  69. return;
  70. }
  71. dev_priv->vgpu.active = true;
  72. DRM_INFO("Virtual GPU for Intel GVT-g detected.\n");
  73. }
  74. struct _balloon_info_ {
  75. /*
  76. * There are up to 2 regions per mappable/unmappable graphic
  77. * memory that might be ballooned. Here, index 0/1 is for mappable
  78. * graphic memory, 2/3 for unmappable graphic memory.
  79. */
  80. struct drm_mm_node space[4];
  81. };
  82. static struct _balloon_info_ bl_info;
  83. /**
  84. * intel_vgt_deballoon - deballoon reserved graphics address trunks
  85. * @dev_priv: i915 device private data
  86. *
  87. * This function is called to deallocate the ballooned-out graphic memory, when
  88. * driver is unloaded or when ballooning fails.
  89. */
  90. void intel_vgt_deballoon(struct drm_i915_private *dev_priv)
  91. {
  92. int i;
  93. if (!intel_vgpu_active(dev_priv))
  94. return;
  95. DRM_DEBUG("VGT deballoon.\n");
  96. for (i = 0; i < 4; i++) {
  97. if (bl_info.space[i].allocated)
  98. drm_mm_remove_node(&bl_info.space[i]);
  99. }
  100. memset(&bl_info, 0, sizeof(bl_info));
  101. }
  102. static int vgt_balloon_space(struct drm_mm *mm,
  103. struct drm_mm_node *node,
  104. unsigned long start, unsigned long end)
  105. {
  106. unsigned long size = end - start;
  107. if (start == end)
  108. return -EINVAL;
  109. DRM_INFO("balloon space: range [ 0x%lx - 0x%lx ] %lu KiB.\n",
  110. start, end, size / 1024);
  111. node->start = start;
  112. node->size = size;
  113. return drm_mm_reserve_node(mm, node);
  114. }
  115. /**
  116. * intel_vgt_balloon - balloon out reserved graphics address trunks
  117. * @dev_priv: i915 device private data
  118. *
  119. * This function is called at the initialization stage, to balloon out the
  120. * graphic address space allocated to other vGPUs, by marking these spaces as
  121. * reserved. The ballooning related knowledge(starting address and size of
  122. * the mappable/unmappable graphic memory) is described in the vgt_if structure
  123. * in a reserved mmio range.
  124. *
  125. * To give an example, the drawing below depicts one typical scenario after
  126. * ballooning. Here the vGPU1 has 2 pieces of graphic address spaces ballooned
  127. * out each for the mappable and the non-mappable part. From the vGPU1 point of
  128. * view, the total size is the same as the physical one, with the start address
  129. * of its graphic space being zero. Yet there are some portions ballooned out(
  130. * the shadow part, which are marked as reserved by drm allocator). From the
  131. * host point of view, the graphic address space is partitioned by multiple
  132. * vGPUs in different VMs. ::
  133. *
  134. * vGPU1 view Host view
  135. * 0 ------> +-----------+ +-----------+
  136. * ^ |###########| | vGPU3 |
  137. * | |###########| +-----------+
  138. * | |###########| | vGPU2 |
  139. * | +-----------+ +-----------+
  140. * mappable GM | available | ==> | vGPU1 |
  141. * | +-----------+ +-----------+
  142. * | |###########| | |
  143. * v |###########| | Host |
  144. * +=======+===========+ +===========+
  145. * ^ |###########| | vGPU3 |
  146. * | |###########| +-----------+
  147. * | |###########| | vGPU2 |
  148. * | +-----------+ +-----------+
  149. * unmappable GM | available | ==> | vGPU1 |
  150. * | +-----------+ +-----------+
  151. * | |###########| | |
  152. * | |###########| | Host |
  153. * v |###########| | |
  154. * total GM size ------> +-----------+ +-----------+
  155. *
  156. * Returns:
  157. * zero on success, non-zero if configuration invalid or ballooning failed
  158. */
  159. int intel_vgt_balloon(struct drm_i915_private *dev_priv)
  160. {
  161. struct i915_ggtt *ggtt = &dev_priv->ggtt;
  162. unsigned long ggtt_end = ggtt->base.start + ggtt->base.total;
  163. unsigned long mappable_base, mappable_size, mappable_end;
  164. unsigned long unmappable_base, unmappable_size, unmappable_end;
  165. int ret;
  166. if (!intel_vgpu_active(dev_priv))
  167. return 0;
  168. mappable_base = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.base));
  169. mappable_size = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.size));
  170. unmappable_base = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.base));
  171. unmappable_size = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.size));
  172. mappable_end = mappable_base + mappable_size;
  173. unmappable_end = unmappable_base + unmappable_size;
  174. DRM_INFO("VGT ballooning configuration:\n");
  175. DRM_INFO("Mappable graphic memory: base 0x%lx size %ldKiB\n",
  176. mappable_base, mappable_size / 1024);
  177. DRM_INFO("Unmappable graphic memory: base 0x%lx size %ldKiB\n",
  178. unmappable_base, unmappable_size / 1024);
  179. if (mappable_base < ggtt->base.start ||
  180. mappable_end > ggtt->mappable_end ||
  181. unmappable_base < ggtt->mappable_end ||
  182. unmappable_end > ggtt_end) {
  183. DRM_ERROR("Invalid ballooning configuration!\n");
  184. return -EINVAL;
  185. }
  186. /* Unmappable graphic memory ballooning */
  187. if (unmappable_base > ggtt->mappable_end) {
  188. ret = vgt_balloon_space(&ggtt->base.mm,
  189. &bl_info.space[2],
  190. ggtt->mappable_end,
  191. unmappable_base);
  192. if (ret)
  193. goto err;
  194. }
  195. /*
  196. * No need to partition out the last physical page,
  197. * because it is reserved to the guard page.
  198. */
  199. if (unmappable_end < ggtt_end - PAGE_SIZE) {
  200. ret = vgt_balloon_space(&ggtt->base.mm,
  201. &bl_info.space[3],
  202. unmappable_end,
  203. ggtt_end - PAGE_SIZE);
  204. if (ret)
  205. goto err;
  206. }
  207. /* Mappable graphic memory ballooning */
  208. if (mappable_base > ggtt->base.start) {
  209. ret = vgt_balloon_space(&ggtt->base.mm,
  210. &bl_info.space[0],
  211. ggtt->base.start, mappable_base);
  212. if (ret)
  213. goto err;
  214. }
  215. if (mappable_end < ggtt->mappable_end) {
  216. ret = vgt_balloon_space(&ggtt->base.mm,
  217. &bl_info.space[1],
  218. mappable_end,
  219. ggtt->mappable_end);
  220. if (ret)
  221. goto err;
  222. }
  223. DRM_INFO("VGT balloon successfully\n");
  224. return 0;
  225. err:
  226. DRM_ERROR("VGT balloon fail\n");
  227. intel_vgt_deballoon(dev_priv);
  228. return ret;
  229. }