time-orion.c 4.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171
  1. /*
  2. * Marvell Orion SoC timer handling.
  3. *
  4. * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. *
  10. * Timer 0 is used as free-running clocksource, while timer 1 is
  11. * used as clock_event_device.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/bitops.h>
  15. #include <linux/clk.h>
  16. #include <linux/clockchips.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/of_address.h>
  19. #include <linux/of_irq.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/sched_clock.h>
  22. #define TIMER_CTRL 0x00
  23. #define TIMER0_EN BIT(0)
  24. #define TIMER0_RELOAD_EN BIT(1)
  25. #define TIMER1_EN BIT(2)
  26. #define TIMER1_RELOAD_EN BIT(3)
  27. #define TIMER0_RELOAD 0x10
  28. #define TIMER0_VAL 0x14
  29. #define TIMER1_RELOAD 0x18
  30. #define TIMER1_VAL 0x1c
  31. #define ORION_ONESHOT_MIN 1
  32. #define ORION_ONESHOT_MAX 0xfffffffe
  33. static void __iomem *timer_base;
  34. /*
  35. * Free-running clocksource handling.
  36. */
  37. static u64 notrace orion_read_sched_clock(void)
  38. {
  39. return ~readl(timer_base + TIMER0_VAL);
  40. }
  41. /*
  42. * Clockevent handling.
  43. */
  44. static u32 ticks_per_jiffy;
  45. static int orion_clkevt_next_event(unsigned long delta,
  46. struct clock_event_device *dev)
  47. {
  48. /* setup and enable one-shot timer */
  49. writel(delta, timer_base + TIMER1_VAL);
  50. atomic_io_modify(timer_base + TIMER_CTRL,
  51. TIMER1_RELOAD_EN | TIMER1_EN, TIMER1_EN);
  52. return 0;
  53. }
  54. static int orion_clkevt_shutdown(struct clock_event_device *dev)
  55. {
  56. /* disable timer */
  57. atomic_io_modify(timer_base + TIMER_CTRL,
  58. TIMER1_RELOAD_EN | TIMER1_EN, 0);
  59. return 0;
  60. }
  61. static int orion_clkevt_set_periodic(struct clock_event_device *dev)
  62. {
  63. /* setup and enable periodic timer at 1/HZ intervals */
  64. writel(ticks_per_jiffy - 1, timer_base + TIMER1_RELOAD);
  65. writel(ticks_per_jiffy - 1, timer_base + TIMER1_VAL);
  66. atomic_io_modify(timer_base + TIMER_CTRL,
  67. TIMER1_RELOAD_EN | TIMER1_EN,
  68. TIMER1_RELOAD_EN | TIMER1_EN);
  69. return 0;
  70. }
  71. static struct clock_event_device orion_clkevt = {
  72. .name = "orion_event",
  73. .features = CLOCK_EVT_FEAT_ONESHOT |
  74. CLOCK_EVT_FEAT_PERIODIC,
  75. .shift = 32,
  76. .rating = 300,
  77. .set_next_event = orion_clkevt_next_event,
  78. .set_state_shutdown = orion_clkevt_shutdown,
  79. .set_state_periodic = orion_clkevt_set_periodic,
  80. .set_state_oneshot = orion_clkevt_shutdown,
  81. .tick_resume = orion_clkevt_shutdown,
  82. };
  83. static irqreturn_t orion_clkevt_irq_handler(int irq, void *dev_id)
  84. {
  85. orion_clkevt.event_handler(&orion_clkevt);
  86. return IRQ_HANDLED;
  87. }
  88. static struct irqaction orion_clkevt_irq = {
  89. .name = "orion_event",
  90. .flags = IRQF_TIMER,
  91. .handler = orion_clkevt_irq_handler,
  92. };
  93. static int __init orion_timer_init(struct device_node *np)
  94. {
  95. struct clk *clk;
  96. int irq, ret;
  97. /* timer registers are shared with watchdog timer */
  98. timer_base = of_iomap(np, 0);
  99. if (!timer_base) {
  100. pr_err("%s: unable to map resource\n", np->name);
  101. return -ENXIO;
  102. }
  103. clk = of_clk_get(np, 0);
  104. if (IS_ERR(clk)) {
  105. pr_err("%s: unable to get clk\n", np->name);
  106. return PTR_ERR(clk);
  107. }
  108. ret = clk_prepare_enable(clk);
  109. if (ret) {
  110. pr_err("Failed to prepare clock");
  111. return ret;
  112. }
  113. /* we are only interested in timer1 irq */
  114. irq = irq_of_parse_and_map(np, 1);
  115. if (irq <= 0) {
  116. pr_err("%s: unable to parse timer1 irq\n", np->name);
  117. return -EINVAL;
  118. }
  119. /* setup timer0 as free-running clocksource */
  120. writel(~0, timer_base + TIMER0_VAL);
  121. writel(~0, timer_base + TIMER0_RELOAD);
  122. atomic_io_modify(timer_base + TIMER_CTRL,
  123. TIMER0_RELOAD_EN | TIMER0_EN,
  124. TIMER0_RELOAD_EN | TIMER0_EN);
  125. ret = clocksource_mmio_init(timer_base + TIMER0_VAL, "orion_clocksource",
  126. clk_get_rate(clk), 300, 32,
  127. clocksource_mmio_readl_down);
  128. if (ret) {
  129. pr_err("Failed to initialize mmio timer");
  130. return ret;
  131. }
  132. sched_clock_register(orion_read_sched_clock, 32, clk_get_rate(clk));
  133. /* setup timer1 as clockevent timer */
  134. ret = setup_irq(irq, &orion_clkevt_irq);
  135. if (ret) {
  136. pr_err("%s: unable to setup irq\n", np->name);
  137. return ret;
  138. }
  139. ticks_per_jiffy = (clk_get_rate(clk) + HZ/2) / HZ;
  140. orion_clkevt.cpumask = cpumask_of(0);
  141. orion_clkevt.irq = irq;
  142. clockevents_config_and_register(&orion_clkevt, clk_get_rate(clk),
  143. ORION_ONESHOT_MIN, ORION_ONESHOT_MAX);
  144. return 0;
  145. }
  146. CLOCKSOURCE_OF_DECLARE(orion_timer, "marvell,orion-timer", orion_timer_init);