tpm_tis_core.c 21 KB

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  1. /*
  2. * Copyright (C) 2005, 2006 IBM Corporation
  3. * Copyright (C) 2014, 2015 Intel Corporation
  4. *
  5. * Authors:
  6. * Leendert van Doorn <leendert@watson.ibm.com>
  7. * Kylene Hall <kjhall@us.ibm.com>
  8. *
  9. * Maintained by: <tpmdd-devel@lists.sourceforge.net>
  10. *
  11. * Device driver for TCG/TCPA TPM (trusted platform module).
  12. * Specifications at www.trustedcomputinggroup.org
  13. *
  14. * This device driver implements the TPM interface as defined in
  15. * the TCG TPM Interface Spec version 1.2, revision 1.0.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation, version 2 of the
  20. * License.
  21. */
  22. #include <linux/init.h>
  23. #include <linux/module.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/pnp.h>
  26. #include <linux/slab.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/wait.h>
  29. #include <linux/acpi.h>
  30. #include <linux/freezer.h>
  31. #include "tpm.h"
  32. #include "tpm_tis_core.h"
  33. /* Before we attempt to access the TPM we must see that the valid bit is set.
  34. * The specification says that this bit is 0 at reset and remains 0 until the
  35. * 'TPM has gone through its self test and initialization and has established
  36. * correct values in the other bits.'
  37. */
  38. static int wait_startup(struct tpm_chip *chip, int l)
  39. {
  40. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  41. unsigned long stop = jiffies + chip->timeout_a;
  42. do {
  43. int rc;
  44. u8 access;
  45. rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
  46. if (rc < 0)
  47. return rc;
  48. if (access & TPM_ACCESS_VALID)
  49. return 0;
  50. msleep(TPM_TIMEOUT);
  51. } while (time_before(jiffies, stop));
  52. return -1;
  53. }
  54. static int check_locality(struct tpm_chip *chip, int l)
  55. {
  56. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  57. int rc;
  58. u8 access;
  59. rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
  60. if (rc < 0)
  61. return rc;
  62. if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
  63. (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
  64. return priv->locality = l;
  65. return -1;
  66. }
  67. static void release_locality(struct tpm_chip *chip, int l, int force)
  68. {
  69. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  70. int rc;
  71. u8 access;
  72. rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
  73. if (rc < 0)
  74. return;
  75. if (force || (access &
  76. (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
  77. (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
  78. tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
  79. }
  80. static int request_locality(struct tpm_chip *chip, int l)
  81. {
  82. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  83. unsigned long stop, timeout;
  84. long rc;
  85. if (check_locality(chip, l) >= 0)
  86. return l;
  87. rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
  88. if (rc < 0)
  89. return rc;
  90. stop = jiffies + chip->timeout_a;
  91. if (chip->flags & TPM_CHIP_FLAG_IRQ) {
  92. again:
  93. timeout = stop - jiffies;
  94. if ((long)timeout <= 0)
  95. return -1;
  96. rc = wait_event_interruptible_timeout(priv->int_queue,
  97. (check_locality
  98. (chip, l) >= 0),
  99. timeout);
  100. if (rc > 0)
  101. return l;
  102. if (rc == -ERESTARTSYS && freezing(current)) {
  103. clear_thread_flag(TIF_SIGPENDING);
  104. goto again;
  105. }
  106. } else {
  107. /* wait for burstcount */
  108. do {
  109. if (check_locality(chip, l) >= 0)
  110. return l;
  111. msleep(TPM_TIMEOUT);
  112. } while (time_before(jiffies, stop));
  113. }
  114. return -1;
  115. }
  116. static u8 tpm_tis_status(struct tpm_chip *chip)
  117. {
  118. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  119. int rc;
  120. u8 status;
  121. rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status);
  122. if (rc < 0)
  123. return 0;
  124. return status;
  125. }
  126. static void tpm_tis_ready(struct tpm_chip *chip)
  127. {
  128. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  129. /* this causes the current command to be aborted */
  130. tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
  131. }
  132. static int get_burstcount(struct tpm_chip *chip)
  133. {
  134. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  135. unsigned long stop;
  136. int burstcnt, rc;
  137. u32 value;
  138. /* wait for burstcount */
  139. if (chip->flags & TPM_CHIP_FLAG_TPM2)
  140. stop = jiffies + chip->timeout_a;
  141. else
  142. stop = jiffies + chip->timeout_d;
  143. do {
  144. rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value);
  145. if (rc < 0)
  146. return rc;
  147. burstcnt = (value >> 8) & 0xFFFF;
  148. if (burstcnt)
  149. return burstcnt;
  150. msleep(TPM_TIMEOUT);
  151. } while (time_before(jiffies, stop));
  152. return -EBUSY;
  153. }
  154. static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
  155. {
  156. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  157. int size = 0, burstcnt, rc;
  158. while (size < count &&
  159. wait_for_tpm_stat(chip,
  160. TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  161. chip->timeout_c,
  162. &priv->read_queue, true) == 0) {
  163. burstcnt = get_burstcount(chip);
  164. if (burstcnt < 0) {
  165. dev_err(&chip->dev, "Unable to read burstcount\n");
  166. return burstcnt;
  167. }
  168. burstcnt = min_t(int, burstcnt, count - size);
  169. rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality),
  170. burstcnt, buf + size);
  171. if (rc < 0)
  172. return rc;
  173. size += burstcnt;
  174. }
  175. return size;
  176. }
  177. static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
  178. {
  179. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  180. int size = 0;
  181. int status;
  182. u32 expected;
  183. if (count < TPM_HEADER_SIZE) {
  184. size = -EIO;
  185. goto out;
  186. }
  187. size = recv_data(chip, buf, TPM_HEADER_SIZE);
  188. /* read first 10 bytes, including tag, paramsize, and result */
  189. if (size < TPM_HEADER_SIZE) {
  190. dev_err(&chip->dev, "Unable to read header\n");
  191. goto out;
  192. }
  193. expected = be32_to_cpu(*(__be32 *) (buf + 2));
  194. if (expected > count || expected < TPM_HEADER_SIZE) {
  195. size = -EIO;
  196. goto out;
  197. }
  198. size += recv_data(chip, &buf[TPM_HEADER_SIZE],
  199. expected - TPM_HEADER_SIZE);
  200. if (size < expected) {
  201. dev_err(&chip->dev, "Unable to read remainder of result\n");
  202. size = -ETIME;
  203. goto out;
  204. }
  205. wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
  206. &priv->int_queue, false);
  207. status = tpm_tis_status(chip);
  208. if (status & TPM_STS_DATA_AVAIL) { /* retry? */
  209. dev_err(&chip->dev, "Error left over data\n");
  210. size = -EIO;
  211. goto out;
  212. }
  213. out:
  214. tpm_tis_ready(chip);
  215. release_locality(chip, priv->locality, 0);
  216. return size;
  217. }
  218. /*
  219. * If interrupts are used (signaled by an irq set in the vendor structure)
  220. * tpm.c can skip polling for the data to be available as the interrupt is
  221. * waited for here
  222. */
  223. static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len)
  224. {
  225. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  226. int rc, status, burstcnt;
  227. size_t count = 0;
  228. bool itpm = priv->flags & TPM_TIS_ITPM_POSSIBLE;
  229. if (request_locality(chip, 0) < 0)
  230. return -EBUSY;
  231. status = tpm_tis_status(chip);
  232. if ((status & TPM_STS_COMMAND_READY) == 0) {
  233. tpm_tis_ready(chip);
  234. if (wait_for_tpm_stat
  235. (chip, TPM_STS_COMMAND_READY, chip->timeout_b,
  236. &priv->int_queue, false) < 0) {
  237. rc = -ETIME;
  238. goto out_err;
  239. }
  240. }
  241. while (count < len - 1) {
  242. burstcnt = get_burstcount(chip);
  243. if (burstcnt < 0) {
  244. dev_err(&chip->dev, "Unable to read burstcount\n");
  245. rc = burstcnt;
  246. goto out_err;
  247. }
  248. burstcnt = min_t(int, burstcnt, len - count - 1);
  249. rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality),
  250. burstcnt, buf + count);
  251. if (rc < 0)
  252. goto out_err;
  253. count += burstcnt;
  254. wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
  255. &priv->int_queue, false);
  256. status = tpm_tis_status(chip);
  257. if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
  258. rc = -EIO;
  259. goto out_err;
  260. }
  261. }
  262. /* write last byte */
  263. rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]);
  264. if (rc < 0)
  265. goto out_err;
  266. wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
  267. &priv->int_queue, false);
  268. status = tpm_tis_status(chip);
  269. if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) {
  270. rc = -EIO;
  271. goto out_err;
  272. }
  273. return 0;
  274. out_err:
  275. tpm_tis_ready(chip);
  276. release_locality(chip, priv->locality, 0);
  277. return rc;
  278. }
  279. static void disable_interrupts(struct tpm_chip *chip)
  280. {
  281. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  282. u32 intmask;
  283. int rc;
  284. rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
  285. if (rc < 0)
  286. intmask = 0;
  287. intmask &= ~TPM_GLOBAL_INT_ENABLE;
  288. rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
  289. devm_free_irq(chip->dev.parent, priv->irq, chip);
  290. priv->irq = 0;
  291. chip->flags &= ~TPM_CHIP_FLAG_IRQ;
  292. }
  293. /*
  294. * If interrupts are used (signaled by an irq set in the vendor structure)
  295. * tpm.c can skip polling for the data to be available as the interrupt is
  296. * waited for here
  297. */
  298. static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len)
  299. {
  300. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  301. int rc;
  302. u32 ordinal;
  303. unsigned long dur;
  304. rc = tpm_tis_send_data(chip, buf, len);
  305. if (rc < 0)
  306. return rc;
  307. /* go and do it */
  308. rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
  309. if (rc < 0)
  310. goto out_err;
  311. if (chip->flags & TPM_CHIP_FLAG_IRQ) {
  312. ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
  313. if (chip->flags & TPM_CHIP_FLAG_TPM2)
  314. dur = tpm2_calc_ordinal_duration(chip, ordinal);
  315. else
  316. dur = tpm_calc_ordinal_duration(chip, ordinal);
  317. if (wait_for_tpm_stat
  318. (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
  319. &priv->read_queue, false) < 0) {
  320. rc = -ETIME;
  321. goto out_err;
  322. }
  323. }
  324. return len;
  325. out_err:
  326. tpm_tis_ready(chip);
  327. release_locality(chip, priv->locality, 0);
  328. return rc;
  329. }
  330. static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
  331. {
  332. int rc, irq;
  333. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  334. if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested)
  335. return tpm_tis_send_main(chip, buf, len);
  336. /* Verify receipt of the expected IRQ */
  337. irq = priv->irq;
  338. priv->irq = 0;
  339. chip->flags &= ~TPM_CHIP_FLAG_IRQ;
  340. rc = tpm_tis_send_main(chip, buf, len);
  341. priv->irq = irq;
  342. chip->flags |= TPM_CHIP_FLAG_IRQ;
  343. if (!priv->irq_tested)
  344. msleep(1);
  345. if (!priv->irq_tested)
  346. disable_interrupts(chip);
  347. priv->irq_tested = true;
  348. return rc;
  349. }
  350. struct tis_vendor_timeout_override {
  351. u32 did_vid;
  352. unsigned long timeout_us[4];
  353. };
  354. static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
  355. /* Atmel 3204 */
  356. { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
  357. (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
  358. };
  359. static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
  360. unsigned long *timeout_cap)
  361. {
  362. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  363. int i, rc;
  364. u32 did_vid;
  365. rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
  366. if (rc < 0)
  367. return rc;
  368. for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
  369. if (vendor_timeout_overrides[i].did_vid != did_vid)
  370. continue;
  371. memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
  372. sizeof(vendor_timeout_overrides[i].timeout_us));
  373. return true;
  374. }
  375. return false;
  376. }
  377. /*
  378. * Early probing for iTPM with STS_DATA_EXPECT flaw.
  379. * Try sending command without itpm flag set and if that
  380. * fails, repeat with itpm flag set.
  381. */
  382. static int probe_itpm(struct tpm_chip *chip)
  383. {
  384. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  385. int rc = 0;
  386. u8 cmd_getticks[] = {
  387. 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
  388. 0x00, 0x00, 0x00, 0xf1
  389. };
  390. size_t len = sizeof(cmd_getticks);
  391. u16 vendor;
  392. rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor);
  393. if (rc < 0)
  394. return rc;
  395. /* probe only iTPMS */
  396. if (vendor != TPM_VID_INTEL)
  397. return 0;
  398. rc = tpm_tis_send_data(chip, cmd_getticks, len);
  399. if (rc == 0)
  400. goto out;
  401. tpm_tis_ready(chip);
  402. release_locality(chip, priv->locality, 0);
  403. rc = tpm_tis_send_data(chip, cmd_getticks, len);
  404. if (rc == 0) {
  405. dev_info(&chip->dev, "Detected an iTPM.\n");
  406. rc = 1;
  407. } else
  408. rc = -EFAULT;
  409. out:
  410. tpm_tis_ready(chip);
  411. release_locality(chip, priv->locality, 0);
  412. return rc;
  413. }
  414. static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
  415. {
  416. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  417. switch (priv->manufacturer_id) {
  418. case TPM_VID_WINBOND:
  419. return ((status == TPM_STS_VALID) ||
  420. (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
  421. case TPM_VID_STM:
  422. return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
  423. default:
  424. return (status == TPM_STS_COMMAND_READY);
  425. }
  426. }
  427. static irqreturn_t tis_int_handler(int dummy, void *dev_id)
  428. {
  429. struct tpm_chip *chip = dev_id;
  430. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  431. u32 interrupt;
  432. int i, rc;
  433. rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
  434. if (rc < 0)
  435. return IRQ_NONE;
  436. if (interrupt == 0)
  437. return IRQ_NONE;
  438. priv->irq_tested = true;
  439. if (interrupt & TPM_INTF_DATA_AVAIL_INT)
  440. wake_up_interruptible(&priv->read_queue);
  441. if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
  442. for (i = 0; i < 5; i++)
  443. if (check_locality(chip, i) >= 0)
  444. break;
  445. if (interrupt &
  446. (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
  447. TPM_INTF_CMD_READY_INT))
  448. wake_up_interruptible(&priv->int_queue);
  449. /* Clear interrupts handled with TPM_EOI */
  450. rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt);
  451. if (rc < 0)
  452. return IRQ_NONE;
  453. tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
  454. return IRQ_HANDLED;
  455. }
  456. static int tpm_tis_gen_interrupt(struct tpm_chip *chip)
  457. {
  458. const char *desc = "attempting to generate an interrupt";
  459. u32 cap2;
  460. cap_t cap;
  461. if (chip->flags & TPM_CHIP_FLAG_TPM2)
  462. return tpm2_get_tpm_pt(chip, 0x100, &cap2, desc);
  463. else
  464. return tpm_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc);
  465. }
  466. /* Register the IRQ and issue a command that will cause an interrupt. If an
  467. * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
  468. * everything and leave in polling mode. Returns 0 on success.
  469. */
  470. static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
  471. int flags, int irq)
  472. {
  473. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  474. u8 original_int_vec;
  475. int rc;
  476. u32 int_status;
  477. if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags,
  478. dev_name(&chip->dev), chip) != 0) {
  479. dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
  480. irq);
  481. return -1;
  482. }
  483. priv->irq = irq;
  484. rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
  485. &original_int_vec);
  486. if (rc < 0)
  487. return rc;
  488. rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq);
  489. if (rc < 0)
  490. return rc;
  491. rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status);
  492. if (rc < 0)
  493. return rc;
  494. /* Clear all existing */
  495. rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status);
  496. if (rc < 0)
  497. return rc;
  498. /* Turn on */
  499. rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality),
  500. intmask | TPM_GLOBAL_INT_ENABLE);
  501. if (rc < 0)
  502. return rc;
  503. priv->irq_tested = false;
  504. /* Generate an interrupt by having the core call through to
  505. * tpm_tis_send
  506. */
  507. rc = tpm_tis_gen_interrupt(chip);
  508. if (rc < 0)
  509. return rc;
  510. /* tpm_tis_send will either confirm the interrupt is working or it
  511. * will call disable_irq which undoes all of the above.
  512. */
  513. if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
  514. rc = tpm_tis_write8(priv, original_int_vec,
  515. TPM_INT_VECTOR(priv->locality));
  516. if (rc < 0)
  517. return rc;
  518. return 1;
  519. }
  520. return 0;
  521. }
  522. /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
  523. * do not have ACPI/etc. We typically expect the interrupt to be declared if
  524. * present.
  525. */
  526. static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
  527. {
  528. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  529. u8 original_int_vec;
  530. int i, rc;
  531. rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
  532. &original_int_vec);
  533. if (rc < 0)
  534. return;
  535. if (!original_int_vec) {
  536. if (IS_ENABLED(CONFIG_X86))
  537. for (i = 3; i <= 15; i++)
  538. if (!tpm_tis_probe_irq_single(chip, intmask, 0,
  539. i))
  540. return;
  541. } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
  542. original_int_vec))
  543. return;
  544. }
  545. void tpm_tis_remove(struct tpm_chip *chip)
  546. {
  547. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  548. u32 reg = TPM_INT_ENABLE(priv->locality);
  549. u32 interrupt;
  550. int rc;
  551. rc = tpm_tis_read32(priv, reg, &interrupt);
  552. if (rc < 0)
  553. interrupt = 0;
  554. tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
  555. release_locality(chip, priv->locality, 1);
  556. }
  557. EXPORT_SYMBOL_GPL(tpm_tis_remove);
  558. static const struct tpm_class_ops tpm_tis = {
  559. .flags = TPM_OPS_AUTO_STARTUP,
  560. .status = tpm_tis_status,
  561. .recv = tpm_tis_recv,
  562. .send = tpm_tis_send,
  563. .cancel = tpm_tis_ready,
  564. .update_timeouts = tpm_tis_update_timeouts,
  565. .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  566. .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  567. .req_canceled = tpm_tis_req_canceled,
  568. };
  569. int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
  570. const struct tpm_tis_phy_ops *phy_ops,
  571. acpi_handle acpi_dev_handle)
  572. {
  573. u32 vendor, intfcaps, intmask;
  574. u8 rid;
  575. int rc, probe;
  576. struct tpm_chip *chip;
  577. chip = tpmm_chip_alloc(dev, &tpm_tis);
  578. if (IS_ERR(chip))
  579. return PTR_ERR(chip);
  580. #ifdef CONFIG_ACPI
  581. chip->acpi_dev_handle = acpi_dev_handle;
  582. #endif
  583. /* Maximum timeouts */
  584. chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX);
  585. chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX);
  586. chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX);
  587. chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX);
  588. priv->phy_ops = phy_ops;
  589. dev_set_drvdata(&chip->dev, priv);
  590. if (wait_startup(chip, 0) != 0) {
  591. rc = -ENODEV;
  592. goto out_err;
  593. }
  594. /* Take control of the TPM's interrupt hardware and shut it off */
  595. rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
  596. if (rc < 0)
  597. goto out_err;
  598. intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
  599. TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
  600. intmask &= ~TPM_GLOBAL_INT_ENABLE;
  601. tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
  602. if (request_locality(chip, 0) != 0) {
  603. rc = -ENODEV;
  604. goto out_err;
  605. }
  606. rc = tpm2_probe(chip);
  607. if (rc)
  608. goto out_err;
  609. rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor);
  610. if (rc < 0)
  611. goto out_err;
  612. priv->manufacturer_id = vendor;
  613. rc = tpm_tis_read8(priv, TPM_RID(0), &rid);
  614. if (rc < 0)
  615. goto out_err;
  616. dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
  617. (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
  618. vendor >> 16, rid);
  619. if (!(priv->flags & TPM_TIS_ITPM_POSSIBLE)) {
  620. probe = probe_itpm(chip);
  621. if (probe < 0) {
  622. rc = -ENODEV;
  623. goto out_err;
  624. }
  625. if (!!probe)
  626. priv->flags |= TPM_TIS_ITPM_POSSIBLE;
  627. }
  628. /* Figure out the capabilities */
  629. rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps);
  630. if (rc < 0)
  631. goto out_err;
  632. dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
  633. intfcaps);
  634. if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
  635. dev_dbg(dev, "\tBurst Count Static\n");
  636. if (intfcaps & TPM_INTF_CMD_READY_INT)
  637. dev_dbg(dev, "\tCommand Ready Int Support\n");
  638. if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
  639. dev_dbg(dev, "\tInterrupt Edge Falling\n");
  640. if (intfcaps & TPM_INTF_INT_EDGE_RISING)
  641. dev_dbg(dev, "\tInterrupt Edge Rising\n");
  642. if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
  643. dev_dbg(dev, "\tInterrupt Level Low\n");
  644. if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
  645. dev_dbg(dev, "\tInterrupt Level High\n");
  646. if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
  647. dev_dbg(dev, "\tLocality Change Int Support\n");
  648. if (intfcaps & TPM_INTF_STS_VALID_INT)
  649. dev_dbg(dev, "\tSts Valid Int Support\n");
  650. if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
  651. dev_dbg(dev, "\tData Avail Int Support\n");
  652. /* Very early on issue a command to the TPM in polling mode to make
  653. * sure it works. May as well use that command to set the proper
  654. * timeouts for the driver.
  655. */
  656. if (tpm_get_timeouts(chip)) {
  657. dev_err(dev, "Could not get TPM timeouts and durations\n");
  658. rc = -ENODEV;
  659. goto out_err;
  660. }
  661. /* INTERRUPT Setup */
  662. init_waitqueue_head(&priv->read_queue);
  663. init_waitqueue_head(&priv->int_queue);
  664. if (irq != -1) {
  665. if (irq) {
  666. tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
  667. irq);
  668. if (!(chip->flags & TPM_CHIP_FLAG_IRQ))
  669. dev_err(&chip->dev, FW_BUG
  670. "TPM interrupt not working, polling instead\n");
  671. } else {
  672. tpm_tis_probe_irq(chip, intmask);
  673. }
  674. }
  675. return tpm_chip_register(chip);
  676. out_err:
  677. tpm_tis_remove(chip);
  678. return rc;
  679. }
  680. EXPORT_SYMBOL_GPL(tpm_tis_core_init);
  681. #ifdef CONFIG_PM_SLEEP
  682. static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
  683. {
  684. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  685. u32 intmask;
  686. int rc;
  687. /* reenable interrupts that device may have lost or
  688. * BIOS/firmware may have disabled
  689. */
  690. rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq);
  691. if (rc < 0)
  692. return;
  693. rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
  694. if (rc < 0)
  695. return;
  696. intmask |= TPM_INTF_CMD_READY_INT
  697. | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
  698. | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
  699. tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
  700. }
  701. int tpm_tis_resume(struct device *dev)
  702. {
  703. struct tpm_chip *chip = dev_get_drvdata(dev);
  704. int ret;
  705. if (chip->flags & TPM_CHIP_FLAG_IRQ)
  706. tpm_tis_reenable_interrupts(chip);
  707. ret = tpm_pm_resume(dev);
  708. if (ret)
  709. return ret;
  710. /* TPM 1.2 requires self-test on resume. This function actually returns
  711. * an error code but for unknown reason it isn't handled.
  712. */
  713. if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
  714. tpm_do_selftest(chip);
  715. return 0;
  716. }
  717. EXPORT_SYMBOL_GPL(tpm_tis_resume);
  718. #endif
  719. MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
  720. MODULE_DESCRIPTION("TPM Driver");
  721. MODULE_VERSION("2.0");
  722. MODULE_LICENSE("GPL");