xen.c 14 KB

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  1. /*
  2. * Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and
  3. * initial domain support. We also handle the DSDT _PRT callbacks for GSI's
  4. * used in HVM and initial domain mode (PV does not parse ACPI, so it has no
  5. * concept of GSIs). Under PV we hook under the pnbbios API for IRQs and
  6. * 0xcf8 PCI configuration read/write.
  7. *
  8. * Author: Ryan Wilson <hap9@epoch.ncsc.mil>
  9. * Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
  10. * Stefano Stabellini <stefano.stabellini@eu.citrix.com>
  11. */
  12. #include <linux/export.h>
  13. #include <linux/init.h>
  14. #include <linux/pci.h>
  15. #include <linux/acpi.h>
  16. #include <linux/io.h>
  17. #include <asm/io_apic.h>
  18. #include <asm/pci_x86.h>
  19. #include <asm/xen/hypervisor.h>
  20. #include <xen/features.h>
  21. #include <xen/events.h>
  22. #include <asm/xen/pci.h>
  23. #include <asm/xen/cpuid.h>
  24. #include <asm/apic.h>
  25. #include <asm/i8259.h>
  26. static int xen_pcifront_enable_irq(struct pci_dev *dev)
  27. {
  28. int rc;
  29. int share = 1;
  30. int pirq;
  31. u8 gsi;
  32. rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
  33. if (rc < 0) {
  34. dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n",
  35. rc);
  36. return rc;
  37. }
  38. /* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/
  39. pirq = gsi;
  40. if (gsi < nr_legacy_irqs())
  41. share = 0;
  42. rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront");
  43. if (rc < 0) {
  44. dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n",
  45. gsi, pirq, rc);
  46. return rc;
  47. }
  48. dev->irq = rc;
  49. dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq);
  50. return 0;
  51. }
  52. #ifdef CONFIG_ACPI
  53. static int xen_register_pirq(u32 gsi, int gsi_override, int triggering,
  54. bool set_pirq)
  55. {
  56. int rc, pirq = -1, irq = -1;
  57. struct physdev_map_pirq map_irq;
  58. int shareable = 0;
  59. char *name;
  60. irq = xen_irq_from_gsi(gsi);
  61. if (irq > 0)
  62. return irq;
  63. if (set_pirq)
  64. pirq = gsi;
  65. map_irq.domid = DOMID_SELF;
  66. map_irq.type = MAP_PIRQ_TYPE_GSI;
  67. map_irq.index = gsi;
  68. map_irq.pirq = pirq;
  69. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  70. if (rc) {
  71. printk(KERN_WARNING "xen map irq failed %d\n", rc);
  72. return -1;
  73. }
  74. if (triggering == ACPI_EDGE_SENSITIVE) {
  75. shareable = 0;
  76. name = "ioapic-edge";
  77. } else {
  78. shareable = 1;
  79. name = "ioapic-level";
  80. }
  81. if (gsi_override >= 0)
  82. gsi = gsi_override;
  83. irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name);
  84. if (irq < 0)
  85. goto out;
  86. printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi);
  87. out:
  88. return irq;
  89. }
  90. static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi,
  91. int trigger, int polarity)
  92. {
  93. if (!xen_hvm_domain())
  94. return -1;
  95. return xen_register_pirq(gsi, -1 /* no GSI override */, trigger,
  96. false /* no mapping of GSI to PIRQ */);
  97. }
  98. #ifdef CONFIG_XEN_DOM0
  99. static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity)
  100. {
  101. int rc, irq;
  102. struct physdev_setup_gsi setup_gsi;
  103. if (!xen_pv_domain())
  104. return -1;
  105. printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n",
  106. gsi, triggering, polarity);
  107. irq = xen_register_pirq(gsi, gsi_override, triggering, true);
  108. setup_gsi.gsi = gsi;
  109. setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1);
  110. setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
  111. rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi);
  112. if (rc == -EEXIST)
  113. printk(KERN_INFO "Already setup the GSI :%d\n", gsi);
  114. else if (rc) {
  115. printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n",
  116. gsi, rc);
  117. }
  118. return irq;
  119. }
  120. static int acpi_register_gsi_xen(struct device *dev, u32 gsi,
  121. int trigger, int polarity)
  122. {
  123. return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity);
  124. }
  125. #endif
  126. #endif
  127. #if defined(CONFIG_PCI_MSI)
  128. #include <linux/msi.h>
  129. #include <asm/msidef.h>
  130. struct xen_pci_frontend_ops *xen_pci_frontend;
  131. EXPORT_SYMBOL_GPL(xen_pci_frontend);
  132. static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
  133. {
  134. int irq, ret, i;
  135. struct msi_desc *msidesc;
  136. int *v;
  137. if (type == PCI_CAP_ID_MSI && nvec > 1)
  138. return 1;
  139. v = kzalloc(sizeof(int) * max(1, nvec), GFP_KERNEL);
  140. if (!v)
  141. return -ENOMEM;
  142. if (type == PCI_CAP_ID_MSIX)
  143. ret = xen_pci_frontend_enable_msix(dev, v, nvec);
  144. else
  145. ret = xen_pci_frontend_enable_msi(dev, v);
  146. if (ret)
  147. goto error;
  148. i = 0;
  149. for_each_pci_msi_entry(msidesc, dev) {
  150. irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i],
  151. (type == PCI_CAP_ID_MSI) ? nvec : 1,
  152. (type == PCI_CAP_ID_MSIX) ?
  153. "pcifront-msi-x" :
  154. "pcifront-msi",
  155. DOMID_SELF);
  156. if (irq < 0) {
  157. ret = irq;
  158. goto free;
  159. }
  160. i++;
  161. }
  162. kfree(v);
  163. return 0;
  164. error:
  165. if (ret == -ENOSYS)
  166. dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n");
  167. else if (ret)
  168. dev_err(&dev->dev, "Xen PCI frontend error: %d!\n", ret);
  169. free:
  170. kfree(v);
  171. return ret;
  172. }
  173. #define XEN_PIRQ_MSI_DATA (MSI_DATA_TRIGGER_EDGE | \
  174. MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0))
  175. static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
  176. struct msi_msg *msg)
  177. {
  178. /* We set vector == 0 to tell the hypervisor we don't care about it,
  179. * but we want a pirq setup instead.
  180. * We use the dest_id field to pass the pirq that we want. */
  181. msg->address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(pirq);
  182. msg->address_lo =
  183. MSI_ADDR_BASE_LO |
  184. MSI_ADDR_DEST_MODE_PHYSICAL |
  185. MSI_ADDR_REDIRECTION_CPU |
  186. MSI_ADDR_DEST_ID(pirq);
  187. msg->data = XEN_PIRQ_MSI_DATA;
  188. }
  189. static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
  190. {
  191. int irq, pirq;
  192. struct msi_desc *msidesc;
  193. struct msi_msg msg;
  194. if (type == PCI_CAP_ID_MSI && nvec > 1)
  195. return 1;
  196. for_each_pci_msi_entry(msidesc, dev) {
  197. pirq = xen_allocate_pirq_msi(dev, msidesc);
  198. if (pirq < 0) {
  199. irq = -ENODEV;
  200. goto error;
  201. }
  202. xen_msi_compose_msg(dev, pirq, &msg);
  203. __pci_write_msi_msg(msidesc, &msg);
  204. dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq);
  205. irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq,
  206. (type == PCI_CAP_ID_MSI) ? nvec : 1,
  207. (type == PCI_CAP_ID_MSIX) ?
  208. "msi-x" : "msi",
  209. DOMID_SELF);
  210. if (irq < 0)
  211. goto error;
  212. dev_dbg(&dev->dev,
  213. "xen: msi --> pirq=%d --> irq=%d\n", pirq, irq);
  214. }
  215. return 0;
  216. error:
  217. dev_err(&dev->dev,
  218. "Xen PCI frontend has not registered MSI/MSI-X support!\n");
  219. return irq;
  220. }
  221. #ifdef CONFIG_XEN_DOM0
  222. static bool __read_mostly pci_seg_supported = true;
  223. static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
  224. {
  225. int ret = 0;
  226. struct msi_desc *msidesc;
  227. for_each_pci_msi_entry(msidesc, dev) {
  228. struct physdev_map_pirq map_irq;
  229. domid_t domid;
  230. domid = ret = xen_find_device_domain_owner(dev);
  231. /* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED,
  232. * hence check ret value for < 0. */
  233. if (ret < 0)
  234. domid = DOMID_SELF;
  235. memset(&map_irq, 0, sizeof(map_irq));
  236. map_irq.domid = domid;
  237. map_irq.type = MAP_PIRQ_TYPE_MSI_SEG;
  238. map_irq.index = -1;
  239. map_irq.pirq = -1;
  240. map_irq.bus = dev->bus->number |
  241. (pci_domain_nr(dev->bus) << 16);
  242. map_irq.devfn = dev->devfn;
  243. if (type == PCI_CAP_ID_MSI && nvec > 1) {
  244. map_irq.type = MAP_PIRQ_TYPE_MULTI_MSI;
  245. map_irq.entry_nr = nvec;
  246. } else if (type == PCI_CAP_ID_MSIX) {
  247. int pos;
  248. unsigned long flags;
  249. u32 table_offset, bir;
  250. pos = dev->msix_cap;
  251. pci_read_config_dword(dev, pos + PCI_MSIX_TABLE,
  252. &table_offset);
  253. bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR);
  254. flags = pci_resource_flags(dev, bir);
  255. if (!flags || (flags & IORESOURCE_UNSET))
  256. return -EINVAL;
  257. map_irq.table_base = pci_resource_start(dev, bir);
  258. map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
  259. }
  260. ret = -EINVAL;
  261. if (pci_seg_supported)
  262. ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
  263. &map_irq);
  264. if (type == PCI_CAP_ID_MSI && nvec > 1 && ret) {
  265. /*
  266. * If MAP_PIRQ_TYPE_MULTI_MSI is not available
  267. * there's nothing else we can do in this case.
  268. * Just set ret > 0 so driver can retry with
  269. * single MSI.
  270. */
  271. ret = 1;
  272. goto out;
  273. }
  274. if (ret == -EINVAL && !pci_domain_nr(dev->bus)) {
  275. map_irq.type = MAP_PIRQ_TYPE_MSI;
  276. map_irq.index = -1;
  277. map_irq.pirq = -1;
  278. map_irq.bus = dev->bus->number;
  279. ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
  280. &map_irq);
  281. if (ret != -EINVAL)
  282. pci_seg_supported = false;
  283. }
  284. if (ret) {
  285. dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n",
  286. ret, domid);
  287. goto out;
  288. }
  289. ret = xen_bind_pirq_msi_to_irq(dev, msidesc, map_irq.pirq,
  290. (type == PCI_CAP_ID_MSI) ? nvec : 1,
  291. (type == PCI_CAP_ID_MSIX) ? "msi-x" : "msi",
  292. domid);
  293. if (ret < 0)
  294. goto out;
  295. }
  296. ret = 0;
  297. out:
  298. return ret;
  299. }
  300. static void xen_initdom_restore_msi_irqs(struct pci_dev *dev)
  301. {
  302. int ret = 0;
  303. if (pci_seg_supported) {
  304. struct physdev_pci_device restore_ext;
  305. restore_ext.seg = pci_domain_nr(dev->bus);
  306. restore_ext.bus = dev->bus->number;
  307. restore_ext.devfn = dev->devfn;
  308. ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi_ext,
  309. &restore_ext);
  310. if (ret == -ENOSYS)
  311. pci_seg_supported = false;
  312. WARN(ret && ret != -ENOSYS, "restore_msi_ext -> %d\n", ret);
  313. }
  314. if (!pci_seg_supported) {
  315. struct physdev_restore_msi restore;
  316. restore.bus = dev->bus->number;
  317. restore.devfn = dev->devfn;
  318. ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi, &restore);
  319. WARN(ret && ret != -ENOSYS, "restore_msi -> %d\n", ret);
  320. }
  321. }
  322. #endif
  323. static void xen_teardown_msi_irqs(struct pci_dev *dev)
  324. {
  325. struct msi_desc *msidesc;
  326. msidesc = first_pci_msi_entry(dev);
  327. if (msidesc->msi_attrib.is_msix)
  328. xen_pci_frontend_disable_msix(dev);
  329. else
  330. xen_pci_frontend_disable_msi(dev);
  331. /* Free the IRQ's and the msidesc using the generic code. */
  332. default_teardown_msi_irqs(dev);
  333. }
  334. static void xen_teardown_msi_irq(unsigned int irq)
  335. {
  336. xen_destroy_irq(irq);
  337. }
  338. #endif
  339. int __init pci_xen_init(void)
  340. {
  341. if (!xen_pv_domain() || xen_initial_domain())
  342. return -ENODEV;
  343. printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n");
  344. pcibios_set_cache_line_size();
  345. pcibios_enable_irq = xen_pcifront_enable_irq;
  346. pcibios_disable_irq = NULL;
  347. #ifdef CONFIG_ACPI
  348. /* Keep ACPI out of the picture */
  349. acpi_noirq = 1;
  350. #endif
  351. #ifdef CONFIG_PCI_MSI
  352. x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
  353. x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
  354. x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
  355. pci_msi_ignore_mask = 1;
  356. #endif
  357. return 0;
  358. }
  359. #ifdef CONFIG_PCI_MSI
  360. void __init xen_msi_init(void)
  361. {
  362. if (!disable_apic) {
  363. /*
  364. * If hardware supports (x2)APIC virtualization (as indicated
  365. * by hypervisor's leaf 4) then we don't need to use pirqs/
  366. * event channels for MSI handling and instead use regular
  367. * APIC processing
  368. */
  369. uint32_t eax = cpuid_eax(xen_cpuid_base() + 4);
  370. if (((eax & XEN_HVM_CPUID_X2APIC_VIRT) && x2apic_mode) ||
  371. ((eax & XEN_HVM_CPUID_APIC_ACCESS_VIRT) && boot_cpu_has(X86_FEATURE_APIC)))
  372. return;
  373. }
  374. x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs;
  375. x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
  376. }
  377. #endif
  378. int __init pci_xen_hvm_init(void)
  379. {
  380. if (!xen_have_vector_callback || !xen_feature(XENFEAT_hvm_pirqs))
  381. return 0;
  382. #ifdef CONFIG_ACPI
  383. /*
  384. * We don't want to change the actual ACPI delivery model,
  385. * just how GSIs get registered.
  386. */
  387. __acpi_register_gsi = acpi_register_gsi_xen_hvm;
  388. __acpi_unregister_gsi = NULL;
  389. #endif
  390. #ifdef CONFIG_PCI_MSI
  391. /*
  392. * We need to wait until after x2apic is initialized
  393. * before we can set MSI IRQ ops.
  394. */
  395. x86_platform.apic_post_init = xen_msi_init;
  396. #endif
  397. return 0;
  398. }
  399. #ifdef CONFIG_XEN_DOM0
  400. int __init pci_xen_initial_domain(void)
  401. {
  402. int irq;
  403. #ifdef CONFIG_PCI_MSI
  404. x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
  405. x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
  406. x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs;
  407. pci_msi_ignore_mask = 1;
  408. #endif
  409. __acpi_register_gsi = acpi_register_gsi_xen;
  410. __acpi_unregister_gsi = NULL;
  411. /*
  412. * Pre-allocate the legacy IRQs. Use NR_LEGACY_IRQS here
  413. * because we don't have a PIC and thus nr_legacy_irqs() is zero.
  414. */
  415. for (irq = 0; irq < NR_IRQS_LEGACY; irq++) {
  416. int trigger, polarity;
  417. if (acpi_get_override_irq(irq, &trigger, &polarity) == -1)
  418. continue;
  419. xen_register_pirq(irq, -1 /* no GSI override */,
  420. trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE,
  421. true /* Map GSI to PIRQ */);
  422. }
  423. if (0 == nr_ioapics) {
  424. for (irq = 0; irq < nr_legacy_irqs(); irq++)
  425. xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic");
  426. }
  427. return 0;
  428. }
  429. struct xen_device_domain_owner {
  430. domid_t domain;
  431. struct pci_dev *dev;
  432. struct list_head list;
  433. };
  434. static DEFINE_SPINLOCK(dev_domain_list_spinlock);
  435. static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list);
  436. static struct xen_device_domain_owner *find_device(struct pci_dev *dev)
  437. {
  438. struct xen_device_domain_owner *owner;
  439. list_for_each_entry(owner, &dev_domain_list, list) {
  440. if (owner->dev == dev)
  441. return owner;
  442. }
  443. return NULL;
  444. }
  445. int xen_find_device_domain_owner(struct pci_dev *dev)
  446. {
  447. struct xen_device_domain_owner *owner;
  448. int domain = -ENODEV;
  449. spin_lock(&dev_domain_list_spinlock);
  450. owner = find_device(dev);
  451. if (owner)
  452. domain = owner->domain;
  453. spin_unlock(&dev_domain_list_spinlock);
  454. return domain;
  455. }
  456. EXPORT_SYMBOL_GPL(xen_find_device_domain_owner);
  457. int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain)
  458. {
  459. struct xen_device_domain_owner *owner;
  460. owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL);
  461. if (!owner)
  462. return -ENODEV;
  463. spin_lock(&dev_domain_list_spinlock);
  464. if (find_device(dev)) {
  465. spin_unlock(&dev_domain_list_spinlock);
  466. kfree(owner);
  467. return -EEXIST;
  468. }
  469. owner->domain = domain;
  470. owner->dev = dev;
  471. list_add_tail(&owner->list, &dev_domain_list);
  472. spin_unlock(&dev_domain_list_spinlock);
  473. return 0;
  474. }
  475. EXPORT_SYMBOL_GPL(xen_register_device_domain_owner);
  476. int xen_unregister_device_domain_owner(struct pci_dev *dev)
  477. {
  478. struct xen_device_domain_owner *owner;
  479. spin_lock(&dev_domain_list_spinlock);
  480. owner = find_device(dev);
  481. if (!owner) {
  482. spin_unlock(&dev_domain_list_spinlock);
  483. return -ENODEV;
  484. }
  485. list_del(&owner->list);
  486. spin_unlock(&dev_domain_list_spinlock);
  487. kfree(owner);
  488. return 0;
  489. }
  490. EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner);
  491. #endif