itlb_miss.S 854 B

12345678910111213141516171819202122232425262728293031323334353637383940
  1. /* ITLB ** ICACHE line 1: Context 0 check and TSB load */
  2. ldxa [%g0] ASI_IMMU_TSB_8KB_PTR, %g1 ! Get TSB 8K pointer
  3. ldxa [%g0] ASI_IMMU, %g6 ! Get TAG TARGET
  4. srlx %g6, 48, %g5 ! Get context
  5. sllx %g6, 22, %g6 ! Zero out context
  6. brz,pn %g5, kvmap_itlb ! Context 0 processing
  7. srlx %g6, 22, %g6 ! Delay slot
  8. TSB_LOAD_QUAD(%g1, %g4) ! Load TSB entry
  9. cmp %g4, %g6 ! Compare TAG
  10. /* ITLB ** ICACHE line 2: TSB compare and TLB load */
  11. bne,pn %xcc, tsb_miss_itlb ! Miss
  12. mov FAULT_CODE_ITLB, %g3
  13. sethi %hi(_PAGE_EXEC_4U), %g4
  14. andcc %g5, %g4, %g0 ! Executable?
  15. be,pn %xcc, tsb_do_fault
  16. nop ! Delay slot, fill me
  17. stxa %g5, [%g0] ASI_ITLB_DATA_IN ! Load TLB
  18. retry ! Trap done
  19. /* ITLB ** ICACHE line 3: */
  20. nop
  21. nop
  22. nop
  23. nop
  24. nop
  25. nop
  26. nop
  27. nop
  28. /* ITLB ** ICACHE line 4: */
  29. nop
  30. nop
  31. nop
  32. nop
  33. nop
  34. nop
  35. nop
  36. nop