mmcif-sh7724.c 2.0 KB

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  1. /*
  2. * sh7724 MMCIF loader
  3. *
  4. * Copyright (C) 2010 Magnus Damm
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/mmc/sh_mmcif.h>
  11. #include <linux/mmc/boot.h>
  12. #include <mach/romimage.h>
  13. #define MMCIF_BASE (void __iomem *)0xa4ca0000
  14. #define MSTPCR2 0xa4150038
  15. #define PTWCR 0xa4050146
  16. #define PTXCR 0xa4050148
  17. #define PSELA 0xa405014e
  18. #define PSELE 0xa4050156
  19. #define HIZCRC 0xa405015c
  20. #define DRVCRA 0xa405018a
  21. /* SH7724 specific MMCIF loader
  22. *
  23. * loads the romImage from an MMC card starting from block 512
  24. * use the following line to write the romImage to an MMC card
  25. * # dd if=arch/sh/boot/romImage of=/dev/sdx bs=512 seek=512
  26. */
  27. asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes)
  28. {
  29. mmcif_update_progress(MMC_PROGRESS_ENTER);
  30. /* enable clock to the MMCIF hardware block */
  31. __raw_writel(__raw_readl(MSTPCR2) & ~0x20000000, MSTPCR2);
  32. /* setup pins D7-D0 */
  33. __raw_writew(0x0000, PTWCR);
  34. /* setup pins MMC_CLK, MMC_CMD */
  35. __raw_writew(__raw_readw(PTXCR) & ~0x000f, PTXCR);
  36. /* select D3-D0 pin function */
  37. __raw_writew(__raw_readw(PSELA) & ~0x2000, PSELA);
  38. /* select D7-D4 pin function */
  39. __raw_writew(__raw_readw(PSELE) & ~0x3000, PSELE);
  40. /* disable Hi-Z for the MMC pins */
  41. __raw_writew(__raw_readw(HIZCRC) & ~0x0620, HIZCRC);
  42. /* high drive capability for MMC pins */
  43. __raw_writew(__raw_readw(DRVCRA) | 0x3000, DRVCRA);
  44. mmcif_update_progress(MMC_PROGRESS_INIT);
  45. /* setup MMCIF hardware */
  46. sh_mmcif_boot_init(MMCIF_BASE);
  47. mmcif_update_progress(MMC_PROGRESS_LOAD);
  48. /* load kernel via MMCIF interface */
  49. sh_mmcif_boot_do_read(MMCIF_BASE, 512,
  50. (no_bytes + SH_MMCIF_BBS - 1) / SH_MMCIF_BBS,
  51. buf);
  52. /* disable clock to the MMCIF hardware block */
  53. __raw_writel(__raw_readl(MSTPCR2) | 0x20000000, MSTPCR2);
  54. mmcif_update_progress(MMC_PROGRESS_DONE);
  55. }