mpc7448_hpc2.c 5.0 KB

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  1. /*
  2. * mpc7448_hpc2.c
  3. *
  4. * Board setup routines for the Freescale mpc7448hpc2(taiga) platform
  5. *
  6. * Author: Jacob Pan
  7. * jacob.pan@freescale.com
  8. * Author: Xianghua Xiao
  9. * x.xiao@freescale.com
  10. * Maintainer: Roy Zang <tie-fei.zang@freescale.com>
  11. * Add Flat Device Tree support fot mpc7448hpc2 board
  12. *
  13. * Copyright 2004-2006 Freescale Semiconductor, Inc.
  14. *
  15. * This program is free software; you can redistribute it and/or
  16. * modify it under the terms of the GNU General Public License
  17. * as published by the Free Software Foundation; either version
  18. * 2 of the License, or (at your option) any later version.
  19. */
  20. #include <linux/stddef.h>
  21. #include <linux/kernel.h>
  22. #include <linux/pci.h>
  23. #include <linux/kdev_t.h>
  24. #include <linux/console.h>
  25. #include <linux/extable.h>
  26. #include <linux/delay.h>
  27. #include <linux/irq.h>
  28. #include <linux/seq_file.h>
  29. #include <linux/root_dev.h>
  30. #include <linux/serial.h>
  31. #include <linux/tty.h>
  32. #include <linux/serial_core.h>
  33. #include <asm/time.h>
  34. #include <asm/machdep.h>
  35. #include <asm/prom.h>
  36. #include <asm/udbg.h>
  37. #include <asm/tsi108.h>
  38. #include <asm/pci-bridge.h>
  39. #include <asm/reg.h>
  40. #include <mm/mmu_decl.h>
  41. #include <asm/tsi108_pci.h>
  42. #include <asm/tsi108_irq.h>
  43. #include <asm/mpic.h>
  44. #undef DEBUG
  45. #ifdef DEBUG
  46. #define DBG(fmt...) do { printk(fmt); } while(0)
  47. #else
  48. #define DBG(fmt...) do { } while(0)
  49. #endif
  50. #define MPC7448HPC2_PCI_CFG_PHYS 0xfb000000
  51. int mpc7448_hpc2_exclude_device(struct pci_controller *hose,
  52. u_char bus, u_char devfn)
  53. {
  54. if (bus == 0 && PCI_SLOT(devfn) == 0)
  55. return PCIBIOS_DEVICE_NOT_FOUND;
  56. else
  57. return PCIBIOS_SUCCESSFUL;
  58. }
  59. static void __init mpc7448_hpc2_setup_arch(void)
  60. {
  61. struct device_node *np;
  62. if (ppc_md.progress)
  63. ppc_md.progress("mpc7448_hpc2_setup_arch():set_bridge", 0);
  64. tsi108_csr_vir_base = get_vir_csrbase();
  65. /* setup PCI host bridge */
  66. #ifdef CONFIG_PCI
  67. for_each_compatible_node(np, "pci", "tsi108-pci")
  68. tsi108_setup_pci(np, MPC7448HPC2_PCI_CFG_PHYS, 0);
  69. ppc_md.pci_exclude_device = mpc7448_hpc2_exclude_device;
  70. if (ppc_md.progress)
  71. ppc_md.progress("tsi108: resources set", 0x100);
  72. #endif
  73. printk(KERN_INFO "MPC7448HPC2 (TAIGA) Platform\n");
  74. printk(KERN_INFO
  75. "Jointly ported by Freescale and Tundra Semiconductor\n");
  76. printk(KERN_INFO
  77. "Enabling L2 cache then enabling the HID0 prefetch engine.\n");
  78. }
  79. /*
  80. * Interrupt setup and service. Interrupts on the mpc7448_hpc2 come
  81. * from the four external INT pins, PCI interrupts are routed via
  82. * PCI interrupt control registers, it generates internal IRQ23
  83. *
  84. * Interrupt routing on the Taiga Board:
  85. * TSI108:PB_INT[0] -> CPU0:INT#
  86. * TSI108:PB_INT[1] -> CPU0:MCP#
  87. * TSI108:PB_INT[2] -> N/C
  88. * TSI108:PB_INT[3] -> N/C
  89. */
  90. static void __init mpc7448_hpc2_init_IRQ(void)
  91. {
  92. struct mpic *mpic;
  93. #ifdef CONFIG_PCI
  94. unsigned int cascade_pci_irq;
  95. struct device_node *tsi_pci;
  96. struct device_node *cascade_node = NULL;
  97. #endif
  98. mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
  99. MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
  100. 24, 0,
  101. "Tsi108_PIC");
  102. BUG_ON(mpic == NULL);
  103. mpic_assign_isu(mpic, 0, mpic->paddr + 0x100);
  104. mpic_init(mpic);
  105. #ifdef CONFIG_PCI
  106. tsi_pci = of_find_node_by_type(NULL, "pci");
  107. if (tsi_pci == NULL) {
  108. printk("%s: No tsi108 pci node found !\n", __func__);
  109. return;
  110. }
  111. cascade_node = of_find_node_by_type(NULL, "pic-router");
  112. if (cascade_node == NULL) {
  113. printk("%s: No tsi108 pci cascade node found !\n", __func__);
  114. return;
  115. }
  116. cascade_pci_irq = irq_of_parse_and_map(tsi_pci, 0);
  117. DBG("%s: tsi108 cascade_pci_irq = 0x%x\n", __func__,
  118. (u32) cascade_pci_irq);
  119. tsi108_pci_int_init(cascade_node);
  120. irq_set_handler_data(cascade_pci_irq, mpic);
  121. irq_set_chained_handler(cascade_pci_irq, tsi108_irq_cascade);
  122. #endif
  123. /* Configure MPIC outputs to CPU0 */
  124. tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0);
  125. }
  126. void mpc7448_hpc2_show_cpuinfo(struct seq_file *m)
  127. {
  128. seq_printf(m, "vendor\t\t: Freescale Semiconductor\n");
  129. }
  130. static void __noreturn mpc7448_hpc2_restart(char *cmd)
  131. {
  132. local_irq_disable();
  133. /* Set exception prefix high - to the firmware */
  134. _nmask_and_or_msr(0, MSR_IP);
  135. for (;;) ; /* Spin until reset happens */
  136. }
  137. /*
  138. * Called very early, device-tree isn't unflattened
  139. */
  140. static int __init mpc7448_hpc2_probe(void)
  141. {
  142. if (!of_machine_is_compatible("mpc74xx"))
  143. return 0;
  144. return 1;
  145. }
  146. static int mpc7448_machine_check_exception(struct pt_regs *regs)
  147. {
  148. const struct exception_table_entry *entry;
  149. /* Are we prepared to handle this fault */
  150. if ((entry = search_exception_tables(regs->nip)) != NULL) {
  151. tsi108_clear_pci_cfg_error();
  152. regs->msr |= MSR_RI;
  153. regs->nip = entry->fixup;
  154. return 1;
  155. }
  156. return 0;
  157. }
  158. define_machine(mpc7448_hpc2){
  159. .name = "MPC7448 HPC2",
  160. .probe = mpc7448_hpc2_probe,
  161. .setup_arch = mpc7448_hpc2_setup_arch,
  162. .init_IRQ = mpc7448_hpc2_init_IRQ,
  163. .show_cpuinfo = mpc7448_hpc2_show_cpuinfo,
  164. .get_irq = mpic_get_irq,
  165. .restart = mpc7448_hpc2_restart,
  166. .calibrate_decr = generic_calibrate_decr,
  167. .machine_check_exception= mpc7448_machine_check_exception,
  168. .progress = udbg_progress,
  169. };