pgtable.h 10 KB

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  1. #ifndef _ASM_POWERPC_NOHASH_64_PGTABLE_H
  2. #define _ASM_POWERPC_NOHASH_64_PGTABLE_H
  3. /*
  4. * This file contains the functions and defines necessary to modify and use
  5. * the ppc64 hashed page table.
  6. */
  7. #ifdef CONFIG_PPC_64K_PAGES
  8. #include <asm/nohash/64/pgtable-64k.h>
  9. #else
  10. #include <asm/nohash/64/pgtable-4k.h>
  11. #endif
  12. #include <asm/barrier.h>
  13. #define FIRST_USER_ADDRESS 0UL
  14. /*
  15. * Size of EA range mapped by our pagetables.
  16. */
  17. #define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \
  18. PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT)
  19. #define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE)
  20. #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  21. #define PMD_CACHE_INDEX (PMD_INDEX_SIZE + 1)
  22. #else
  23. #define PMD_CACHE_INDEX PMD_INDEX_SIZE
  24. #endif
  25. /*
  26. * Define the address range of the kernel non-linear virtual area
  27. */
  28. #ifdef CONFIG_PPC_BOOK3E
  29. #define KERN_VIRT_START ASM_CONST(0x8000000000000000)
  30. #else
  31. #define KERN_VIRT_START ASM_CONST(0xD000000000000000)
  32. #endif
  33. #define KERN_VIRT_SIZE ASM_CONST(0x0000100000000000)
  34. /*
  35. * The vmalloc space starts at the beginning of that region, and
  36. * occupies half of it on hash CPUs and a quarter of it on Book3E
  37. * (we keep a quarter for the virtual memmap)
  38. */
  39. #define VMALLOC_START KERN_VIRT_START
  40. #ifdef CONFIG_PPC_BOOK3E
  41. #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 2)
  42. #else
  43. #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1)
  44. #endif
  45. #define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
  46. /*
  47. * The second half of the kernel virtual space is used for IO mappings,
  48. * it's itself carved into the PIO region (ISA and PHB IO space) and
  49. * the ioremap space
  50. *
  51. * ISA_IO_BASE = KERN_IO_START, 64K reserved area
  52. * PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
  53. * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
  54. */
  55. #define KERN_IO_START (KERN_VIRT_START + (KERN_VIRT_SIZE >> 1))
  56. #define FULL_IO_SIZE 0x80000000ul
  57. #define ISA_IO_BASE (KERN_IO_START)
  58. #define ISA_IO_END (KERN_IO_START + 0x10000ul)
  59. #define PHB_IO_BASE (ISA_IO_END)
  60. #define PHB_IO_END (KERN_IO_START + FULL_IO_SIZE)
  61. #define IOREMAP_BASE (PHB_IO_END)
  62. #define IOREMAP_END (KERN_VIRT_START + KERN_VIRT_SIZE)
  63. /*
  64. * Region IDs
  65. */
  66. #define REGION_SHIFT 60UL
  67. #define REGION_MASK (0xfUL << REGION_SHIFT)
  68. #define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT)
  69. #define VMALLOC_REGION_ID (REGION_ID(VMALLOC_START))
  70. #define KERNEL_REGION_ID (REGION_ID(PAGE_OFFSET))
  71. #define VMEMMAP_REGION_ID (0xfUL) /* Server only */
  72. #define USER_REGION_ID (0UL)
  73. /*
  74. * Defines the address of the vmemap area, in its own region on
  75. * hash table CPUs and after the vmalloc space on Book3E
  76. */
  77. #ifdef CONFIG_PPC_BOOK3E
  78. #define VMEMMAP_BASE VMALLOC_END
  79. #define VMEMMAP_END KERN_IO_START
  80. #else
  81. #define VMEMMAP_BASE (VMEMMAP_REGION_ID << REGION_SHIFT)
  82. #endif
  83. #define vmemmap ((struct page *)VMEMMAP_BASE)
  84. /*
  85. * Include the PTE bits definitions
  86. */
  87. #include <asm/nohash/pte-book3e.h>
  88. #include <asm/pte-common.h>
  89. #ifdef CONFIG_PPC_MM_SLICES
  90. #define HAVE_ARCH_UNMAPPED_AREA
  91. #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
  92. #endif /* CONFIG_PPC_MM_SLICES */
  93. #ifndef __ASSEMBLY__
  94. /* pte_clear moved to later in this file */
  95. #define PMD_BAD_BITS (PTE_TABLE_SIZE-1)
  96. #define PUD_BAD_BITS (PMD_TABLE_SIZE-1)
  97. static inline void pmd_set(pmd_t *pmdp, unsigned long val)
  98. {
  99. *pmdp = __pmd(val);
  100. }
  101. static inline void pmd_clear(pmd_t *pmdp)
  102. {
  103. *pmdp = __pmd(0);
  104. }
  105. static inline pte_t pmd_pte(pmd_t pmd)
  106. {
  107. return __pte(pmd_val(pmd));
  108. }
  109. #define pmd_none(pmd) (!pmd_val(pmd))
  110. #define pmd_bad(pmd) (!is_kernel_addr(pmd_val(pmd)) \
  111. || (pmd_val(pmd) & PMD_BAD_BITS))
  112. #define pmd_present(pmd) (!pmd_none(pmd))
  113. #define pmd_page_vaddr(pmd) (pmd_val(pmd) & ~PMD_MASKED_BITS)
  114. extern struct page *pmd_page(pmd_t pmd);
  115. static inline void pud_set(pud_t *pudp, unsigned long val)
  116. {
  117. *pudp = __pud(val);
  118. }
  119. static inline void pud_clear(pud_t *pudp)
  120. {
  121. *pudp = __pud(0);
  122. }
  123. #define pud_none(pud) (!pud_val(pud))
  124. #define pud_bad(pud) (!is_kernel_addr(pud_val(pud)) \
  125. || (pud_val(pud) & PUD_BAD_BITS))
  126. #define pud_present(pud) (pud_val(pud) != 0)
  127. #define pud_page_vaddr(pud) (pud_val(pud) & ~PUD_MASKED_BITS)
  128. extern struct page *pud_page(pud_t pud);
  129. static inline pte_t pud_pte(pud_t pud)
  130. {
  131. return __pte(pud_val(pud));
  132. }
  133. static inline pud_t pte_pud(pte_t pte)
  134. {
  135. return __pud(pte_val(pte));
  136. }
  137. #define pud_write(pud) pte_write(pud_pte(pud))
  138. #define pgd_write(pgd) pte_write(pgd_pte(pgd))
  139. static inline void pgd_set(pgd_t *pgdp, unsigned long val)
  140. {
  141. *pgdp = __pgd(val);
  142. }
  143. /*
  144. * Find an entry in a page-table-directory. We combine the address region
  145. * (the high order N bits) and the pgd portion of the address.
  146. */
  147. #define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & (PTRS_PER_PGD - 1))
  148. #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
  149. #define pmd_offset(pudp,addr) \
  150. (((pmd_t *) pud_page_vaddr(*(pudp))) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
  151. #define pte_offset_kernel(dir,addr) \
  152. (((pte_t *) pmd_page_vaddr(*(dir))) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
  153. #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
  154. #define pte_unmap(pte) do { } while(0)
  155. /* to find an entry in a kernel page-table-directory */
  156. /* This now only contains the vmalloc pages */
  157. #define pgd_offset_k(address) pgd_offset(&init_mm, address)
  158. extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
  159. pte_t *ptep, unsigned long pte, int huge);
  160. /* Atomic PTE updates */
  161. static inline unsigned long pte_update(struct mm_struct *mm,
  162. unsigned long addr,
  163. pte_t *ptep, unsigned long clr,
  164. unsigned long set,
  165. int huge)
  166. {
  167. #ifdef PTE_ATOMIC_UPDATES
  168. unsigned long old, tmp;
  169. __asm__ __volatile__(
  170. "1: ldarx %0,0,%3 # pte_update\n\
  171. andi. %1,%0,%6\n\
  172. bne- 1b \n\
  173. andc %1,%0,%4 \n\
  174. or %1,%1,%7\n\
  175. stdcx. %1,0,%3 \n\
  176. bne- 1b"
  177. : "=&r" (old), "=&r" (tmp), "=m" (*ptep)
  178. : "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY), "r" (set)
  179. : "cc" );
  180. #else
  181. unsigned long old = pte_val(*ptep);
  182. *ptep = __pte((old & ~clr) | set);
  183. #endif
  184. /* huge pages use the old page table lock */
  185. if (!huge)
  186. assert_pte_locked(mm, addr);
  187. #ifdef CONFIG_PPC_STD_MMU_64
  188. if (old & _PAGE_HASHPTE)
  189. hpte_need_flush(mm, addr, ptep, old, huge);
  190. #endif
  191. return old;
  192. }
  193. static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
  194. unsigned long addr, pte_t *ptep)
  195. {
  196. unsigned long old;
  197. if ((pte_val(*ptep) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0)
  198. return 0;
  199. old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0);
  200. return (old & _PAGE_ACCESSED) != 0;
  201. }
  202. #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
  203. #define ptep_test_and_clear_young(__vma, __addr, __ptep) \
  204. ({ \
  205. int __r; \
  206. __r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
  207. __r; \
  208. })
  209. #define __HAVE_ARCH_PTEP_SET_WRPROTECT
  210. static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
  211. pte_t *ptep)
  212. {
  213. if ((pte_val(*ptep) & _PAGE_RW) == 0)
  214. return;
  215. pte_update(mm, addr, ptep, _PAGE_RW, 0, 0);
  216. }
  217. static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
  218. unsigned long addr, pte_t *ptep)
  219. {
  220. if ((pte_val(*ptep) & _PAGE_RW) == 0)
  221. return;
  222. pte_update(mm, addr, ptep, _PAGE_RW, 0, 1);
  223. }
  224. /*
  225. * We currently remove entries from the hashtable regardless of whether
  226. * the entry was young or dirty. The generic routines only flush if the
  227. * entry was young or dirty which is not good enough.
  228. *
  229. * We should be more intelligent about this but for the moment we override
  230. * these functions and force a tlb flush unconditionally
  231. */
  232. #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
  233. #define ptep_clear_flush_young(__vma, __address, __ptep) \
  234. ({ \
  235. int __young = __ptep_test_and_clear_young((__vma)->vm_mm, __address, \
  236. __ptep); \
  237. __young; \
  238. })
  239. #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
  240. static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
  241. unsigned long addr, pte_t *ptep)
  242. {
  243. unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0);
  244. return __pte(old);
  245. }
  246. static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
  247. pte_t * ptep)
  248. {
  249. pte_update(mm, addr, ptep, ~0UL, 0, 0);
  250. }
  251. /* Set the dirty and/or accessed bits atomically in a linux PTE, this
  252. * function doesn't need to flush the hash entry
  253. */
  254. static inline void __ptep_set_access_flags(struct mm_struct *mm,
  255. pte_t *ptep, pte_t entry)
  256. {
  257. unsigned long bits = pte_val(entry) &
  258. (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
  259. #ifdef PTE_ATOMIC_UPDATES
  260. unsigned long old, tmp;
  261. __asm__ __volatile__(
  262. "1: ldarx %0,0,%4\n\
  263. andi. %1,%0,%6\n\
  264. bne- 1b \n\
  265. or %0,%3,%0\n\
  266. stdcx. %0,0,%4\n\
  267. bne- 1b"
  268. :"=&r" (old), "=&r" (tmp), "=m" (*ptep)
  269. :"r" (bits), "r" (ptep), "m" (*ptep), "i" (_PAGE_BUSY)
  270. :"cc");
  271. #else
  272. unsigned long old = pte_val(*ptep);
  273. *ptep = __pte(old | bits);
  274. #endif
  275. }
  276. #define __HAVE_ARCH_PTE_SAME
  277. #define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0)
  278. #define pte_ERROR(e) \
  279. pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
  280. #define pmd_ERROR(e) \
  281. pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
  282. #define pgd_ERROR(e) \
  283. pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
  284. /* Encode and de-code a swap entry */
  285. #define MAX_SWAPFILES_CHECK() do { \
  286. BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS); \
  287. /* \
  288. * Don't have overlapping bits with _PAGE_HPTEFLAGS \
  289. * We filter HPTEFLAGS on set_pte. \
  290. */ \
  291. BUILD_BUG_ON(_PAGE_HPTEFLAGS & (0x1f << _PAGE_BIT_SWAP_TYPE)); \
  292. } while (0)
  293. /*
  294. * on pte we don't need handle RADIX_TREE_EXCEPTIONAL_SHIFT;
  295. */
  296. #define SWP_TYPE_BITS 5
  297. #define __swp_type(x) (((x).val >> _PAGE_BIT_SWAP_TYPE) \
  298. & ((1UL << SWP_TYPE_BITS) - 1))
  299. #define __swp_offset(x) ((x).val >> PTE_RPN_SHIFT)
  300. #define __swp_entry(type, offset) ((swp_entry_t) { \
  301. ((type) << _PAGE_BIT_SWAP_TYPE) \
  302. | ((offset) << PTE_RPN_SHIFT) })
  303. #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) })
  304. #define __swp_entry_to_pte(x) __pte((x).val)
  305. void pgtable_cache_add(unsigned shift, void (*ctor)(void *));
  306. void pgtable_cache_init(void);
  307. extern int map_kernel_page(unsigned long ea, unsigned long pa,
  308. unsigned long flags);
  309. extern int __meminit vmemmap_create_mapping(unsigned long start,
  310. unsigned long page_size,
  311. unsigned long phys);
  312. extern void vmemmap_remove_mapping(unsigned long start,
  313. unsigned long page_size);
  314. #endif /* __ASSEMBLY__ */
  315. #endif /* _ASM_POWERPC_NOHASH_64_PGTABLE_H */