malta.dts 2.2 KB

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  1. /dts-v1/;
  2. #include <dt-bindings/interrupt-controller/irq.h>
  3. #include <dt-bindings/interrupt-controller/mips-gic.h>
  4. /memreserve/ 0x00000000 0x00001000; /* YAMON exception vectors */
  5. /memreserve/ 0x00001000 0x000ef000; /* YAMON */
  6. /memreserve/ 0x000f0000 0x00010000; /* PIIX4 ISA memory */
  7. / {
  8. #address-cells = <1>;
  9. #size-cells = <1>;
  10. compatible = "mti,malta";
  11. cpu_intc: interrupt-controller {
  12. compatible = "mti,cpu-interrupt-controller";
  13. interrupt-controller;
  14. #interrupt-cells = <1>;
  15. };
  16. gic: interrupt-controller@1bdc0000 {
  17. compatible = "mti,gic";
  18. reg = <0x1bdc0000 0x20000>;
  19. interrupt-controller;
  20. #interrupt-cells = <3>;
  21. /*
  22. * Declare the interrupt-parent even though the mti,gic
  23. * binding doesn't require it, such that the kernel can
  24. * figure out that cpu_intc is the root interrupt
  25. * controller & should be probed first.
  26. */
  27. interrupt-parent = <&cpu_intc>;
  28. timer {
  29. compatible = "mti,gic-timer";
  30. interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
  31. };
  32. };
  33. i8259: interrupt-controller@20 {
  34. compatible = "intel,i8259";
  35. interrupt-controller;
  36. #interrupt-cells = <1>;
  37. interrupt-parent = <&gic>;
  38. interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
  39. };
  40. flash@1e000000 {
  41. compatible = "intel,dt28f160", "cfi-flash";
  42. reg = <0x1e000000 0x400000>;
  43. bank-width = <4>;
  44. #address-cells = <1>;
  45. #size-cells = <1>;
  46. partitions {
  47. compatible = "fixed-partitions";
  48. #address-cells = <1>;
  49. #size-cells = <1>;
  50. yamon@0 {
  51. label = "YAMON";
  52. reg = <0x0 0x100000>;
  53. read-only;
  54. };
  55. user-fs@100000 {
  56. label = "User FS";
  57. reg = <0x100000 0x2e0000>;
  58. };
  59. board-config@3e0000 {
  60. label = "Board Config";
  61. reg = <0x3e0000 0x20000>;
  62. read-only;
  63. };
  64. };
  65. };
  66. fpga_regs: system-controller@1f000000 {
  67. compatible = "mti,malta-fpga", "syscon", "simple-mfd";
  68. reg = <0x1f000000 0x1000>;
  69. native-endian;
  70. reboot {
  71. compatible = "syscon-reboot";
  72. regmap = <&fpga_regs>;
  73. offset = <0x500>;
  74. mask = <0x42>;
  75. };
  76. };
  77. isa {
  78. compatible = "isa";
  79. #address-cells = <2>;
  80. #size-cells = <1>;
  81. ranges = <1 0 0 0x1000>;
  82. rtc@70 {
  83. compatible = "motorola,mc146818";
  84. reg = <1 0x70 0x8>;
  85. interrupt-parent = <&i8259>;
  86. interrupts = <8>;
  87. };
  88. };
  89. };