ptrace.c 10 KB

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  1. /*
  2. * Copyright (C) 2000-2007, Axis Communications AB.
  3. */
  4. #include <linux/kernel.h>
  5. #include <linux/sched.h>
  6. #include <linux/mm.h>
  7. #include <linux/smp.h>
  8. #include <linux/errno.h>
  9. #include <linux/ptrace.h>
  10. #include <linux/user.h>
  11. #include <linux/signal.h>
  12. #include <linux/security.h>
  13. #include <asm/uaccess.h>
  14. #include <asm/page.h>
  15. #include <asm/pgtable.h>
  16. #include <asm/processor.h>
  17. #include <arch/hwregs/supp_reg.h>
  18. /*
  19. * Determines which bits in CCS the user has access to.
  20. * 1 = access, 0 = no access.
  21. */
  22. #define CCS_MASK 0x00087c00 /* SXNZVC */
  23. #define SBIT_USER (1 << (S_CCS_BITNR + CCS_SHIFT))
  24. static int put_debugreg(long pid, unsigned int regno, long data);
  25. static long get_debugreg(long pid, unsigned int regno);
  26. static unsigned long get_pseudo_pc(struct task_struct *child);
  27. void deconfigure_bp(long pid);
  28. extern unsigned long cris_signal_return_page;
  29. /*
  30. * Get contents of register REGNO in task TASK.
  31. */
  32. long get_reg(struct task_struct *task, unsigned int regno)
  33. {
  34. /* USP is a special case, it's not in the pt_regs struct but
  35. * in the tasks thread struct
  36. */
  37. unsigned long ret;
  38. if (regno <= PT_EDA)
  39. ret = ((unsigned long *)task_pt_regs(task))[regno];
  40. else if (regno == PT_USP)
  41. ret = task->thread.usp;
  42. else if (regno == PT_PPC)
  43. ret = get_pseudo_pc(task);
  44. else if (regno <= PT_MAX)
  45. ret = get_debugreg(task->pid, regno);
  46. else
  47. ret = 0;
  48. return ret;
  49. }
  50. /*
  51. * Write contents of register REGNO in task TASK.
  52. */
  53. int put_reg(struct task_struct *task, unsigned int regno, unsigned long data)
  54. {
  55. if (regno <= PT_EDA)
  56. ((unsigned long *)task_pt_regs(task))[regno] = data;
  57. else if (regno == PT_USP)
  58. task->thread.usp = data;
  59. else if (regno == PT_PPC) {
  60. /* Write pseudo-PC to ERP only if changed. */
  61. if (data != get_pseudo_pc(task))
  62. task_pt_regs(task)->erp = data;
  63. } else if (regno <= PT_MAX)
  64. return put_debugreg(task->pid, regno, data);
  65. else
  66. return -1;
  67. return 0;
  68. }
  69. void user_enable_single_step(struct task_struct *child)
  70. {
  71. unsigned long tmp;
  72. /*
  73. * Set up SPC if not set already (in which case we have no other
  74. * choice but to trust it).
  75. */
  76. if (!get_reg(child, PT_SPC)) {
  77. /* In case we're stopped in a delay slot. */
  78. tmp = get_reg(child, PT_ERP) & ~1;
  79. put_reg(child, PT_SPC, tmp);
  80. }
  81. tmp = get_reg(child, PT_CCS) | SBIT_USER;
  82. put_reg(child, PT_CCS, tmp);
  83. }
  84. void user_disable_single_step(struct task_struct *child)
  85. {
  86. put_reg(child, PT_SPC, 0);
  87. if (!get_debugreg(child->pid, PT_BP_CTRL)) {
  88. unsigned long tmp;
  89. /* If no h/w bp configured, disable S bit. */
  90. tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
  91. put_reg(child, PT_CCS, tmp);
  92. }
  93. }
  94. /*
  95. * Called by kernel/ptrace.c when detaching.
  96. *
  97. * Make sure the single step bit is not set.
  98. */
  99. void
  100. ptrace_disable(struct task_struct *child)
  101. {
  102. /* Deconfigure SPC and S-bit. */
  103. user_disable_single_step(child);
  104. put_reg(child, PT_SPC, 0);
  105. /* Deconfigure any watchpoints associated with the child. */
  106. deconfigure_bp(child->pid);
  107. }
  108. long arch_ptrace(struct task_struct *child, long request,
  109. unsigned long addr, unsigned long data)
  110. {
  111. int ret;
  112. unsigned int regno = addr >> 2;
  113. unsigned long __user *datap = (unsigned long __user *)data;
  114. switch (request) {
  115. /* Read word at location address. */
  116. case PTRACE_PEEKTEXT:
  117. case PTRACE_PEEKDATA: {
  118. unsigned long tmp;
  119. int copied;
  120. ret = -EIO;
  121. /* The signal trampoline page is outside the normal user-addressable
  122. * space but still accessible. This is hack to make it possible to
  123. * access the signal handler code in GDB.
  124. */
  125. if ((addr & PAGE_MASK) == cris_signal_return_page) {
  126. /* The trampoline page is globally mapped, no page table to traverse.*/
  127. tmp = *(unsigned long*)addr;
  128. } else {
  129. copied = ptrace_access_vm(child, addr, &tmp, sizeof(tmp), FOLL_FORCE);
  130. if (copied != sizeof(tmp))
  131. break;
  132. }
  133. ret = put_user(tmp,datap);
  134. break;
  135. }
  136. /* Read the word at location address in the USER area. */
  137. case PTRACE_PEEKUSR: {
  138. unsigned long tmp;
  139. ret = -EIO;
  140. if ((addr & 3) || regno > PT_MAX)
  141. break;
  142. tmp = get_reg(child, regno);
  143. ret = put_user(tmp, datap);
  144. break;
  145. }
  146. /* Write the word at location address. */
  147. case PTRACE_POKETEXT:
  148. case PTRACE_POKEDATA:
  149. ret = generic_ptrace_pokedata(child, addr, data);
  150. break;
  151. /* Write the word at location address in the USER area. */
  152. case PTRACE_POKEUSR:
  153. ret = -EIO;
  154. if ((addr & 3) || regno > PT_MAX)
  155. break;
  156. if (regno == PT_CCS) {
  157. /* don't allow the tracing process to change stuff like
  158. * interrupt enable, kernel/user bit, dma enables etc.
  159. */
  160. data &= CCS_MASK;
  161. data |= get_reg(child, PT_CCS) & ~CCS_MASK;
  162. }
  163. if (put_reg(child, regno, data))
  164. break;
  165. ret = 0;
  166. break;
  167. /* Get all GP registers from the child. */
  168. case PTRACE_GETREGS: {
  169. int i;
  170. unsigned long tmp;
  171. for (i = 0; i <= PT_MAX; i++) {
  172. tmp = get_reg(child, i);
  173. if (put_user(tmp, datap)) {
  174. ret = -EFAULT;
  175. goto out_tsk;
  176. }
  177. datap++;
  178. }
  179. ret = 0;
  180. break;
  181. }
  182. /* Set all GP registers in the child. */
  183. case PTRACE_SETREGS: {
  184. int i;
  185. unsigned long tmp;
  186. for (i = 0; i <= PT_MAX; i++) {
  187. if (get_user(tmp, datap)) {
  188. ret = -EFAULT;
  189. goto out_tsk;
  190. }
  191. if (i == PT_CCS) {
  192. tmp &= CCS_MASK;
  193. tmp |= get_reg(child, PT_CCS) & ~CCS_MASK;
  194. }
  195. put_reg(child, i, tmp);
  196. datap++;
  197. }
  198. ret = 0;
  199. break;
  200. }
  201. default:
  202. ret = ptrace_request(child, request, addr, data);
  203. break;
  204. }
  205. out_tsk:
  206. return ret;
  207. }
  208. void do_syscall_trace(void)
  209. {
  210. if (!test_thread_flag(TIF_SYSCALL_TRACE))
  211. return;
  212. if (!(current->ptrace & PT_PTRACED))
  213. return;
  214. /* the 0x80 provides a way for the tracing parent to distinguish
  215. between a syscall stop and SIGTRAP delivery */
  216. ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
  217. ? 0x80 : 0));
  218. /*
  219. * This isn't the same as continuing with a signal, but it will do for
  220. * normal use.
  221. */
  222. if (current->exit_code) {
  223. send_sig(current->exit_code, current, 1);
  224. current->exit_code = 0;
  225. }
  226. }
  227. /* Returns the size of an instruction that has a delay slot. */
  228. static int insn_size(struct task_struct *child, unsigned long pc)
  229. {
  230. unsigned long opcode;
  231. int copied;
  232. int opsize = 0;
  233. /* Read the opcode at pc (do what PTRACE_PEEKTEXT would do). */
  234. copied = access_process_vm(child, pc, &opcode, sizeof(opcode), FOLL_FORCE);
  235. if (copied != sizeof(opcode))
  236. return 0;
  237. switch ((opcode & 0x0f00) >> 8) {
  238. case 0x0:
  239. case 0x9:
  240. case 0xb:
  241. opsize = 2;
  242. break;
  243. case 0xe:
  244. case 0xf:
  245. opsize = 6;
  246. break;
  247. case 0xd:
  248. /* Could be 4 or 6; check more bits. */
  249. if ((opcode & 0xff) == 0xff)
  250. opsize = 4;
  251. else
  252. opsize = 6;
  253. break;
  254. default:
  255. panic("ERROR: Couldn't find size of opcode 0x%lx at 0x%lx\n",
  256. opcode, pc);
  257. }
  258. return opsize;
  259. }
  260. static unsigned long get_pseudo_pc(struct task_struct *child)
  261. {
  262. /* Default value for PC is ERP. */
  263. unsigned long pc = get_reg(child, PT_ERP);
  264. if (pc & 0x1) {
  265. unsigned long spc = get_reg(child, PT_SPC);
  266. /* Delay slot bit set. Report as stopped on proper
  267. instruction. */
  268. if (spc) {
  269. /* Rely on SPC if set. FIXME: We might want to check
  270. that EXS indicates we stopped due to a single-step
  271. exception. */
  272. pc = spc;
  273. } else {
  274. /* Calculate the PC from the size of the instruction
  275. that the delay slot we're in belongs to. */
  276. pc += insn_size(child, pc & ~1) - 1;
  277. }
  278. }
  279. return pc;
  280. }
  281. static long bp_owner = 0;
  282. /* Reachable from exit_thread in signal.c, so not static. */
  283. void deconfigure_bp(long pid)
  284. {
  285. int bp;
  286. /* Only deconfigure if the pid is the owner. */
  287. if (bp_owner != pid)
  288. return;
  289. for (bp = 0; bp < 6; bp++) {
  290. unsigned long tmp;
  291. /* Deconfigure start and end address (also gets rid of ownership). */
  292. put_debugreg(pid, PT_BP + 3 + (bp * 2), 0);
  293. put_debugreg(pid, PT_BP + 4 + (bp * 2), 0);
  294. /* Deconfigure relevant bits in control register. */
  295. tmp = get_debugreg(pid, PT_BP_CTRL) & ~(3 << (2 + (bp * 4)));
  296. put_debugreg(pid, PT_BP_CTRL, tmp);
  297. }
  298. /* No owner now. */
  299. bp_owner = 0;
  300. }
  301. static int put_debugreg(long pid, unsigned int regno, long data)
  302. {
  303. int ret = 0;
  304. register int old_srs;
  305. #ifdef CONFIG_ETRAX_KGDB
  306. /* Ignore write, but pretend it was ok if value is 0
  307. (we don't want POKEUSR/SETREGS failing unnessecarily). */
  308. return (data == 0) ? ret : -1;
  309. #endif
  310. /* Simple owner management. */
  311. if (!bp_owner)
  312. bp_owner = pid;
  313. else if (bp_owner != pid) {
  314. /* Ignore write, but pretend it was ok if value is 0
  315. (we don't want POKEUSR/SETREGS failing unnessecarily). */
  316. return (data == 0) ? ret : -1;
  317. }
  318. /* Remember old SRS. */
  319. SPEC_REG_RD(SPEC_REG_SRS, old_srs);
  320. /* Switch to BP bank. */
  321. SUPP_BANK_SEL(BANK_BP);
  322. switch (regno - PT_BP) {
  323. case 0:
  324. SUPP_REG_WR(0, data); break;
  325. case 1:
  326. case 2:
  327. if (data)
  328. ret = -1;
  329. break;
  330. case 3:
  331. SUPP_REG_WR(3, data); break;
  332. case 4:
  333. SUPP_REG_WR(4, data); break;
  334. case 5:
  335. SUPP_REG_WR(5, data); break;
  336. case 6:
  337. SUPP_REG_WR(6, data); break;
  338. case 7:
  339. SUPP_REG_WR(7, data); break;
  340. case 8:
  341. SUPP_REG_WR(8, data); break;
  342. case 9:
  343. SUPP_REG_WR(9, data); break;
  344. case 10:
  345. SUPP_REG_WR(10, data); break;
  346. case 11:
  347. SUPP_REG_WR(11, data); break;
  348. case 12:
  349. SUPP_REG_WR(12, data); break;
  350. case 13:
  351. SUPP_REG_WR(13, data); break;
  352. case 14:
  353. SUPP_REG_WR(14, data); break;
  354. default:
  355. ret = -1;
  356. break;
  357. }
  358. /* Restore SRS. */
  359. SPEC_REG_WR(SPEC_REG_SRS, old_srs);
  360. /* Just for show. */
  361. NOP();
  362. NOP();
  363. NOP();
  364. return ret;
  365. }
  366. static long get_debugreg(long pid, unsigned int regno)
  367. {
  368. register int old_srs;
  369. register long data;
  370. if (pid != bp_owner) {
  371. return 0;
  372. }
  373. /* Remember old SRS. */
  374. SPEC_REG_RD(SPEC_REG_SRS, old_srs);
  375. /* Switch to BP bank. */
  376. SUPP_BANK_SEL(BANK_BP);
  377. switch (regno - PT_BP) {
  378. case 0:
  379. SUPP_REG_RD(0, data); break;
  380. case 1:
  381. case 2:
  382. /* error return value? */
  383. data = 0;
  384. break;
  385. case 3:
  386. SUPP_REG_RD(3, data); break;
  387. case 4:
  388. SUPP_REG_RD(4, data); break;
  389. case 5:
  390. SUPP_REG_RD(5, data); break;
  391. case 6:
  392. SUPP_REG_RD(6, data); break;
  393. case 7:
  394. SUPP_REG_RD(7, data); break;
  395. case 8:
  396. SUPP_REG_RD(8, data); break;
  397. case 9:
  398. SUPP_REG_RD(9, data); break;
  399. case 10:
  400. SUPP_REG_RD(10, data); break;
  401. case 11:
  402. SUPP_REG_RD(11, data); break;
  403. case 12:
  404. SUPP_REG_RD(12, data); break;
  405. case 13:
  406. SUPP_REG_RD(13, data); break;
  407. case 14:
  408. SUPP_REG_RD(14, data); break;
  409. default:
  410. /* error return value? */
  411. data = 0;
  412. }
  413. /* Restore SRS. */
  414. SPEC_REG_WR(SPEC_REG_SRS, old_srs);
  415. /* Just for show. */
  416. NOP();
  417. NOP();
  418. NOP();
  419. return data;
  420. }