mt8173-evb.dts 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481
  1. /*
  2. * Copyright (c) 2014 MediaTek Inc.
  3. * Author: Eddie Huang <eddie.huang@mediatek.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. /dts-v1/;
  15. #include <dt-bindings/gpio/gpio.h>
  16. #include "mt8173.dtsi"
  17. / {
  18. model = "MediaTek MT8173 evaluation board";
  19. compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
  20. aliases {
  21. serial0 = &uart0;
  22. serial1 = &uart1;
  23. serial2 = &uart2;
  24. serial3 = &uart3;
  25. };
  26. memory@40000000 {
  27. device_type = "memory";
  28. reg = <0 0x40000000 0 0x80000000>;
  29. };
  30. chosen { };
  31. usb_p1_vbus: regulator@0 {
  32. compatible = "regulator-fixed";
  33. regulator-name = "usb_vbus";
  34. regulator-min-microvolt = <5000000>;
  35. regulator-max-microvolt = <5000000>;
  36. gpio = <&pio 130 GPIO_ACTIVE_HIGH>;
  37. enable-active-high;
  38. };
  39. connector {
  40. compatible = "hdmi-connector";
  41. label = "hdmi";
  42. type = "d";
  43. port {
  44. hdmi_connector_in: endpoint {
  45. remote-endpoint = <&hdmi0_out>;
  46. };
  47. };
  48. };
  49. };
  50. &cec {
  51. status = "okay";
  52. };
  53. &dpi0 {
  54. status = "okay";
  55. };
  56. &hdmi_phy {
  57. status = "okay";
  58. };
  59. &hdmi0 {
  60. status = "okay";
  61. ports {
  62. port@1 {
  63. reg = <1>;
  64. hdmi0_out: endpoint {
  65. remote-endpoint = <&hdmi_connector_in>;
  66. };
  67. };
  68. };
  69. };
  70. &i2c1 {
  71. status = "okay";
  72. buck: da9211@68 {
  73. compatible = "dlg,da9211";
  74. reg = <0x68>;
  75. regulators {
  76. da9211_vcpu_reg: BUCKA {
  77. regulator-name = "VBUCKA";
  78. regulator-min-microvolt = < 700000>;
  79. regulator-max-microvolt = <1310000>;
  80. regulator-min-microamp = <2000000>;
  81. regulator-max-microamp = <4400000>;
  82. regulator-ramp-delay = <10000>;
  83. regulator-always-on;
  84. };
  85. da9211_vgpu_reg: BUCKB {
  86. regulator-name = "VBUCKB";
  87. regulator-min-microvolt = < 700000>;
  88. regulator-max-microvolt = <1310000>;
  89. regulator-min-microamp = <2000000>;
  90. regulator-max-microamp = <3000000>;
  91. regulator-ramp-delay = <10000>;
  92. };
  93. };
  94. };
  95. };
  96. &mmc0 {
  97. status = "okay";
  98. pinctrl-names = "default", "state_uhs";
  99. pinctrl-0 = <&mmc0_pins_default>;
  100. pinctrl-1 = <&mmc0_pins_uhs>;
  101. bus-width = <8>;
  102. max-frequency = <50000000>;
  103. cap-mmc-highspeed;
  104. vmmc-supply = <&mt6397_vemc_3v3_reg>;
  105. vqmmc-supply = <&mt6397_vio18_reg>;
  106. non-removable;
  107. };
  108. &mmc1 {
  109. status = "okay";
  110. pinctrl-names = "default", "state_uhs";
  111. pinctrl-0 = <&mmc1_pins_default>;
  112. pinctrl-1 = <&mmc1_pins_uhs>;
  113. bus-width = <4>;
  114. max-frequency = <50000000>;
  115. cap-sd-highspeed;
  116. sd-uhs-sdr25;
  117. cd-gpios = <&pio 132 0>;
  118. vmmc-supply = <&mt6397_vmch_reg>;
  119. vqmmc-supply = <&mt6397_vmc_reg>;
  120. };
  121. &pio {
  122. disp_pwm0_pins: disp_pwm0_pins {
  123. pins1 {
  124. pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
  125. output-low;
  126. };
  127. };
  128. mmc0_pins_default: mmc0default {
  129. pins_cmd_dat {
  130. pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
  131. <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
  132. <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
  133. <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
  134. <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
  135. <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
  136. <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
  137. <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
  138. <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
  139. input-enable;
  140. bias-pull-up;
  141. };
  142. pins_clk {
  143. pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
  144. bias-pull-down;
  145. };
  146. pins_rst {
  147. pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
  148. bias-pull-up;
  149. };
  150. };
  151. mmc1_pins_default: mmc1default {
  152. pins_cmd_dat {
  153. pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
  154. <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
  155. <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
  156. <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
  157. <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
  158. input-enable;
  159. drive-strength = <MTK_DRIVE_4mA>;
  160. bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
  161. };
  162. pins_clk {
  163. pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
  164. bias-pull-down;
  165. drive-strength = <MTK_DRIVE_4mA>;
  166. };
  167. pins_insert {
  168. pinmux = <MT8173_PIN_132_I2S0_DATA1__FUNC_GPIO132>;
  169. bias-pull-up;
  170. };
  171. };
  172. mmc0_pins_uhs: mmc0 {
  173. pins_cmd_dat {
  174. pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
  175. <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
  176. <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
  177. <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
  178. <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
  179. <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
  180. <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
  181. <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
  182. <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
  183. input-enable;
  184. drive-strength = <MTK_DRIVE_2mA>;
  185. bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
  186. };
  187. pins_clk {
  188. pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
  189. drive-strength = <MTK_DRIVE_2mA>;
  190. bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
  191. };
  192. pins_rst {
  193. pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
  194. bias-pull-up;
  195. };
  196. };
  197. mmc1_pins_uhs: mmc1 {
  198. pins_cmd_dat {
  199. pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
  200. <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
  201. <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
  202. <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
  203. <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
  204. input-enable;
  205. drive-strength = <MTK_DRIVE_4mA>;
  206. bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
  207. };
  208. pins_clk {
  209. pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
  210. drive-strength = <MTK_DRIVE_4mA>;
  211. bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
  212. };
  213. };
  214. };
  215. &pwm0 {
  216. pinctrl-names = "default";
  217. pinctrl-0 = <&disp_pwm0_pins>;
  218. status = "okay";
  219. };
  220. &pwrap {
  221. /* Only MT8173 E1 needs USB power domain */
  222. power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
  223. pmic: mt6397 {
  224. compatible = "mediatek,mt6397";
  225. interrupt-parent = <&pio>;
  226. interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
  227. interrupt-controller;
  228. #interrupt-cells = <2>;
  229. mt6397regulator: mt6397regulator {
  230. compatible = "mediatek,mt6397-regulator";
  231. mt6397_vpca15_reg: buck_vpca15 {
  232. regulator-compatible = "buck_vpca15";
  233. regulator-name = "vpca15";
  234. regulator-min-microvolt = < 700000>;
  235. regulator-max-microvolt = <1350000>;
  236. regulator-ramp-delay = <12500>;
  237. regulator-always-on;
  238. };
  239. mt6397_vpca7_reg: buck_vpca7 {
  240. regulator-compatible = "buck_vpca7";
  241. regulator-name = "vpca7";
  242. regulator-min-microvolt = < 700000>;
  243. regulator-max-microvolt = <1350000>;
  244. regulator-ramp-delay = <12500>;
  245. regulator-enable-ramp-delay = <115>;
  246. };
  247. mt6397_vsramca15_reg: buck_vsramca15 {
  248. regulator-compatible = "buck_vsramca15";
  249. regulator-name = "vsramca15";
  250. regulator-min-microvolt = < 700000>;
  251. regulator-max-microvolt = <1350000>;
  252. regulator-ramp-delay = <12500>;
  253. regulator-always-on;
  254. };
  255. mt6397_vsramca7_reg: buck_vsramca7 {
  256. regulator-compatible = "buck_vsramca7";
  257. regulator-name = "vsramca7";
  258. regulator-min-microvolt = < 700000>;
  259. regulator-max-microvolt = <1350000>;
  260. regulator-ramp-delay = <12500>;
  261. regulator-always-on;
  262. };
  263. mt6397_vcore_reg: buck_vcore {
  264. regulator-compatible = "buck_vcore";
  265. regulator-name = "vcore";
  266. regulator-min-microvolt = < 700000>;
  267. regulator-max-microvolt = <1350000>;
  268. regulator-ramp-delay = <12500>;
  269. regulator-always-on;
  270. };
  271. mt6397_vgpu_reg: buck_vgpu {
  272. regulator-compatible = "buck_vgpu";
  273. regulator-name = "vgpu";
  274. regulator-min-microvolt = < 700000>;
  275. regulator-max-microvolt = <1350000>;
  276. regulator-ramp-delay = <12500>;
  277. regulator-enable-ramp-delay = <115>;
  278. };
  279. mt6397_vdrm_reg: buck_vdrm {
  280. regulator-compatible = "buck_vdrm";
  281. regulator-name = "vdrm";
  282. regulator-min-microvolt = <1200000>;
  283. regulator-max-microvolt = <1400000>;
  284. regulator-ramp-delay = <12500>;
  285. regulator-always-on;
  286. };
  287. mt6397_vio18_reg: buck_vio18 {
  288. regulator-compatible = "buck_vio18";
  289. regulator-name = "vio18";
  290. regulator-min-microvolt = <1620000>;
  291. regulator-max-microvolt = <1980000>;
  292. regulator-ramp-delay = <12500>;
  293. regulator-always-on;
  294. };
  295. mt6397_vtcxo_reg: ldo_vtcxo {
  296. regulator-compatible = "ldo_vtcxo";
  297. regulator-name = "vtcxo";
  298. regulator-always-on;
  299. };
  300. mt6397_va28_reg: ldo_va28 {
  301. regulator-compatible = "ldo_va28";
  302. regulator-name = "va28";
  303. regulator-always-on;
  304. };
  305. mt6397_vcama_reg: ldo_vcama {
  306. regulator-compatible = "ldo_vcama";
  307. regulator-name = "vcama";
  308. regulator-min-microvolt = <1500000>;
  309. regulator-max-microvolt = <2800000>;
  310. regulator-enable-ramp-delay = <218>;
  311. };
  312. mt6397_vio28_reg: ldo_vio28 {
  313. regulator-compatible = "ldo_vio28";
  314. regulator-name = "vio28";
  315. regulator-always-on;
  316. };
  317. mt6397_vusb_reg: ldo_vusb {
  318. regulator-compatible = "ldo_vusb";
  319. regulator-name = "vusb";
  320. };
  321. mt6397_vmc_reg: ldo_vmc {
  322. regulator-compatible = "ldo_vmc";
  323. regulator-name = "vmc";
  324. regulator-min-microvolt = <1800000>;
  325. regulator-max-microvolt = <3300000>;
  326. regulator-enable-ramp-delay = <218>;
  327. };
  328. mt6397_vmch_reg: ldo_vmch {
  329. regulator-compatible = "ldo_vmch";
  330. regulator-name = "vmch";
  331. regulator-min-microvolt = <3000000>;
  332. regulator-max-microvolt = <3300000>;
  333. regulator-enable-ramp-delay = <218>;
  334. };
  335. mt6397_vemc_3v3_reg: ldo_vemc3v3 {
  336. regulator-compatible = "ldo_vemc3v3";
  337. regulator-name = "vemc_3v3";
  338. regulator-min-microvolt = <3000000>;
  339. regulator-max-microvolt = <3300000>;
  340. regulator-enable-ramp-delay = <218>;
  341. };
  342. mt6397_vgp1_reg: ldo_vgp1 {
  343. regulator-compatible = "ldo_vgp1";
  344. regulator-name = "vcamd";
  345. regulator-min-microvolt = <1220000>;
  346. regulator-max-microvolt = <3300000>;
  347. regulator-enable-ramp-delay = <240>;
  348. };
  349. mt6397_vgp2_reg: ldo_vgp2 {
  350. regulator-compatible = "ldo_vgp2";
  351. regulator-name = "vcamio";
  352. regulator-min-microvolt = <1000000>;
  353. regulator-max-microvolt = <3300000>;
  354. regulator-enable-ramp-delay = <218>;
  355. };
  356. mt6397_vgp3_reg: ldo_vgp3 {
  357. regulator-compatible = "ldo_vgp3";
  358. regulator-name = "vcamaf";
  359. regulator-min-microvolt = <1200000>;
  360. regulator-max-microvolt = <3300000>;
  361. regulator-enable-ramp-delay = <218>;
  362. };
  363. mt6397_vgp4_reg: ldo_vgp4 {
  364. regulator-compatible = "ldo_vgp4";
  365. regulator-name = "vgp4";
  366. regulator-min-microvolt = <1200000>;
  367. regulator-max-microvolt = <3300000>;
  368. regulator-enable-ramp-delay = <218>;
  369. };
  370. mt6397_vgp5_reg: ldo_vgp5 {
  371. regulator-compatible = "ldo_vgp5";
  372. regulator-name = "vgp5";
  373. regulator-min-microvolt = <1200000>;
  374. regulator-max-microvolt = <3000000>;
  375. regulator-enable-ramp-delay = <218>;
  376. };
  377. mt6397_vgp6_reg: ldo_vgp6 {
  378. regulator-compatible = "ldo_vgp6";
  379. regulator-name = "vgp6";
  380. regulator-min-microvolt = <1200000>;
  381. regulator-max-microvolt = <3300000>;
  382. regulator-enable-ramp-delay = <218>;
  383. };
  384. mt6397_vibr_reg: ldo_vibr {
  385. regulator-compatible = "ldo_vibr";
  386. regulator-name = "vibr";
  387. regulator-min-microvolt = <1300000>;
  388. regulator-max-microvolt = <3300000>;
  389. regulator-enable-ramp-delay = <218>;
  390. };
  391. };
  392. };
  393. };
  394. &pio {
  395. spi_pins_a: spi0 {
  396. pins_spi {
  397. pinmux = <MT8173_PIN_69_SPI_CK__FUNC_SPI_CK_0_>,
  398. <MT8173_PIN_70_SPI_MI__FUNC_SPI_MI_0_>,
  399. <MT8173_PIN_71_SPI_MO__FUNC_SPI_MO_0_>,
  400. <MT8173_PIN_72_SPI_CS__FUNC_SPI_CS_0_>;
  401. };
  402. };
  403. };
  404. &spi {
  405. pinctrl-names = "default";
  406. pinctrl-0 = <&spi_pins_a>;
  407. mediatek,pad-select = <0>;
  408. status = "okay";
  409. };
  410. &uart0 {
  411. status = "okay";
  412. };
  413. &usb30 {
  414. vusb33-supply = <&mt6397_vusb_reg>;
  415. vbus-supply = <&usb_p1_vbus>;
  416. mediatek,wakeup-src = <1>;
  417. };