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linux-libre
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arch
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arm
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mach-s3c24xx
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sleep.S

sleep.S 2.2 KB
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  1. /* linux/arch/arm/plat-s3c24xx/sleep.S
    2. 

  2.  *
    3. 

  3.  * Copyright (c) 2004 Simtec Electronics
    4. 

  4.  *	Ben Dooks <ben@simtec.co.uk>
    5. 

  5.  *
    6. 

  6.  * S3C2410 Power Manager (Suspend-To-RAM) support
    7. 

  7.  *
    8. 

  8.  * Based on PXA/SA1100 sleep code by:
    9. 

  9.  *	Nicolas Pitre, (c) 2002 Monta Vista Software Inc
    10. 

  10.  *	Cliff Brake, (c) 2001
    11. 

  11.  *
    12. 

  12.  * This program is free software; you can redistribute it and/or modify
    13. 

  13.  * it under the terms of the GNU General Public License as published by
    14. 

  14.  * the Free Software Foundation; either version 2 of the License, or
    15. 

  15.  * (at your option) any later version.
    16. 

  16.  *
    17. 

  17.  * This program is distributed in the hope that it will be useful,
    18. 

  18.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    19. 

  19.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    20. 

  20.  * GNU General Public License for more details.
    21. 

  21.  *
    22. 

  22.  * You should have received a copy of the GNU General Public License
    23. 

  23.  * along with this program; if not, write to the Free Software
    24. 

  24.  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
    25. 

  25. */
    26. 

  26. 

  27. #include <linux/linkage.h>
    28. 

  28. #include <linux/serial_s3c.h>
    29. 

  29. #include <asm/assembler.h>
    30. 

  30. #include <mach/hardware.h>
    31. 

  31. #include <mach/map.h>
    32. 

  32. 

  33. #include <mach/regs-gpio.h>
    34. 

  34. #include <mach/regs-clock.h>
    35. 

  35. 

  36. /* CONFIG_DEBUG_RESUME is dangerous if your bootloader does not
    37. 

  37.  * reset the UART configuration, only enable if you really need this!
    38. 

  38. */
    39. 

  39. //#define CONFIG_DEBUG_RESUME
    40. 

  40. 

  41. 	.text
    42. 

  42. 

  43. 	/* sleep magic, to allow the bootloader to check for an valid
    44. 

  44. 	 * image to resume to. Must be the first word before the
    45. 

  45. 	 * s3c_cpu_resume entry.
    46. 

  46. 	*/
    47. 

  47. 

  48. 	.word	0x2bedf00d
    49. 

  49. 

  50. 	/* s3c_cpu_resume
    51. 

  51. 	 *
    52. 

  52. 	 * resume code entry for bootloader to call
    53. 

  53. 	*/
    54. 

  54. 

  55. ENTRY(s3c_cpu_resume)
    56. 

  56. 	mov	r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
    57. 

  57. 	msr	cpsr_c, r0
    58. 

  58. 

  59. 	@@ load UART to allow us to print the two characters for
    60. 

  60. 	@@ resume debug
    61. 

  61. 

  62. 	mov	r2, #S3C24XX_PA_UART & 0xff000000
    63. 

  63. 	orr	r2, r2, #S3C24XX_PA_UART & 0xff000
    64. 

  64. 

  65. #if 0
    66. 

  66. 	/* SMDK2440 LED set */
    67. 

  67. 	mov	r14, #S3C24XX_PA_GPIO
    68. 

  68. 	ldr	r12, [ r14, #0x54 ]
    69. 

  69. 	bic	r12, r12, #3<<4
    70. 

  70. 	orr	r12, r12, #1<<7
    71. 

  71. 	str	r12, [ r14, #0x54 ]
    72. 

  72. #endif
    73. 

  73. 

  74. #ifdef CONFIG_DEBUG_RESUME
    75. 

  75. 	mov	r3, #'L'
    76. 

  76. 	strb	r3, [ r2, #S3C2410_UTXH ]
    77. 

  77. 1001:
    78. 

  78. 	ldrb	r14, [ r3, #S3C2410_UTRSTAT ]
    79. 

  79. 	tst	r14, #S3C2410_UTRSTAT_TXE
    80. 

  80. 	beq	1001b
    81. 

  81. #endif /* CONFIG_DEBUG_RESUME */
    82. 

  82. 

  83. 	b	cpu_resume
    84. 

  84.