sram.h 2.0 KB

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  1. /*
  2. * Interface for functions that need to be run in internal SRAM
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #ifndef __ASSEMBLY__
  9. #include <plat/sram.h>
  10. extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
  11. u32 base_cs, u32 force_unlock);
  12. extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
  13. u32 mem_type);
  14. extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
  15. extern void omap3_sram_restore_context(void);
  16. /* Do not use these */
  17. extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
  18. extern unsigned long omap24xx_sram_reprogram_clock_sz;
  19. extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
  20. u32 base_cs, u32 force_unlock);
  21. extern unsigned long omap242x_sram_ddr_init_sz;
  22. extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
  23. int bypass);
  24. extern unsigned long omap242x_sram_set_prcm_sz;
  25. extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
  26. u32 mem_type);
  27. extern unsigned long omap242x_sram_reprogram_sdrc_sz;
  28. extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
  29. u32 base_cs, u32 force_unlock);
  30. extern unsigned long omap243x_sram_ddr_init_sz;
  31. extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
  32. int bypass);
  33. extern unsigned long omap243x_sram_set_prcm_sz;
  34. extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
  35. u32 mem_type);
  36. extern unsigned long omap243x_sram_reprogram_sdrc_sz;
  37. #ifdef CONFIG_PM
  38. extern void omap_push_sram_idle(void);
  39. #else
  40. static inline void omap_push_sram_idle(void) {}
  41. #endif /* CONFIG_PM */
  42. #endif /* __ASSEMBLY__ */
  43. /*
  44. * OMAP2+: define the SRAM PA addresses.
  45. * Used by the SRAM management code and the idle sleep code.
  46. */
  47. #define OMAP2_SRAM_PA 0x40200000
  48. #define OMAP3_SRAM_PA 0x40200000