Ana Sayfa Keşfet Yardım
Giriş Yap
phreedom2600net
/
linux-libre
İzle 2
Yıldızla 0
Çatalla 0
Dosyalar Sorunlar 0 Değişiklik İstekleri 0 Wiki
Ağaç: 0d5005ec5c
Dallar Biçim İmleri
linux-libre
/
arch
/
arm
/
mach-mmp
/
clock-pxa910.c

clock-pxa910.c 2.1 KB
Geçmiş Ham

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970 
  1. #include <linux/module.h>
    2. 

  2. #include <linux/kernel.h>
    3. 

  3. #include <linux/init.h>
    4. 

  4. #include <linux/list.h>
    5. 

  5. #include <linux/io.h>
    6. 

  6. #include <linux/clk.h>
    7. 

  7. #include <linux/clk/mmp.h>
    8. 

  8. 

  9. #include "addr-map.h"
    10. 

  10. 

  11. #include "common.h"
    12. 

  12. #include "clock.h"
    13. 

  13. 

  14. /*
    15. 

  15.  * APB Clock register offsets for PXA910
    16. 

  16.  */
    17. 

  17. #define APBC_UART0	APBC_REG(0x000)
    18. 

  18. #define APBC_UART1	APBC_REG(0x004)
    19. 

  19. #define APBC_GPIO	APBC_REG(0x008)
    20. 

  20. #define APBC_PWM1	APBC_REG(0x00c)
    21. 

  21. #define APBC_PWM2	APBC_REG(0x010)
    22. 

  22. #define APBC_PWM3	APBC_REG(0x014)
    23. 

  23. #define APBC_PWM4	APBC_REG(0x018)
    24. 

  24. #define APBC_SSP1	APBC_REG(0x01c)
    25. 

  25. #define APBC_SSP2	APBC_REG(0x020)
    26. 

  26. #define APBC_RTC	APBC_REG(0x028)
    27. 

  27. #define APBC_TWSI0	APBC_REG(0x02c)
    28. 

  28. #define APBC_KPC	APBC_REG(0x030)
    29. 

  29. #define APBC_SSP3	APBC_REG(0x04c)
    30. 

  30. #define APBC_TWSI1	APBC_REG(0x06c)
    31. 

  31. 

  32. #define APMU_NAND	APMU_REG(0x060)
    33. 

  33. #define APMU_USB	APMU_REG(0x05c)
    34. 

  34. 

  35. static APBC_CLK(uart1, UART0, 1, 14745600);
    36. 

  36. static APBC_CLK(uart2, UART1, 1, 14745600);
    37. 

  37. static APBC_CLK(twsi0, TWSI0, 1, 33000000);
    38. 

  38. static APBC_CLK(twsi1, TWSI1, 1, 33000000);
    39. 

  39. static APBC_CLK(pwm1, PWM1, 1, 13000000);
    40. 

  40. static APBC_CLK(pwm2, PWM2, 1, 13000000);
    41. 

  41. static APBC_CLK(pwm3, PWM3, 1, 13000000);
    42. 

  42. static APBC_CLK(pwm4, PWM4, 1, 13000000);
    43. 

  43. static APBC_CLK(gpio, GPIO, 0, 13000000);
    44. 

  44. static APBC_CLK(rtc, RTC, 8, 32768);
    45. 

  45. 

  46. static APMU_CLK(nand, NAND, 0x19b, 156000000);
    47. 

  47. static APMU_CLK(u2o, USB, 0x1b, 480000000);
    48. 

  48. 

  49. /* device and clock bindings */
    50. 

  50. static struct clk_lookup pxa910_clkregs[] = {
    51. 

  51. 	INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
    52. 

  52. 	INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
    53. 

  53. 	INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL),
    54. 

  54. 	INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL),
    55. 

  55. 	INIT_CLKREG(&clk_pwm1, "pxa910-pwm.0", NULL),
    56. 

  56. 	INIT_CLKREG(&clk_pwm2, "pxa910-pwm.1", NULL),
    57. 

  57. 	INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL),
    58. 

  58. 	INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
    59. 

  59. 	INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
    60. 

  60. 	INIT_CLKREG(&clk_gpio, "mmp-gpio", NULL),
    61. 

  61. 	INIT_CLKREG(&clk_u2o, NULL, "U2OCLK"),
    62. 

  62. 	INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
    63. 

  63. };
    64. 

  64. 

  65. void __init pxa910_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
    66. 

  66. 			    phys_addr_t apbc_phys, phys_addr_t apbcp_phys)
    67. 

  67. {
    68. 

  68. 	clkdev_add_table(ARRAY_AND_SIZE(pxa910_clkregs));
    69. 

  69. }
    70. 

  70.