mach-mx31lite.c 8.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327
  1. /*
  2. * Copyright (C) 2000 Deep Blue Solutions Ltd
  3. * Copyright (C) 2002 Shane Nay (shane@minirl.com)
  4. * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
  5. * Copyright (C) 2009 Daniel Mack <daniel@caiaq.de>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #include <linux/types.h>
  18. #include <linux/init.h>
  19. #include <linux/kernel.h>
  20. #include <linux/memory.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/gpio.h>
  23. #include <linux/moduleparam.h>
  24. #include <linux/smsc911x.h>
  25. #include <linux/mfd/mc13783.h>
  26. #include <linux/spi/spi.h>
  27. #include <linux/usb/otg.h>
  28. #include <linux/usb/ulpi.h>
  29. #include <linux/mtd/physmap.h>
  30. #include <linux/delay.h>
  31. #include <linux/regulator/machine.h>
  32. #include <linux/regulator/fixed.h>
  33. #include <asm/mach-types.h>
  34. #include <asm/mach/arch.h>
  35. #include <asm/mach/time.h>
  36. #include <asm/mach/map.h>
  37. #include <asm/page.h>
  38. #include <asm/setup.h>
  39. #include "board-mx31lite.h"
  40. #include "common.h"
  41. #include "devices-imx31.h"
  42. #include "ehci.h"
  43. #include "hardware.h"
  44. #include "iomux-mx3.h"
  45. #include "ulpi.h"
  46. /*
  47. * This file contains the module-specific initialization routines.
  48. */
  49. static unsigned int mx31lite_pins[] = {
  50. /* UART1 */
  51. MX31_PIN_CTS1__CTS1,
  52. MX31_PIN_RTS1__RTS1,
  53. MX31_PIN_TXD1__TXD1,
  54. MX31_PIN_RXD1__RXD1,
  55. /* SPI 0 */
  56. MX31_PIN_CSPI1_SCLK__SCLK,
  57. MX31_PIN_CSPI1_MOSI__MOSI,
  58. MX31_PIN_CSPI1_MISO__MISO,
  59. MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
  60. MX31_PIN_CSPI1_SS0__SS0,
  61. MX31_PIN_CSPI1_SS1__SS1,
  62. MX31_PIN_CSPI1_SS2__SS2,
  63. /* LAN9117 IRQ pin */
  64. IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO),
  65. /* SPI 1 */
  66. MX31_PIN_CSPI2_SCLK__SCLK,
  67. MX31_PIN_CSPI2_MOSI__MOSI,
  68. MX31_PIN_CSPI2_MISO__MISO,
  69. MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
  70. MX31_PIN_CSPI2_SS0__SS0,
  71. MX31_PIN_CSPI2_SS1__SS1,
  72. MX31_PIN_CSPI2_SS2__SS2,
  73. };
  74. /* UART */
  75. static const struct imxuart_platform_data uart_pdata __initconst = {
  76. .flags = IMXUART_HAVE_RTSCTS,
  77. };
  78. /* SPI */
  79. static int spi0_internal_chipselect[] = {
  80. MXC_SPI_CS(0),
  81. MXC_SPI_CS(1),
  82. MXC_SPI_CS(2),
  83. };
  84. static const struct spi_imx_master spi0_pdata __initconst = {
  85. .chipselect = spi0_internal_chipselect,
  86. .num_chipselect = ARRAY_SIZE(spi0_internal_chipselect),
  87. };
  88. static const struct mxc_nand_platform_data
  89. mx31lite_nand_board_info __initconst = {
  90. .width = 1,
  91. .hw_ecc = 1,
  92. };
  93. static struct smsc911x_platform_config smsc911x_config = {
  94. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  95. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  96. .flags = SMSC911X_USE_16BIT,
  97. };
  98. static struct resource smsc911x_resources[] = {
  99. {
  100. .start = MX31_CS4_BASE_ADDR,
  101. .end = MX31_CS4_BASE_ADDR + 0x100,
  102. .flags = IORESOURCE_MEM,
  103. }, {
  104. /* irq number is run-time assigned */
  105. .flags = IORESOURCE_IRQ,
  106. },
  107. };
  108. static struct platform_device smsc911x_device = {
  109. .name = "smsc911x",
  110. .id = -1,
  111. .num_resources = ARRAY_SIZE(smsc911x_resources),
  112. .resource = smsc911x_resources,
  113. .dev = {
  114. .platform_data = &smsc911x_config,
  115. },
  116. };
  117. /*
  118. * SPI
  119. *
  120. * The MC13783 is the only hard-wired SPI device on the module.
  121. */
  122. static int spi1_internal_chipselect[] = {
  123. MXC_SPI_CS(0),
  124. };
  125. static const struct spi_imx_master spi1_pdata __initconst = {
  126. .chipselect = spi1_internal_chipselect,
  127. .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect),
  128. };
  129. static struct mc13xxx_platform_data mc13783_pdata __initdata = {
  130. .flags = MC13XXX_USE_RTC,
  131. };
  132. static struct spi_board_info mc13783_spi_dev __initdata = {
  133. .modalias = "mc13783",
  134. .max_speed_hz = 1000000,
  135. .bus_num = 1,
  136. .chip_select = 0,
  137. .platform_data = &mc13783_pdata,
  138. /* irq number is run-time assigned */
  139. };
  140. /*
  141. * USB
  142. */
  143. #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
  144. PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
  145. static int usbh2_init(struct platform_device *pdev)
  146. {
  147. int pins[] = {
  148. MX31_PIN_USBH2_DATA0__USBH2_DATA0,
  149. MX31_PIN_USBH2_DATA1__USBH2_DATA1,
  150. MX31_PIN_USBH2_CLK__USBH2_CLK,
  151. MX31_PIN_USBH2_DIR__USBH2_DIR,
  152. MX31_PIN_USBH2_NXT__USBH2_NXT,
  153. MX31_PIN_USBH2_STP__USBH2_STP,
  154. };
  155. mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
  156. mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
  157. mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
  158. mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
  159. mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
  160. mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
  161. mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
  162. mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
  163. mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
  164. mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
  165. mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
  166. mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
  167. mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
  168. mxc_iomux_set_gpr(MUX_PGP_UH2, true);
  169. /* chip select */
  170. mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
  171. "USBH2_CS");
  172. gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
  173. gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
  174. mdelay(10);
  175. return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
  176. }
  177. static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
  178. .init = usbh2_init,
  179. .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
  180. };
  181. /*
  182. * NOR flash
  183. */
  184. static struct physmap_flash_data nor_flash_data = {
  185. .width = 2,
  186. };
  187. static struct resource nor_flash_resource = {
  188. .start = 0xa0000000,
  189. .end = 0xa1ffffff,
  190. .flags = IORESOURCE_MEM,
  191. };
  192. static struct platform_device physmap_flash_device = {
  193. .name = "physmap-flash",
  194. .id = 0,
  195. .dev = {
  196. .platform_data = &nor_flash_data,
  197. },
  198. .resource = &nor_flash_resource,
  199. .num_resources = 1,
  200. };
  201. /*
  202. * This structure defines the MX31 memory map.
  203. */
  204. static struct map_desc mx31lite_io_desc[] __initdata = {
  205. {
  206. .virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT,
  207. .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
  208. .length = MX31_CS4_SIZE,
  209. .type = MT_DEVICE
  210. }
  211. };
  212. /*
  213. * Set up static virtual mappings.
  214. */
  215. void __init mx31lite_map_io(void)
  216. {
  217. mx31_map_io();
  218. iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc));
  219. }
  220. static int mx31lite_baseboard;
  221. core_param(mx31lite_baseboard, mx31lite_baseboard, int, 0444);
  222. static struct regulator_consumer_supply dummy_supplies[] = {
  223. REGULATOR_SUPPLY("vdd33a", "smsc911x"),
  224. REGULATOR_SUPPLY("vddvario", "smsc911x"),
  225. };
  226. static void __init mx31lite_init(void)
  227. {
  228. imx31_soc_init();
  229. mxc_iomux_setup_multiple_pins(mx31lite_pins, ARRAY_SIZE(mx31lite_pins),
  230. "mx31lite");
  231. imx31_add_imx_uart0(&uart_pdata);
  232. imx31_add_spi_imx0(&spi0_pdata);
  233. /* NOR and NAND flash */
  234. platform_device_register(&physmap_flash_device);
  235. imx31_add_mxc_nand(&mx31lite_nand_board_info);
  236. imx31_add_spi_imx1(&spi1_pdata);
  237. regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
  238. }
  239. static void __init mx31lite_late(void)
  240. {
  241. int ret;
  242. if (mx31lite_baseboard == MX31LITE_DB)
  243. mx31lite_db_init();
  244. mc13783_spi_dev.irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
  245. spi_register_board_info(&mc13783_spi_dev, 1);
  246. /* USB */
  247. usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
  248. ULPI_OTG_DRVVBUS_EXT);
  249. if (usbh2_pdata.otg)
  250. imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
  251. /* SMSC9117 IRQ pin */
  252. ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq");
  253. if (ret)
  254. pr_warn("could not get LAN irq gpio\n");
  255. else {
  256. gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_SFS6));
  257. smsc911x_resources[1].start =
  258. gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SFS6));
  259. smsc911x_resources[1].end =
  260. gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SFS6));
  261. platform_device_register(&smsc911x_device);
  262. }
  263. }
  264. static void __init mx31lite_timer_init(void)
  265. {
  266. mx31_clocks_init(26000000);
  267. }
  268. MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
  269. /* Maintainer: Freescale Semiconductor, Inc. */
  270. .atag_offset = 0x100,
  271. .map_io = mx31lite_map_io,
  272. .init_early = imx31_init_early,
  273. .init_irq = mx31_init_irq,
  274. .init_time = mx31lite_timer_init,
  275. .init_machine = mx31lite_init,
  276. .init_late = mx31lite_late,
  277. .restart = mxc_restart,
  278. MACHINE_END