common.h 4.3 KB

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  1. /*
  2. * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved.
  3. */
  4. /*
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. */
  9. #ifndef __ASM_ARCH_MXC_COMMON_H__
  10. #define __ASM_ARCH_MXC_COMMON_H__
  11. #include <linux/reboot.h>
  12. struct irq_data;
  13. struct platform_device;
  14. struct pt_regs;
  15. struct clk;
  16. struct device_node;
  17. enum mxc_cpu_pwr_mode;
  18. struct of_device_id;
  19. void mx21_map_io(void);
  20. void mx27_map_io(void);
  21. void mx31_map_io(void);
  22. void mx35_map_io(void);
  23. void imx21_init_early(void);
  24. void imx27_init_early(void);
  25. void imx31_init_early(void);
  26. void imx35_init_early(void);
  27. void mxc_init_irq(void __iomem *);
  28. void mx21_init_irq(void);
  29. void mx27_init_irq(void);
  30. void mx31_init_irq(void);
  31. void mx35_init_irq(void);
  32. void imx21_soc_init(void);
  33. void imx27_soc_init(void);
  34. void imx31_soc_init(void);
  35. void imx35_soc_init(void);
  36. void epit_timer_init(void __iomem *base, int irq);
  37. int mx21_clocks_init(unsigned long lref, unsigned long fref);
  38. int mx27_clocks_init(unsigned long fref);
  39. int mx31_clocks_init(unsigned long fref);
  40. int mx35_clocks_init(void);
  41. int mx31_clocks_init_dt(void);
  42. struct platform_device *mxc_register_gpio(char *name, int id,
  43. resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
  44. void mxc_set_cpu_type(unsigned int type);
  45. void mxc_restart(enum reboot_mode, const char *);
  46. void mxc_arch_reset_init(void __iomem *);
  47. void imx1_reset_init(void __iomem *);
  48. void imx_set_aips(void __iomem *);
  49. void imx_aips_allow_unprivileged_access(const char *compat);
  50. int mxc_device_init(void);
  51. void imx_set_soc_revision(unsigned int rev);
  52. void imx_init_revision_from_anatop(void);
  53. struct device *imx_soc_device_init(void);
  54. void imx6_enable_rbc(bool enable);
  55. void imx_gpc_check_dt(void);
  56. void imx_gpc_set_arm_power_in_lpm(bool power_off);
  57. void imx_gpc_set_arm_power_up_timing(u32 sw2iso, u32 sw);
  58. void imx_gpc_set_arm_power_down_timing(u32 sw2iso, u32 sw);
  59. void imx25_pm_init(void);
  60. void imx27_pm_init(void);
  61. enum mxc_cpu_pwr_mode {
  62. WAIT_CLOCKED, /* wfi only */
  63. WAIT_UNCLOCKED, /* WAIT */
  64. WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */
  65. STOP_POWER_ON, /* just STOP */
  66. STOP_POWER_OFF, /* STOP + SRPG */
  67. };
  68. enum mx3_cpu_pwr_mode {
  69. MX3_RUN,
  70. MX3_WAIT,
  71. MX3_DOZE,
  72. MX3_SLEEP,
  73. };
  74. void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);
  75. void imx_enable_cpu(int cpu, bool enable);
  76. void imx_set_cpu_jump(int cpu, void *jump_addr);
  77. u32 imx_get_cpu_arg(int cpu);
  78. void imx_set_cpu_arg(int cpu, u32 arg);
  79. #ifdef CONFIG_SMP
  80. void v7_secondary_startup(void);
  81. void imx_scu_map_io(void);
  82. void imx_smp_prepare(void);
  83. #else
  84. static inline void imx_scu_map_io(void) {}
  85. static inline void imx_smp_prepare(void) {}
  86. #endif
  87. void imx_src_init(void);
  88. void imx_gpc_pre_suspend(bool arm_power_off);
  89. void imx_gpc_post_resume(void);
  90. void imx_gpc_mask_all(void);
  91. void imx_gpc_restore_all(void);
  92. void imx_gpc_hwirq_mask(unsigned int hwirq);
  93. void imx_gpc_hwirq_unmask(unsigned int hwirq);
  94. void imx_anatop_init(void);
  95. void imx_anatop_pre_suspend(void);
  96. void imx_anatop_post_resume(void);
  97. int imx6_set_lpm(enum mxc_cpu_pwr_mode mode);
  98. void imx6_set_int_mem_clk_lpm(bool enable);
  99. void imx6sl_set_wait_clk(bool enter);
  100. int imx_mmdc_get_ddr_type(void);
  101. void imx_cpu_die(unsigned int cpu);
  102. int imx_cpu_kill(unsigned int cpu);
  103. #ifdef CONFIG_SUSPEND
  104. void v7_cpu_resume(void);
  105. void imx53_suspend(void __iomem *ocram_vbase);
  106. extern const u32 imx53_suspend_sz;
  107. void imx6_suspend(void __iomem *ocram_vbase);
  108. #else
  109. static inline void v7_cpu_resume(void) {}
  110. static inline void imx53_suspend(void __iomem *ocram_vbase) {}
  111. static const u32 imx53_suspend_sz;
  112. static inline void imx6_suspend(void __iomem *ocram_vbase) {}
  113. #endif
  114. void imx6_pm_ccm_init(const char *ccm_compat);
  115. void imx6q_pm_init(void);
  116. void imx6dl_pm_init(void);
  117. void imx6sl_pm_init(void);
  118. void imx6sx_pm_init(void);
  119. void imx6ul_pm_init(void);
  120. #ifdef CONFIG_PM
  121. void imx51_pm_init(void);
  122. void imx53_pm_init(void);
  123. #else
  124. static inline void imx51_pm_init(void) {}
  125. static inline void imx53_pm_init(void) {}
  126. #endif
  127. #ifdef CONFIG_NEON
  128. int mx51_neon_fixup(void);
  129. #else
  130. static inline int mx51_neon_fixup(void) { return 0; }
  131. #endif
  132. #ifdef CONFIG_CACHE_L2X0
  133. void imx_init_l2cache(void);
  134. #else
  135. static inline void imx_init_l2cache(void) {}
  136. #endif
  137. extern const struct smp_operations imx_smp_ops;
  138. extern const struct smp_operations ls1021a_smp_ops;
  139. #endif