ptrace.h 4.2 KB

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  1. /*
  2. * arch/arm/include/asm/ptrace.h
  3. *
  4. * Copyright (C) 1996-2003 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #ifndef __ASM_ARM_PTRACE_H
  11. #define __ASM_ARM_PTRACE_H
  12. #include <uapi/asm/ptrace.h>
  13. #ifndef __ASSEMBLY__
  14. #include <linux/types.h>
  15. struct pt_regs {
  16. unsigned long uregs[18];
  17. };
  18. struct svc_pt_regs {
  19. struct pt_regs regs;
  20. u32 dacr;
  21. u32 addr_limit;
  22. };
  23. #define to_svc_pt_regs(r) container_of(r, struct svc_pt_regs, regs)
  24. #define user_mode(regs) \
  25. (((regs)->ARM_cpsr & 0xf) == 0)
  26. #ifdef CONFIG_ARM_THUMB
  27. #define thumb_mode(regs) \
  28. (((regs)->ARM_cpsr & PSR_T_BIT))
  29. #else
  30. #define thumb_mode(regs) (0)
  31. #endif
  32. #ifndef CONFIG_CPU_V7M
  33. #define isa_mode(regs) \
  34. ((((regs)->ARM_cpsr & PSR_J_BIT) >> (__ffs(PSR_J_BIT) - 1)) | \
  35. (((regs)->ARM_cpsr & PSR_T_BIT) >> (__ffs(PSR_T_BIT))))
  36. #else
  37. #define isa_mode(regs) 1 /* Thumb */
  38. #endif
  39. #define processor_mode(regs) \
  40. ((regs)->ARM_cpsr & MODE_MASK)
  41. #define interrupts_enabled(regs) \
  42. (!((regs)->ARM_cpsr & PSR_I_BIT))
  43. #define fast_interrupts_enabled(regs) \
  44. (!((regs)->ARM_cpsr & PSR_F_BIT))
  45. /* Are the current registers suitable for user mode?
  46. * (used to maintain security in signal handlers)
  47. */
  48. static inline int valid_user_regs(struct pt_regs *regs)
  49. {
  50. #ifndef CONFIG_CPU_V7M
  51. unsigned long mode = regs->ARM_cpsr & MODE_MASK;
  52. /*
  53. * Always clear the F (FIQ) and A (delayed abort) bits
  54. */
  55. regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT);
  56. if ((regs->ARM_cpsr & PSR_I_BIT) == 0) {
  57. if (mode == USR_MODE)
  58. return 1;
  59. if (elf_hwcap & HWCAP_26BIT && mode == USR26_MODE)
  60. return 1;
  61. }
  62. /*
  63. * Force CPSR to something logical...
  64. */
  65. regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT;
  66. if (!(elf_hwcap & HWCAP_26BIT))
  67. regs->ARM_cpsr |= USR_MODE;
  68. return 0;
  69. #else /* ifndef CONFIG_CPU_V7M */
  70. return 1;
  71. #endif
  72. }
  73. static inline long regs_return_value(struct pt_regs *regs)
  74. {
  75. return regs->ARM_r0;
  76. }
  77. #define instruction_pointer(regs) (regs)->ARM_pc
  78. #ifdef CONFIG_THUMB2_KERNEL
  79. #define frame_pointer(regs) (regs)->ARM_r7
  80. #else
  81. #define frame_pointer(regs) (regs)->ARM_fp
  82. #endif
  83. static inline void instruction_pointer_set(struct pt_regs *regs,
  84. unsigned long val)
  85. {
  86. instruction_pointer(regs) = val;
  87. }
  88. #ifdef CONFIG_SMP
  89. extern unsigned long profile_pc(struct pt_regs *regs);
  90. #else
  91. #define profile_pc(regs) instruction_pointer(regs)
  92. #endif
  93. #define predicate(x) ((x) & 0xf0000000)
  94. #define PREDICATE_ALWAYS 0xe0000000
  95. /*
  96. * True if instr is a 32-bit thumb instruction. This works if instr
  97. * is the first or only half-word of a thumb instruction. It also works
  98. * when instr holds all 32-bits of a wide thumb instruction if stored
  99. * in the form (first_half<<16)|(second_half)
  100. */
  101. #define is_wide_instruction(instr) ((unsigned)(instr) >= 0xe800)
  102. /*
  103. * kprobe-based event tracer support
  104. */
  105. #include <linux/stddef.h>
  106. #include <linux/types.h>
  107. #define MAX_REG_OFFSET (offsetof(struct pt_regs, ARM_ORIG_r0))
  108. extern int regs_query_register_offset(const char *name);
  109. extern const char *regs_query_register_name(unsigned int offset);
  110. extern bool regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr);
  111. extern unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
  112. unsigned int n);
  113. /**
  114. * regs_get_register() - get register value from its offset
  115. * @regs: pt_regs from which register value is gotten
  116. * @offset: offset number of the register.
  117. *
  118. * regs_get_register returns the value of a register whose offset from @regs.
  119. * The @offset is the offset of the register in struct pt_regs.
  120. * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
  121. */
  122. static inline unsigned long regs_get_register(struct pt_regs *regs,
  123. unsigned int offset)
  124. {
  125. if (unlikely(offset > MAX_REG_OFFSET))
  126. return 0;
  127. return *(unsigned long *)((unsigned long)regs + offset);
  128. }
  129. /* Valid only for Kernel mode traps. */
  130. static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
  131. {
  132. return regs->ARM_sp;
  133. }
  134. static inline unsigned long user_stack_pointer(struct pt_regs *regs)
  135. {
  136. return regs->ARM_sp;
  137. }
  138. #define current_pt_regs(void) ({ (struct pt_regs *) \
  139. ((current_stack_pointer | (THREAD_SIZE - 1)) - 7) - 1; \
  140. })
  141. #endif /* __ASSEMBLY__ */
  142. #endif