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linux-libre
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arch
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arm
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include
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asm
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hardware
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it8152.h

it8152.h 3.8 KB
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  1. /*
    2. 

  2.  * linux/include/arm/hardware/it8152.h
    3. 

  3.  *
    4. 

  4.  * Copyright Compulab Ltd., 2006,2007
    5. 

  5.  * Mike Rapoport <mike@compulab.co.il>
    6. 

  6.  *
    7. 

  7.  * ITE 8152 companion chip register definitions
    8. 

  8.  */
    9. 

  9. 

  10. #ifndef __ASM_HARDWARE_IT8152_H
    11. 

  11. #define __ASM_HARDWARE_IT8152_H
    12. 

  12. 

  13. #include <mach/irqs.h>
    14. 

  14. 

  15. extern void __iomem *it8152_base_address;
    16. 

  16. 

  17. #define IT8152_IO_BASE			(it8152_base_address + 0x03e00000)
    18. 

  18. #define IT8152_CFGREG_BASE		(it8152_base_address + 0x03f00000)
    19. 

  19. 

  20. #define __REG_IT8152(x)			(it8152_base_address + (x))
    21. 

  21. 

  22. #define IT8152_PCI_CFG_ADDR		__REG_IT8152(0x3f00800)
    23. 

  23. #define IT8152_PCI_CFG_DATA		__REG_IT8152(0x3f00804)
    24. 

  24. 

  25. #define IT8152_INTC_LDCNIRR		__REG_IT8152(0x3f00300)
    26. 

  26. #define IT8152_INTC_LDPNIRR		__REG_IT8152(0x3f00304)
    27. 

  27. #define IT8152_INTC_LDCNIMR		__REG_IT8152(0x3f00308)
    28. 

  28. #define IT8152_INTC_LDPNIMR		__REG_IT8152(0x3f0030C)
    29. 

  29. #define IT8152_INTC_LDNITR		__REG_IT8152(0x3f00310)
    30. 

  30. #define IT8152_INTC_LDNIAR		__REG_IT8152(0x3f00314)
    31. 

  31. #define IT8152_INTC_LPCNIRR		__REG_IT8152(0x3f00320)
    32. 

  32. #define IT8152_INTC_LPPNIRR		__REG_IT8152(0x3f00324)
    33. 

  33. #define IT8152_INTC_LPCNIMR		__REG_IT8152(0x3f00328)
    34. 

  34. #define IT8152_INTC_LPPNIMR		__REG_IT8152(0x3f0032C)
    35. 

  35. #define IT8152_INTC_LPNITR		__REG_IT8152(0x3f00330)
    36. 

  36. #define IT8152_INTC_LPNIAR		__REG_IT8152(0x3f00334)
    37. 

  37. #define IT8152_INTC_PDCNIRR		__REG_IT8152(0x3f00340)
    38. 

  38. #define IT8152_INTC_PDPNIRR		__REG_IT8152(0x3f00344)
    39. 

  39. #define IT8152_INTC_PDCNIMR		__REG_IT8152(0x3f00348)
    40. 

  40. #define IT8152_INTC_PDPNIMR		__REG_IT8152(0x3f0034C)
    41. 

  41. #define IT8152_INTC_PDNITR		__REG_IT8152(0x3f00350)
    42. 

  42. #define IT8152_INTC_PDNIAR		__REG_IT8152(0x3f00354)
    43. 

  43. #define IT8152_INTC_INTC_TYPER		__REG_IT8152(0x3f003FC)
    44. 

  44. 

  45. #define IT8152_GPIO_GPDR		__REG_IT8152(0x3f00500)
    46. 

  46. 

  47. /*
    48. 

  48.   Interrupt controller per register summary:
    49. 

  49.   ---------------------------------------
    50. 

  50.   LCDNIRR:
    51. 

  51.   IT8152_LD_IRQ(8) PCICLK stop
    52. 

  52.   IT8152_LD_IRQ(7) MCLK ready
    53. 

  53.   IT8152_LD_IRQ(6) s/w
    54. 

  54.   IT8152_LD_IRQ(5) UART
    55. 

  55.   IT8152_LD_IRQ(4) GPIO
    56. 

  56.   IT8152_LD_IRQ(3) TIMER 4
    57. 

  57.   IT8152_LD_IRQ(2) TIMER 3
    58. 

  58.   IT8152_LD_IRQ(1) TIMER 2
    59. 

  59.   IT8152_LD_IRQ(0) TIMER 1
    60. 

  60. 

  61.   LPCNIRR:
    62. 

  62.   IT8152_LP_IRQ(x) serial IRQ x
    63. 

  63. 

  64.   PCIDNIRR:
    65. 

  65.   IT8152_PD_IRQ(14) PCISERR
    66. 

  66.   IT8152_PD_IRQ(13) CPU/PCI bridge target abort (h2pTADR)
    67. 

  67.   IT8152_PD_IRQ(12) CPU/PCI bridge master abort (h2pMADR)
    68. 

  68.   IT8152_PD_IRQ(11) PCI INTD
    69. 

  69.   IT8152_PD_IRQ(10) PCI INTC
    70. 

  70.   IT8152_PD_IRQ(9)  PCI INTB
    71. 

  71.   IT8152_PD_IRQ(8)  PCI INTA
    72. 

  72.   IT8152_PD_IRQ(7)  serial INTD
    73. 

  73.   IT8152_PD_IRQ(6)  serial INTC
    74. 

  74.   IT8152_PD_IRQ(5)  serial INTB
    75. 

  75.   IT8152_PD_IRQ(4)  serial INTA
    76. 

  76.   IT8152_PD_IRQ(3)  serial IRQ IOCHK (IOCHKR)
    77. 

  77.   IT8152_PD_IRQ(2)  chaining DMA (CDMAR)
    78. 

  78.   IT8152_PD_IRQ(1)  USB (USBR)
    79. 

  79.   IT8152_PD_IRQ(0)  Audio controller (ACR)
    80. 

  80.  */
    81. 

  81. #define IT8152_IRQ(x)   (IRQ_BOARD_START + (x))
    82. 

  82. #define IT8152_LAST_IRQ	(IRQ_BOARD_START + 40)
    83. 

  83. 

  84. /* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */
    85. 

  85. #define IT8152_LD_IRQ_COUNT     9
    86. 

  86. #define IT8152_LP_IRQ_COUNT     16
    87. 

  87. #define IT8152_PD_IRQ_COUNT     15
    88. 

  88. 

  89. /* Priorities: */
    90. 

  90. #define IT8152_PD_IRQ(i)        IT8152_IRQ(i)
    91. 

  91. #define IT8152_LP_IRQ(i)        (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT)
    92. 

  92. #define IT8152_LD_IRQ(i)        (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT)
    93. 

  93. 

  94. /* frequently used interrupts */
    95. 

  95. #define IT8152_PCISERR		IT8152_PD_IRQ(14)
    96. 

  96. #define IT8152_H2PTADR		IT8152_PD_IRQ(13)
    97. 

  97. #define IT8152_H2PMAR		IT8152_PD_IRQ(12)
    98. 

  98. #define IT8152_PCI_INTD		IT8152_PD_IRQ(11)
    99. 

  99. #define IT8152_PCI_INTC		IT8152_PD_IRQ(10)
    100. 

  100. #define IT8152_PCI_INTB		IT8152_PD_IRQ(9)
    101. 

  101. #define IT8152_PCI_INTA		IT8152_PD_IRQ(8)
    102. 

  102. #define IT8152_CDMA_INT		IT8152_PD_IRQ(2)
    103. 

  103. #define IT8152_USB_INT		IT8152_PD_IRQ(1)
    104. 

  104. #define IT8152_AUDIO_INT	IT8152_PD_IRQ(0)
    105. 

  105. 

  106. struct pci_dev;
    107. 

  107. struct pci_sys_data;
    108. 

  108. 

  109. extern void it8152_irq_demux(struct irq_desc *desc);
    110. 

  110. extern void it8152_init_irq(void);
    111. 

  111. extern int it8152_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
    112. 

  112. extern int it8152_pci_setup(int nr, struct pci_sys_data *sys);
    113. 

  113. extern struct pci_ops it8152_ops;
    114. 

  114. 

  115. #endif /* __ASM_HARDWARE_IT8152_H */
    116. 

  116.