eznps.dts 2.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596
  1. /*
  2. * Copyright(c) 2015 EZchip Technologies.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * The full GNU General Public License is included in this distribution in
  14. * the file called "COPYING".
  15. */
  16. /dts-v1/;
  17. / {
  18. compatible = "ezchip,arc-nps";
  19. #address-cells = <1>;
  20. #size-cells = <1>;
  21. interrupt-parent = <&intc>;
  22. present-cpus = "0-1,16-17";
  23. possible-cpus = "0-4095";
  24. aliases {
  25. ethernet0 = &gmac0;
  26. };
  27. chosen {
  28. bootargs = "earlycon=uart8250,mmio32be,0xf7209000,115200n8 console=ttyS0,115200n8";
  29. };
  30. memory {
  31. device_type = "memory";
  32. reg = <0x80000000 0x20000000>; /* 512M */
  33. };
  34. clocks {
  35. sysclk: sysclk {
  36. compatible = "fixed-clock";
  37. #clock-cells = <0>;
  38. clock-frequency = <83333333>;
  39. };
  40. };
  41. soc {
  42. compatible = "simple-bus";
  43. #address-cells = <1>;
  44. #size-cells = <1>;
  45. /* child and parent address space 1:1 mapped */
  46. ranges;
  47. intc: interrupt-controller {
  48. compatible = "ezchip,nps400-ic";
  49. interrupt-controller;
  50. #interrupt-cells = <1>;
  51. };
  52. timer0: timer_clkevt {
  53. compatible = "snps,arc-timer";
  54. interrupts = <3>;
  55. clocks = <&sysclk>;
  56. };
  57. timer1: timer_clksrc {
  58. compatible = "ezchip,nps400-timer";
  59. clocks = <&sysclk>;
  60. clock-names="sysclk";
  61. };
  62. uart@f7209000 {
  63. compatible = "snps,dw-apb-uart";
  64. device_type = "serial";
  65. reg = <0xf7209000 0x100>;
  66. interrupts = <6>;
  67. clocks = <&sysclk>;
  68. clock-names="baudclk";
  69. baud = <115200>;
  70. reg-shift = <2>;
  71. reg-io-width = <4>;
  72. native-endian;
  73. };
  74. gmac0: ethernet@f7470000 {
  75. compatible = "ezchip,nps-mgt-enet";
  76. reg = <0xf7470000 0x1940>;
  77. interrupts = <7>;
  78. /* Filled in by U-Boot */
  79. mac-address = [ 00 C0 00 F0 04 03 ];
  80. };
  81. };
  82. };