cs89x0.c 19 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678
  1. /**
  2. Per an email message from Russ Nelson <nelson@crynwr.com> on
  3. 18 March 2008 this file is now licensed under GPL Version 2.
  4. From: Russ Nelson <nelson@crynwr.com>
  5. Date: Tue, 18 Mar 2008 12:42:00 -0400
  6. Subject: Re: [Etherboot-developers] cs89x0 driver in etherboot
  7. -- quote from email
  8. As copyright holder, if I say it doesn't conflict with the GPL,
  9. then it doesn't conflict with the GPL.
  10. However, there's no point in causing people's brains to overheat,
  11. so yes, I grant permission for the code to be relicensed under the
  12. GPLv2. Please make sure that this change in licensing makes its
  13. way upstream. -russ
  14. -- quote from email
  15. **/
  16. /* cs89x0.c: A Crystal Semiconductor CS89[02]0 driver for etherboot. */
  17. /*
  18. Permission is granted to distribute the enclosed cs89x0.[ch] driver
  19. only in conjunction with the Etherboot package. The code is
  20. ordinarily distributed under the GPL.
  21. Russ Nelson, January 2000
  22. ChangeLog:
  23. Thu Dec 6 22:40:00 1996 Markus Gutschke <gutschk@math.uni-muenster.de>
  24. * disabled all "advanced" features; this should make the code more reliable
  25. * reorganized the reset function
  26. * always reset the address port, so that autoprobing will continue working
  27. * some cosmetic changes
  28. * 2.5
  29. Thu Dec 5 21:00:00 1996 Markus Gutschke <gutschk@math.uni-muenster.de>
  30. * tested the code against a CS8900 card
  31. * lots of minor bug fixes and adjustments
  32. * this is the first release, that actually works! it still requires some
  33. changes in order to be more tolerant to different environments
  34. * 4
  35. Fri Nov 22 23:00:00 1996 Markus Gutschke <gutschk@math.uni-muenster.de>
  36. * read the manuals for the CS89x0 chipsets and took note of all the
  37. changes that will be neccessary in order to adapt Russel Nelson's code
  38. to the requirements of a BOOT-Prom
  39. * 6
  40. Thu Nov 19 22:00:00 1996 Markus Gutschke <gutschk@math.uni-muenster.de>
  41. * Synched with Russel Nelson's current code (v1.00)
  42. * 2
  43. Thu Nov 12 18:00:00 1996 Markus Gutschke <gutschk@math.uni-muenster.de>
  44. * Cleaned up some of the code and tried to optimize the code size.
  45. * 1.5
  46. Sun Nov 10 16:30:00 1996 Markus Gutschke <gutschk@math.uni-muenster.de>
  47. * First experimental release. This code compiles fine, but I
  48. have no way of testing whether it actually works.
  49. * I did not (yet) bother to make the code 16bit aware, so for
  50. the time being, it will only work for Etherboot/32.
  51. * 12
  52. */
  53. #include "etherboot.h"
  54. #include "nic.h"
  55. #include "cards.h"
  56. #include "cs89x0.h"
  57. static unsigned short eth_nic_base;
  58. static unsigned long eth_mem_start;
  59. static unsigned short eth_irq;
  60. static unsigned short eth_cs_type; /* one of: CS8900, CS8920, CS8920M */
  61. static unsigned short eth_auto_neg_cnf;
  62. static unsigned short eth_adapter_cnf;
  63. static unsigned short eth_linectl;
  64. /*************************************************************************
  65. CS89x0 - specific routines
  66. **************************************************************************/
  67. static inline int readreg(int portno)
  68. {
  69. outw(portno, eth_nic_base + ADD_PORT);
  70. return inw(eth_nic_base + DATA_PORT);
  71. }
  72. static inline void writereg(int portno, int value)
  73. {
  74. outw(portno, eth_nic_base + ADD_PORT);
  75. outw(value, eth_nic_base + DATA_PORT);
  76. return;
  77. }
  78. /*************************************************************************
  79. EEPROM access
  80. **************************************************************************/
  81. static int wait_eeprom_ready(void)
  82. {
  83. unsigned long tmo = currticks() + 4*TICKS_PER_SEC;
  84. /* check to see if the EEPROM is ready, a timeout is used -
  85. just in case EEPROM is ready when SI_BUSY in the
  86. PP_SelfST is clear */
  87. while(readreg(PP_SelfST) & SI_BUSY) {
  88. if (currticks() >= tmo)
  89. return -1; }
  90. return 0;
  91. }
  92. static int get_eeprom_data(int off, int len, unsigned short *buffer)
  93. {
  94. int i;
  95. #ifdef EDEBUG
  96. printf("\ncs: EEPROM data from %hX for %hX:",off,len);
  97. #endif
  98. for (i = 0; i < len; i++) {
  99. if (wait_eeprom_ready() < 0)
  100. return -1;
  101. /* Now send the EEPROM read command and EEPROM location
  102. to read */
  103. writereg(PP_EECMD, (off + i) | EEPROM_READ_CMD);
  104. if (wait_eeprom_ready() < 0)
  105. return -1;
  106. buffer[i] = readreg(PP_EEData);
  107. #ifdef EDEBUG
  108. if (!(i%10))
  109. printf("\ncs: ");
  110. printf("%hX ", buffer[i]);
  111. #endif
  112. }
  113. #ifdef EDEBUG
  114. putchar('\n');
  115. #endif
  116. return(0);
  117. }
  118. static int get_eeprom_chksum(int off, int len, unsigned short *buffer)
  119. {
  120. int i, cksum;
  121. cksum = 0;
  122. for (i = 0; i < len; i++)
  123. cksum += buffer[i];
  124. cksum &= 0xffff;
  125. if (cksum == 0)
  126. return 0;
  127. return -1;
  128. }
  129. /*************************************************************************
  130. Activate all of the available media and probe for network
  131. **************************************************************************/
  132. static void clrline(void)
  133. {
  134. int i;
  135. putchar('\r');
  136. for (i = 79; i--; ) putchar(' ');
  137. printf("\rcs: ");
  138. return;
  139. }
  140. static void control_dc_dc(int on_not_off)
  141. {
  142. unsigned int selfcontrol;
  143. unsigned long tmo = currticks() + TICKS_PER_SEC;
  144. /* control the DC to DC convertor in the SelfControl register. */
  145. selfcontrol = HCB1_ENBL; /* Enable the HCB1 bit as an output */
  146. if (((eth_adapter_cnf & A_CNF_DC_DC_POLARITY) != 0) ^ on_not_off)
  147. selfcontrol |= HCB1;
  148. else
  149. selfcontrol &= ~HCB1;
  150. writereg(PP_SelfCTL, selfcontrol);
  151. /* Wait for the DC/DC converter to power up - 1000ms */
  152. while (currticks() < tmo);
  153. return;
  154. }
  155. static int detect_tp(void)
  156. {
  157. unsigned long tmo;
  158. /* Turn on the chip auto detection of 10BT/ AUI */
  159. clrline(); printf("attempting %s:","TP");
  160. /* If connected to another full duplex capable 10-Base-T card
  161. the link pulses seem to be lost when the auto detect bit in
  162. the LineCTL is set. To overcome this the auto detect bit
  163. will be cleared whilst testing the 10-Base-T interface.
  164. This would not be necessary for the sparrow chip but is
  165. simpler to do it anyway. */
  166. writereg(PP_LineCTL, eth_linectl &~ AUI_ONLY);
  167. control_dc_dc(0);
  168. /* Delay for the hardware to work out if the TP cable is
  169. present - 150ms */
  170. for (tmo = currticks() + 4; currticks() < tmo; );
  171. if ((readreg(PP_LineST) & LINK_OK) == 0)
  172. return 0;
  173. if (eth_cs_type != CS8900) {
  174. writereg(PP_AutoNegCTL, eth_auto_neg_cnf & AUTO_NEG_MASK);
  175. if ((eth_auto_neg_cnf & AUTO_NEG_BITS) == AUTO_NEG_ENABLE) {
  176. printf(" negotiating duplex... ");
  177. while (readreg(PP_AutoNegST) & AUTO_NEG_BUSY) {
  178. if (currticks() - tmo > 40*TICKS_PER_SEC) {
  179. printf("time out ");
  180. break;
  181. }
  182. }
  183. }
  184. if (readreg(PP_AutoNegST) & FDX_ACTIVE)
  185. printf("using full duplex");
  186. else
  187. printf("using half duplex");
  188. }
  189. return A_CNF_MEDIA_10B_T;
  190. }
  191. /* send a test packet - return true if carrier bits are ok */
  192. static int send_test_pkt(struct nic *nic)
  193. {
  194. static unsigned char testpacket[] = { 0,0,0,0,0,0, 0,0,0,0,0,0,
  195. 0, 46, /*A 46 in network order */
  196. 0, 0, /*DSAP=0 & SSAP=0 fields */
  197. 0xf3,0 /*Control (Test Req+P bit set)*/ };
  198. unsigned long tmo;
  199. writereg(PP_LineCTL, readreg(PP_LineCTL) | SERIAL_TX_ON);
  200. memcpy(testpacket, nic->node_addr, ETH_ALEN);
  201. memcpy(testpacket+ETH_ALEN, nic->node_addr, ETH_ALEN);
  202. outw(TX_AFTER_ALL, eth_nic_base + TX_CMD_PORT);
  203. outw(ETH_ZLEN, eth_nic_base + TX_LEN_PORT);
  204. /* Test to see if the chip has allocated memory for the packet */
  205. for (tmo = currticks() + 2;
  206. (readreg(PP_BusST) & READY_FOR_TX_NOW) == 0; )
  207. if (currticks() >= tmo)
  208. return(0);
  209. /* Write the contents of the packet */
  210. outsw(eth_nic_base + TX_FRAME_PORT, testpacket,
  211. (ETH_ZLEN+1)>>1);
  212. printf(" sending test packet ");
  213. /* wait a couple of timer ticks for packet to be received */
  214. for (tmo = currticks() + 2; currticks() < tmo; );
  215. if ((readreg(PP_TxEvent) & TX_SEND_OK_BITS) == TX_OK) {
  216. printf("succeeded");
  217. return 1;
  218. }
  219. printf("failed");
  220. return 0;
  221. }
  222. static int detect_aui(struct nic *nic)
  223. {
  224. clrline(); printf("attempting %s:","AUI");
  225. control_dc_dc(0);
  226. writereg(PP_LineCTL, (eth_linectl & ~AUTO_AUI_10BASET) | AUI_ONLY);
  227. if (send_test_pkt(nic)) {
  228. return A_CNF_MEDIA_AUI; }
  229. else
  230. return 0;
  231. }
  232. static int detect_bnc(struct nic *nic)
  233. {
  234. clrline(); printf("attempting %s:","BNC");
  235. control_dc_dc(1);
  236. writereg(PP_LineCTL, (eth_linectl & ~AUTO_AUI_10BASET) | AUI_ONLY);
  237. if (send_test_pkt(nic)) {
  238. return A_CNF_MEDIA_10B_2; }
  239. else
  240. return 0;
  241. }
  242. /**************************************************************************
  243. ETH_RESET - Reset adapter
  244. ***************************************************************************/
  245. static void cs89x0_reset(struct nic *nic)
  246. {
  247. int i;
  248. unsigned long reset_tmo;
  249. writereg(PP_SelfCTL, readreg(PP_SelfCTL) | POWER_ON_RESET);
  250. /* wait for two ticks; that is 2*55ms */
  251. for (reset_tmo = currticks() + 2; currticks() < reset_tmo; );
  252. if (eth_cs_type != CS8900) {
  253. /* Hardware problem requires PNP registers to be reconfigured
  254. after a reset */
  255. if (eth_irq != 0xFFFF) {
  256. outw(PP_CS8920_ISAINT, eth_nic_base + ADD_PORT);
  257. outb(eth_irq, eth_nic_base + DATA_PORT);
  258. outb(0, eth_nic_base + DATA_PORT + 1); }
  259. if (eth_mem_start) {
  260. outw(PP_CS8920_ISAMemB, eth_nic_base + ADD_PORT);
  261. outb((eth_mem_start >> 8) & 0xff, eth_nic_base + DATA_PORT);
  262. outb((eth_mem_start >> 24) & 0xff, eth_nic_base + DATA_PORT + 1); } }
  263. /* Wait until the chip is reset */
  264. for (reset_tmo = currticks() + 2;
  265. (readreg(PP_SelfST) & INIT_DONE) == 0 &&
  266. currticks() < reset_tmo; );
  267. /* disable interrupts and memory accesses */
  268. writereg(PP_BusCTL, 0);
  269. /* set the ethernet address */
  270. for (i=0; i < ETH_ALEN/2; i++)
  271. writereg(PP_IA+i*2,
  272. nic->node_addr[i*2] |
  273. (nic->node_addr[i*2+1] << 8));
  274. /* receive only error free packets addressed to this card */
  275. writereg(PP_RxCTL, DEF_RX_ACCEPT);
  276. /* do not generate any interrupts on receive operations */
  277. writereg(PP_RxCFG, 0);
  278. /* do not generate any interrupts on transmit operations */
  279. writereg(PP_TxCFG, 0);
  280. /* do not generate any interrupts on buffer operations */
  281. writereg(PP_BufCFG, 0);
  282. /* reset address port, so that autoprobing will keep working */
  283. outw(PP_ChipID, eth_nic_base + ADD_PORT);
  284. return;
  285. }
  286. /**************************************************************************
  287. ETH_TRANSMIT - Transmit a frame
  288. ***************************************************************************/
  289. static void cs89x0_transmit(
  290. struct nic *nic,
  291. const char *d, /* Destination */
  292. unsigned int t, /* Type */
  293. unsigned int s, /* size */
  294. const char *p) /* Packet */
  295. {
  296. unsigned long tmo;
  297. int sr;
  298. /* does this size have to be rounded??? please,
  299. somebody have a look in the specs */
  300. if ((sr = ((s + ETH_HLEN + 1)&~1)) < ETH_ZLEN)
  301. sr = ETH_ZLEN;
  302. retry:
  303. /* initiate a transmit sequence */
  304. outw(TX_AFTER_ALL, eth_nic_base + TX_CMD_PORT);
  305. outw(sr, eth_nic_base + TX_LEN_PORT);
  306. /* Test to see if the chip has allocated memory for the packet */
  307. if ((readreg(PP_BusST) & READY_FOR_TX_NOW) == 0) {
  308. /* Oops... this should not happen! */
  309. printf("cs: unable to send packet; retrying...\n");
  310. for (tmo = currticks() + 5*TICKS_PER_SEC; currticks() < tmo; );
  311. cs89x0_reset(nic);
  312. goto retry; }
  313. /* Write the contents of the packet */
  314. outsw(eth_nic_base + TX_FRAME_PORT, d, ETH_ALEN/2);
  315. outsw(eth_nic_base + TX_FRAME_PORT, nic->node_addr,
  316. ETH_ALEN/2);
  317. outw(((t >> 8)&0xFF)|(t << 8), eth_nic_base + TX_FRAME_PORT);
  318. outsw(eth_nic_base + TX_FRAME_PORT, p, (s+1)/2);
  319. for (sr = sr/2 - (s+1)/2 - ETH_ALEN - 1; sr-- > 0;
  320. outw(0, eth_nic_base + TX_FRAME_PORT));
  321. /* wait for transfer to succeed */
  322. for (tmo = currticks()+5*TICKS_PER_SEC;
  323. (s = readreg(PP_TxEvent)&~0x1F) == 0 && currticks() < tmo;)
  324. /* nothing */ ;
  325. if ((s & TX_SEND_OK_BITS) != TX_OK) {
  326. printf("\ntransmission error %#hX\n", s);
  327. }
  328. return;
  329. }
  330. /**************************************************************************
  331. ETH_POLL - Wait for a frame
  332. ***************************************************************************/
  333. static int cs89x0_poll(struct nic *nic)
  334. {
  335. int status;
  336. status = readreg(PP_RxEvent);
  337. if ((status & RX_OK) == 0)
  338. return(0);
  339. status = inw(eth_nic_base + RX_FRAME_PORT);
  340. nic->packetlen = inw(eth_nic_base + RX_FRAME_PORT);
  341. insw(eth_nic_base + RX_FRAME_PORT, nic->packet, nic->packetlen >> 1);
  342. if (nic->packetlen & 1)
  343. nic->packet[nic->packetlen-1] = inw(eth_nic_base + RX_FRAME_PORT);
  344. return 1;
  345. }
  346. static void cs89x0_disable(struct nic *nic)
  347. {
  348. cs89x0_reset(nic);
  349. }
  350. /**************************************************************************
  351. ETH_PROBE - Look for an adapter
  352. ***************************************************************************/
  353. struct nic *cs89x0_probe(struct nic *nic, unsigned short *probe_addrs)
  354. {
  355. static const unsigned int netcard_portlist[] = {
  356. #ifdef CS_SCAN
  357. CS_SCAN,
  358. #else /* use "conservative" default values for autoprobing */
  359. 0x300,0x320,0x340,0x200,0x220,0x240,
  360. 0x260,0x280,0x2a0,0x2c0,0x2e0,
  361. /* if that did not work, then be more aggressive */
  362. 0x301,0x321,0x341,0x201,0x221,0x241,
  363. 0x261,0x281,0x2a1,0x2c1,0x2e1,
  364. #endif
  365. 0};
  366. int i, result = -1;
  367. unsigned rev_type = 0, ioaddr, ioidx, isa_cnf, cs_revision;
  368. unsigned short eeprom_buff[CHKSUM_LEN];
  369. for (ioidx = 0; (ioaddr=netcard_portlist[ioidx++]) != 0; ) {
  370. /* if they give us an odd I/O address, then do ONE write to
  371. the address port, to get it back to address zero, where we
  372. expect to find the EISA signature word. */
  373. if (ioaddr & 1) {
  374. ioaddr &= ~1;
  375. if ((inw(ioaddr + ADD_PORT) & ADD_MASK) != ADD_SIG)
  376. continue;
  377. outw(PP_ChipID, ioaddr + ADD_PORT);
  378. }
  379. if (inw(ioaddr + DATA_PORT) != CHIP_EISA_ID_SIG)
  380. continue;
  381. eth_nic_base = ioaddr;
  382. /* get the chip type */
  383. rev_type = readreg(PRODUCT_ID_ADD);
  384. eth_cs_type = rev_type &~ REVISON_BITS;
  385. cs_revision = ((rev_type & REVISON_BITS) >> 8) + 'A';
  386. printf("\ncs: cs89%c0%s rev %c, base %#hX",
  387. eth_cs_type==CS8900?'0':'2',
  388. eth_cs_type==CS8920M?"M":"",
  389. cs_revision,
  390. eth_nic_base);
  391. /* First check to see if an EEPROM is attached*/
  392. if ((readreg(PP_SelfST) & EEPROM_PRESENT) == 0) {
  393. printf("\ncs: no EEPROM...\n");
  394. outw(PP_ChipID, eth_nic_base + ADD_PORT);
  395. continue; }
  396. else if (get_eeprom_data(START_EEPROM_DATA,CHKSUM_LEN,
  397. eeprom_buff) < 0) {
  398. printf("\ncs: EEPROM read failed...\n");
  399. outw(PP_ChipID, eth_nic_base + ADD_PORT);
  400. continue; }
  401. else if (get_eeprom_chksum(START_EEPROM_DATA,CHKSUM_LEN,
  402. eeprom_buff) < 0) {
  403. printf("\ncs: EEPROM checksum bad...\n");
  404. outw(PP_ChipID, eth_nic_base + ADD_PORT);
  405. continue; }
  406. /* get transmission control word but keep the
  407. autonegotiation bits */
  408. eth_auto_neg_cnf = eeprom_buff[AUTO_NEG_CNF_OFFSET/2];
  409. /* Store adapter configuration */
  410. eth_adapter_cnf = eeprom_buff[ADAPTER_CNF_OFFSET/2];
  411. /* Store ISA configuration */
  412. isa_cnf = eeprom_buff[ISA_CNF_OFFSET/2];
  413. /* store the initial memory base address */
  414. eth_mem_start = eeprom_buff[PACKET_PAGE_OFFSET/2] << 8;
  415. printf("%s%s%s, addr ",
  416. (eth_adapter_cnf & A_CNF_10B_T)?", RJ-45":"",
  417. (eth_adapter_cnf & A_CNF_AUI)?", AUI":"",
  418. (eth_adapter_cnf & A_CNF_10B_2)?", BNC":"");
  419. /* If this is a CS8900 then no pnp soft */
  420. if (eth_cs_type != CS8900 &&
  421. /* Check if the ISA IRQ has been set */
  422. (i = readreg(PP_CS8920_ISAINT) & 0xff,
  423. (i != 0 && i < CS8920_NO_INTS)))
  424. eth_irq = i;
  425. else {
  426. i = isa_cnf & INT_NO_MASK;
  427. if (eth_cs_type == CS8900) {
  428. /* the table that follows is dependent
  429. upon how you wired up your cs8900
  430. in your system. The table is the
  431. same as the cs8900 engineering demo
  432. board. irq_map also depends on the
  433. contents of the table. Also see
  434. write_irq, which is the reverse
  435. mapping of the table below. */
  436. if (i < 4) i = "\012\013\014\005"[i];
  437. else printf("\ncs: BUG: isa_config is %d\n", i); }
  438. eth_irq = i; }
  439. /* Retrieve and print the ethernet address. */
  440. for (i=0; i<ETH_ALEN; i++) {
  441. nic->node_addr[i] = ((unsigned char *)eeprom_buff)[i];
  442. }
  443. printf("%!\n", nic->node_addr);
  444. /* Set the LineCTL quintuplet based on adapter
  445. configuration read from EEPROM */
  446. if ((eth_adapter_cnf & A_CNF_EXTND_10B_2) &&
  447. (eth_adapter_cnf & A_CNF_LOW_RX_SQUELCH))
  448. eth_linectl = LOW_RX_SQUELCH;
  449. else
  450. eth_linectl = 0;
  451. /* check to make sure that they have the "right"
  452. hardware available */
  453. switch(eth_adapter_cnf & A_CNF_MEDIA_TYPE) {
  454. case A_CNF_MEDIA_10B_T: result = eth_adapter_cnf & A_CNF_10B_T;
  455. break;
  456. case A_CNF_MEDIA_AUI: result = eth_adapter_cnf & A_CNF_AUI;
  457. break;
  458. case A_CNF_MEDIA_10B_2: result = eth_adapter_cnf & A_CNF_10B_2;
  459. break;
  460. default: result = eth_adapter_cnf & (A_CNF_10B_T | A_CNF_AUI |
  461. A_CNF_10B_2);
  462. }
  463. if (!result) {
  464. printf("cs: EEPROM is configured for unavailable media\n");
  465. error:
  466. writereg(PP_LineCTL, readreg(PP_LineCTL) &
  467. ~(SERIAL_TX_ON | SERIAL_RX_ON));
  468. outw(PP_ChipID, eth_nic_base + ADD_PORT);
  469. continue;
  470. }
  471. /* Initialize the card for probing of the attached media */
  472. cs89x0_reset(nic);
  473. /* set the hardware to the configured choice */
  474. switch(eth_adapter_cnf & A_CNF_MEDIA_TYPE) {
  475. case A_CNF_MEDIA_10B_T:
  476. result = detect_tp();
  477. if (!result) {
  478. clrline();
  479. printf("10Base-T (RJ-45%s",
  480. ") has no cable\n"); }
  481. /* check "ignore missing media" bit */
  482. if (eth_auto_neg_cnf & IMM_BIT)
  483. /* Yes! I don't care if I see a link pulse */
  484. result = A_CNF_MEDIA_10B_T;
  485. break;
  486. case A_CNF_MEDIA_AUI:
  487. result = detect_aui(nic);
  488. if (!result) {
  489. clrline();
  490. printf("10Base-5 (AUI%s",
  491. ") has no cable\n"); }
  492. /* check "ignore missing media" bit */
  493. if (eth_auto_neg_cnf & IMM_BIT)
  494. /* Yes! I don't care if I see a carrrier */
  495. result = A_CNF_MEDIA_AUI;
  496. break;
  497. case A_CNF_MEDIA_10B_2:
  498. result = detect_bnc(nic);
  499. if (!result) {
  500. clrline();
  501. printf("10Base-2 (BNC%s",
  502. ") has no cable\n"); }
  503. /* check "ignore missing media" bit */
  504. if (eth_auto_neg_cnf & IMM_BIT)
  505. /* Yes! I don't care if I can xmit a packet */
  506. result = A_CNF_MEDIA_10B_2;
  507. break;
  508. case A_CNF_MEDIA_AUTO:
  509. writereg(PP_LineCTL, eth_linectl | AUTO_AUI_10BASET);
  510. if (eth_adapter_cnf & A_CNF_10B_T)
  511. if ((result = detect_tp()) != 0)
  512. break;
  513. if (eth_adapter_cnf & A_CNF_AUI)
  514. if ((result = detect_aui(nic)) != 0)
  515. break;
  516. if (eth_adapter_cnf & A_CNF_10B_2)
  517. if ((result = detect_bnc(nic)) != 0)
  518. break;
  519. clrline(); printf("no media detected\n");
  520. goto error;
  521. }
  522. clrline();
  523. switch(result) {
  524. case 0: printf("no network cable attached to configured media\n");
  525. goto error;
  526. case A_CNF_MEDIA_10B_T: printf("using 10Base-T (RJ-45)\n");
  527. break;
  528. case A_CNF_MEDIA_AUI: printf("using 10Base-5 (AUI)\n");
  529. break;
  530. case A_CNF_MEDIA_10B_2: printf("using 10Base-2 (BNC)\n");
  531. break;
  532. }
  533. /* Turn on both receive and transmit operations */
  534. writereg(PP_LineCTL, readreg(PP_LineCTL) | SERIAL_RX_ON |
  535. SERIAL_TX_ON);
  536. break;
  537. }
  538. if (ioaddr == 0)
  539. return (0);
  540. nic->reset = cs89x0_reset;
  541. nic->poll = cs89x0_poll;
  542. nic->transmit = cs89x0_transmit;
  543. nic->disable = cs89x0_disable;
  544. return (nic);
  545. }
  546. /*
  547. * Local variables:
  548. * c-basic-offset: 8
  549. * End:
  550. */