lra-eliminations.c 47 KB

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  1. /* Code for RTL register eliminations.
  2. Copyright (C) 2010-2015 Free Software Foundation, Inc.
  3. Contributed by Vladimir Makarov <vmakarov@redhat.com>.
  4. This file is part of GCC.
  5. GCC is free software; you can redistribute it and/or modify it under
  6. the terms of the GNU General Public License as published by the Free
  7. Software Foundation; either version 3, or (at your option) any later
  8. version.
  9. GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  10. WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with GCC; see the file COPYING3. If not see
  15. <http://www.gnu.org/licenses/>. */
  16. /* Eliminable registers (like a soft argument or frame pointer) are
  17. widely used in RTL. These eliminable registers should be replaced
  18. by real hard registers (like the stack pointer or hard frame
  19. pointer) plus some offset. The offsets usually change whenever the
  20. stack is expanded. We know the final offsets only at the very end
  21. of LRA.
  22. Within LRA, we usually keep the RTL in such a state that the
  23. eliminable registers can be replaced by just the corresponding hard
  24. register (without any offset). To achieve this we should add the
  25. initial elimination offset at the beginning of LRA and update the
  26. offsets whenever the stack is expanded. We need to do this before
  27. every constraint pass because the choice of offset often affects
  28. whether a particular address or memory constraint is satisfied.
  29. We keep RTL code at most time in such state that the virtual
  30. registers can be changed by just the corresponding hard registers
  31. (with zero offsets) and we have the right RTL code. To achieve this
  32. we should add initial offset at the beginning of LRA work and update
  33. offsets after each stack expanding. But actually we update virtual
  34. registers to the same virtual registers + corresponding offsets
  35. before every constraint pass because it affects constraint
  36. satisfaction (e.g. an address displacement became too big for some
  37. target).
  38. The final change of eliminable registers to the corresponding hard
  39. registers are done at the very end of LRA when there were no change
  40. in offsets anymore:
  41. fp + 42 => sp + 42
  42. */
  43. #include "config.h"
  44. #include "system.h"
  45. #include "coretypes.h"
  46. #include "tm.h"
  47. #include "hard-reg-set.h"
  48. #include "rtl.h"
  49. #include "tm_p.h"
  50. #include "regs.h"
  51. #include "insn-config.h"
  52. #include "insn-codes.h"
  53. #include "recog.h"
  54. #include "output.h"
  55. #include "addresses.h"
  56. #include "target.h"
  57. #include "hashtab.h"
  58. #include "hash-set.h"
  59. #include "vec.h"
  60. #include "machmode.h"
  61. #include "input.h"
  62. #include "function.h"
  63. #include "symtab.h"
  64. #include "flags.h"
  65. #include "statistics.h"
  66. #include "double-int.h"
  67. #include "real.h"
  68. #include "fixed-value.h"
  69. #include "alias.h"
  70. #include "wide-int.h"
  71. #include "inchash.h"
  72. #include "tree.h"
  73. #include "expmed.h"
  74. #include "dojump.h"
  75. #include "explow.h"
  76. #include "calls.h"
  77. #include "emit-rtl.h"
  78. #include "varasm.h"
  79. #include "stmt.h"
  80. #include "expr.h"
  81. #include "predict.h"
  82. #include "dominance.h"
  83. #include "cfg.h"
  84. #include "basic-block.h"
  85. #include "except.h"
  86. #include "optabs.h"
  87. #include "df.h"
  88. #include "ira.h"
  89. #include "rtl-error.h"
  90. #include "lra-int.h"
  91. /* This structure is used to record information about hard register
  92. eliminations. */
  93. struct lra_elim_table
  94. {
  95. /* Hard register number to be eliminated. */
  96. int from;
  97. /* Hard register number used as replacement. */
  98. int to;
  99. /* Difference between values of the two hard registers above on
  100. previous iteration. */
  101. HOST_WIDE_INT previous_offset;
  102. /* Difference between the values on the current iteration. */
  103. HOST_WIDE_INT offset;
  104. /* Nonzero if this elimination can be done. */
  105. bool can_eliminate;
  106. /* CAN_ELIMINATE since the last check. */
  107. bool prev_can_eliminate;
  108. /* REG rtx for the register to be eliminated. We cannot simply
  109. compare the number since we might then spuriously replace a hard
  110. register corresponding to a pseudo assigned to the reg to be
  111. eliminated. */
  112. rtx from_rtx;
  113. /* REG rtx for the replacement. */
  114. rtx to_rtx;
  115. };
  116. /* The elimination table. Each array entry describes one possible way
  117. of eliminating a register in favor of another. If there is more
  118. than one way of eliminating a particular register, the most
  119. preferred should be specified first. */
  120. static struct lra_elim_table *reg_eliminate = 0;
  121. /* This is an intermediate structure to initialize the table. It has
  122. exactly the members provided by ELIMINABLE_REGS. */
  123. static const struct elim_table_1
  124. {
  125. const int from;
  126. const int to;
  127. } reg_eliminate_1[] =
  128. /* If a set of eliminable hard registers was specified, define the
  129. table from it. Otherwise, default to the normal case of the frame
  130. pointer being replaced by the stack pointer. */
  131. #ifdef ELIMINABLE_REGS
  132. ELIMINABLE_REGS;
  133. #else
  134. {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}};
  135. #endif
  136. #define NUM_ELIMINABLE_REGS ARRAY_SIZE (reg_eliminate_1)
  137. /* Print info about elimination table to file F. */
  138. static void
  139. print_elim_table (FILE *f)
  140. {
  141. struct lra_elim_table *ep;
  142. for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
  143. fprintf (f, "%s eliminate %d to %d (offset=" HOST_WIDE_INT_PRINT_DEC
  144. ", prev_offset=" HOST_WIDE_INT_PRINT_DEC ")\n",
  145. ep->can_eliminate ? "Can" : "Can't",
  146. ep->from, ep->to, ep->offset, ep->previous_offset);
  147. }
  148. /* Print info about elimination table to stderr. */
  149. void
  150. lra_debug_elim_table (void)
  151. {
  152. print_elim_table (stderr);
  153. }
  154. /* Setup possibility of elimination in elimination table element EP to
  155. VALUE. Setup FRAME_POINTER_NEEDED if elimination from frame
  156. pointer to stack pointer is not possible anymore. */
  157. static void
  158. setup_can_eliminate (struct lra_elim_table *ep, bool value)
  159. {
  160. ep->can_eliminate = ep->prev_can_eliminate = value;
  161. if (! value
  162. && ep->from == FRAME_POINTER_REGNUM && ep->to == STACK_POINTER_REGNUM)
  163. frame_pointer_needed = 1;
  164. if (!frame_pointer_needed)
  165. REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = 0;
  166. }
  167. /* Map: eliminable "from" register -> its current elimination,
  168. or NULL if none. The elimination table may contain more than
  169. one elimination for the same hard register, but this map specifies
  170. the one that we are currently using. */
  171. static struct lra_elim_table *elimination_map[FIRST_PSEUDO_REGISTER];
  172. /* When an eliminable hard register becomes not eliminable, we use the
  173. following special structure to restore original offsets for the
  174. register. */
  175. static struct lra_elim_table self_elim_table;
  176. /* Offsets should be used to restore original offsets for eliminable
  177. hard register which just became not eliminable. Zero,
  178. otherwise. */
  179. static HOST_WIDE_INT self_elim_offsets[FIRST_PSEUDO_REGISTER];
  180. /* Map: hard regno -> RTL presentation. RTL presentations of all
  181. potentially eliminable hard registers are stored in the map. */
  182. static rtx eliminable_reg_rtx[FIRST_PSEUDO_REGISTER];
  183. /* Set up ELIMINATION_MAP of the currently used eliminations. */
  184. static void
  185. setup_elimination_map (void)
  186. {
  187. int i;
  188. struct lra_elim_table *ep;
  189. for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
  190. elimination_map[i] = NULL;
  191. for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
  192. if (ep->can_eliminate && elimination_map[ep->from] == NULL)
  193. elimination_map[ep->from] = ep;
  194. }
  195. /* Compute the sum of X and Y, making canonicalizations assumed in an
  196. address, namely: sum constant integers, surround the sum of two
  197. constants with a CONST, put the constant as the second operand, and
  198. group the constant on the outermost sum.
  199. This routine assumes both inputs are already in canonical form. */
  200. static rtx
  201. form_sum (rtx x, rtx y)
  202. {
  203. rtx tem;
  204. machine_mode mode = GET_MODE (x);
  205. if (mode == VOIDmode)
  206. mode = GET_MODE (y);
  207. if (mode == VOIDmode)
  208. mode = Pmode;
  209. if (CONST_INT_P (x))
  210. return plus_constant (mode, y, INTVAL (x));
  211. else if (CONST_INT_P (y))
  212. return plus_constant (mode, x, INTVAL (y));
  213. else if (CONSTANT_P (x))
  214. tem = x, x = y, y = tem;
  215. if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
  216. return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
  217. /* Note that if the operands of Y are specified in the opposite
  218. order in the recursive calls below, infinite recursion will
  219. occur. */
  220. if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
  221. return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
  222. /* If both constant, encapsulate sum. Otherwise, just form sum. A
  223. constant will have been placed second. */
  224. if (CONSTANT_P (x) && CONSTANT_P (y))
  225. {
  226. if (GET_CODE (x) == CONST)
  227. x = XEXP (x, 0);
  228. if (GET_CODE (y) == CONST)
  229. y = XEXP (y, 0);
  230. return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
  231. }
  232. return gen_rtx_PLUS (mode, x, y);
  233. }
  234. /* Return the current substitution hard register of the elimination of
  235. HARD_REGNO. If HARD_REGNO is not eliminable, return itself. */
  236. int
  237. lra_get_elimination_hard_regno (int hard_regno)
  238. {
  239. struct lra_elim_table *ep;
  240. if (hard_regno < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
  241. return hard_regno;
  242. if ((ep = elimination_map[hard_regno]) == NULL)
  243. return hard_regno;
  244. return ep->to;
  245. }
  246. /* Return elimination which will be used for hard reg REG, NULL
  247. otherwise. */
  248. static struct lra_elim_table *
  249. get_elimination (rtx reg)
  250. {
  251. int hard_regno;
  252. struct lra_elim_table *ep;
  253. HOST_WIDE_INT offset;
  254. lra_assert (REG_P (reg));
  255. if ((hard_regno = REGNO (reg)) < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
  256. return NULL;
  257. if ((ep = elimination_map[hard_regno]) != NULL)
  258. return ep->from_rtx != reg ? NULL : ep;
  259. if ((offset = self_elim_offsets[hard_regno]) == 0)
  260. return NULL;
  261. /* This is an iteration to restore offsets just after HARD_REGNO
  262. stopped to be eliminable. */
  263. self_elim_table.from = self_elim_table.to = hard_regno;
  264. self_elim_table.from_rtx
  265. = self_elim_table.to_rtx
  266. = eliminable_reg_rtx[hard_regno];
  267. lra_assert (self_elim_table.from_rtx != NULL);
  268. self_elim_table.offset = offset;
  269. return &self_elim_table;
  270. }
  271. /* Scan X and replace any eliminable registers (such as fp) with a
  272. replacement (such as sp) if SUBST_P, plus an offset. The offset is
  273. a change in the offset between the eliminable register and its
  274. substitution if UPDATE_P, or the full offset if FULL_P, or
  275. otherwise zero. If FULL_P, we also use the SP offsets for
  276. elimination to SP. If UPDATE_P, use UPDATE_SP_OFFSET for updating
  277. offsets of register elimnable to SP. If UPDATE_SP_OFFSET is
  278. non-zero, don't use difference of the offset and the previous
  279. offset.
  280. MEM_MODE is the mode of an enclosing MEM. We need this to know how
  281. much to adjust a register for, e.g., PRE_DEC. Also, if we are
  282. inside a MEM, we are allowed to replace a sum of a hard register
  283. and the constant zero with the hard register, which we cannot do
  284. outside a MEM. In addition, we need to record the fact that a
  285. hard register is referenced outside a MEM.
  286. If we make full substitution to SP for non-null INSN, add the insn
  287. sp offset. */
  288. rtx
  289. lra_eliminate_regs_1 (rtx_insn *insn, rtx x, machine_mode mem_mode,
  290. bool subst_p, bool update_p,
  291. HOST_WIDE_INT update_sp_offset, bool full_p)
  292. {
  293. enum rtx_code code = GET_CODE (x);
  294. struct lra_elim_table *ep;
  295. rtx new_rtx;
  296. int i, j;
  297. const char *fmt;
  298. int copied = 0;
  299. lra_assert (!update_p || !full_p);
  300. lra_assert (update_sp_offset == 0 || (!subst_p && update_p && !full_p));
  301. if (! current_function_decl)
  302. return x;
  303. switch (code)
  304. {
  305. CASE_CONST_ANY:
  306. case CONST:
  307. case SYMBOL_REF:
  308. case CODE_LABEL:
  309. case PC:
  310. case CC0:
  311. case ASM_INPUT:
  312. case ADDR_VEC:
  313. case ADDR_DIFF_VEC:
  314. case RETURN:
  315. return x;
  316. case REG:
  317. /* First handle the case where we encounter a bare hard register
  318. that is eliminable. Replace it with a PLUS. */
  319. if ((ep = get_elimination (x)) != NULL)
  320. {
  321. rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
  322. if (update_sp_offset != 0)
  323. {
  324. if (ep->to_rtx == stack_pointer_rtx)
  325. return plus_constant (Pmode, to, update_sp_offset);
  326. return to;
  327. }
  328. else if (update_p)
  329. return plus_constant (Pmode, to, ep->offset - ep->previous_offset);
  330. else if (full_p)
  331. return plus_constant (Pmode, to,
  332. ep->offset
  333. - (insn != NULL_RTX
  334. && ep->to_rtx == stack_pointer_rtx
  335. ? lra_get_insn_recog_data (insn)->sp_offset
  336. : 0));
  337. else
  338. return to;
  339. }
  340. return x;
  341. case PLUS:
  342. /* If this is the sum of an eliminable register and a constant, rework
  343. the sum. */
  344. if (REG_P (XEXP (x, 0)) && CONSTANT_P (XEXP (x, 1)))
  345. {
  346. if ((ep = get_elimination (XEXP (x, 0))) != NULL)
  347. {
  348. HOST_WIDE_INT offset;
  349. rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
  350. if (! update_p && ! full_p)
  351. return gen_rtx_PLUS (Pmode, to, XEXP (x, 1));
  352. if (update_sp_offset != 0)
  353. offset = ep->to_rtx == stack_pointer_rtx ? update_sp_offset : 0;
  354. else
  355. offset = (update_p
  356. ? ep->offset - ep->previous_offset : ep->offset);
  357. if (full_p && insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx)
  358. offset -= lra_get_insn_recog_data (insn)->sp_offset;
  359. if (CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) == -offset)
  360. return to;
  361. else
  362. return gen_rtx_PLUS (Pmode, to,
  363. plus_constant (Pmode,
  364. XEXP (x, 1), offset));
  365. }
  366. /* If the hard register is not eliminable, we are done since
  367. the other operand is a constant. */
  368. return x;
  369. }
  370. /* If this is part of an address, we want to bring any constant
  371. to the outermost PLUS. We will do this by doing hard
  372. register replacement in our operands and seeing if a constant
  373. shows up in one of them.
  374. Note that there is no risk of modifying the structure of the
  375. insn, since we only get called for its operands, thus we are
  376. either modifying the address inside a MEM, or something like
  377. an address operand of a load-address insn. */
  378. {
  379. rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
  380. subst_p, update_p,
  381. update_sp_offset, full_p);
  382. rtx new1 = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
  383. subst_p, update_p,
  384. update_sp_offset, full_p);
  385. if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
  386. return form_sum (new0, new1);
  387. }
  388. return x;
  389. case MULT:
  390. /* If this is the product of an eliminable hard register and a
  391. constant, apply the distribute law and move the constant out
  392. so that we have (plus (mult ..) ..). This is needed in order
  393. to keep load-address insns valid. This case is pathological.
  394. We ignore the possibility of overflow here. */
  395. if (REG_P (XEXP (x, 0)) && CONST_INT_P (XEXP (x, 1))
  396. && (ep = get_elimination (XEXP (x, 0))) != NULL)
  397. {
  398. rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
  399. if (update_sp_offset != 0)
  400. {
  401. if (ep->to_rtx == stack_pointer_rtx)
  402. return plus_constant (Pmode,
  403. gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
  404. update_sp_offset * INTVAL (XEXP (x, 1)));
  405. return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
  406. }
  407. else if (update_p)
  408. return plus_constant (Pmode,
  409. gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
  410. (ep->offset - ep->previous_offset)
  411. * INTVAL (XEXP (x, 1)));
  412. else if (full_p)
  413. {
  414. HOST_WIDE_INT offset = ep->offset;
  415. if (insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx)
  416. offset -= lra_get_insn_recog_data (insn)->sp_offset;
  417. return
  418. plus_constant (Pmode,
  419. gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
  420. offset * INTVAL (XEXP (x, 1)));
  421. }
  422. else
  423. return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
  424. }
  425. /* ... fall through ... */
  426. case CALL:
  427. case COMPARE:
  428. /* See comments before PLUS about handling MINUS. */
  429. case MINUS:
  430. case DIV: case UDIV:
  431. case MOD: case UMOD:
  432. case AND: case IOR: case XOR:
  433. case ROTATERT: case ROTATE:
  434. case ASHIFTRT: case LSHIFTRT: case ASHIFT:
  435. case NE: case EQ:
  436. case GE: case GT: case GEU: case GTU:
  437. case LE: case LT: case LEU: case LTU:
  438. {
  439. rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
  440. subst_p, update_p,
  441. update_sp_offset, full_p);
  442. rtx new1 = XEXP (x, 1)
  443. ? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
  444. subst_p, update_p,
  445. update_sp_offset, full_p) : 0;
  446. if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
  447. return gen_rtx_fmt_ee (code, GET_MODE (x), new0, new1);
  448. }
  449. return x;
  450. case EXPR_LIST:
  451. /* If we have something in XEXP (x, 0), the usual case,
  452. eliminate it. */
  453. if (XEXP (x, 0))
  454. {
  455. new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
  456. subst_p, update_p,
  457. update_sp_offset, full_p);
  458. if (new_rtx != XEXP (x, 0))
  459. {
  460. /* If this is a REG_DEAD note, it is not valid anymore.
  461. Using the eliminated version could result in creating a
  462. REG_DEAD note for the stack or frame pointer. */
  463. if (REG_NOTE_KIND (x) == REG_DEAD)
  464. return (XEXP (x, 1)
  465. ? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
  466. subst_p, update_p,
  467. update_sp_offset, full_p)
  468. : NULL_RTX);
  469. x = alloc_reg_note (REG_NOTE_KIND (x), new_rtx, XEXP (x, 1));
  470. }
  471. }
  472. /* ... fall through ... */
  473. case INSN_LIST:
  474. case INT_LIST:
  475. /* Now do eliminations in the rest of the chain. If this was
  476. an EXPR_LIST, this might result in allocating more memory than is
  477. strictly needed, but it simplifies the code. */
  478. if (XEXP (x, 1))
  479. {
  480. new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
  481. subst_p, update_p,
  482. update_sp_offset, full_p);
  483. if (new_rtx != XEXP (x, 1))
  484. return
  485. gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x),
  486. XEXP (x, 0), new_rtx);
  487. }
  488. return x;
  489. case PRE_INC:
  490. case POST_INC:
  491. case PRE_DEC:
  492. case POST_DEC:
  493. /* We do not support elimination of a register that is modified.
  494. elimination_effects has already make sure that this does not
  495. happen. */
  496. return x;
  497. case PRE_MODIFY:
  498. case POST_MODIFY:
  499. /* We do not support elimination of a hard register that is
  500. modified. LRA has already make sure that this does not
  501. happen. The only remaining case we need to consider here is
  502. that the increment value may be an eliminable register. */
  503. if (GET_CODE (XEXP (x, 1)) == PLUS
  504. && XEXP (XEXP (x, 1), 0) == XEXP (x, 0))
  505. {
  506. rtx new_rtx = lra_eliminate_regs_1 (insn, XEXP (XEXP (x, 1), 1),
  507. mem_mode, subst_p, update_p,
  508. update_sp_offset, full_p);
  509. if (new_rtx != XEXP (XEXP (x, 1), 1))
  510. return gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (x, 0),
  511. gen_rtx_PLUS (GET_MODE (x),
  512. XEXP (x, 0), new_rtx));
  513. }
  514. return x;
  515. case STRICT_LOW_PART:
  516. case NEG: case NOT:
  517. case SIGN_EXTEND: case ZERO_EXTEND:
  518. case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE:
  519. case FLOAT: case FIX:
  520. case UNSIGNED_FIX: case UNSIGNED_FLOAT:
  521. case ABS:
  522. case SQRT:
  523. case FFS:
  524. case CLZ:
  525. case CTZ:
  526. case POPCOUNT:
  527. case PARITY:
  528. case BSWAP:
  529. new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
  530. subst_p, update_p,
  531. update_sp_offset, full_p);
  532. if (new_rtx != XEXP (x, 0))
  533. return gen_rtx_fmt_e (code, GET_MODE (x), new_rtx);
  534. return x;
  535. case SUBREG:
  536. new_rtx = lra_eliminate_regs_1 (insn, SUBREG_REG (x), mem_mode,
  537. subst_p, update_p,
  538. update_sp_offset, full_p);
  539. if (new_rtx != SUBREG_REG (x))
  540. {
  541. int x_size = GET_MODE_SIZE (GET_MODE (x));
  542. int new_size = GET_MODE_SIZE (GET_MODE (new_rtx));
  543. if (MEM_P (new_rtx) && x_size <= new_size)
  544. {
  545. SUBREG_REG (x) = new_rtx;
  546. alter_subreg (&x, false);
  547. return x;
  548. }
  549. else if (! subst_p)
  550. {
  551. /* LRA can transform subregs itself. So don't call
  552. simplify_gen_subreg until LRA transformations are
  553. finished. Function simplify_gen_subreg can do
  554. non-trivial transformations (like truncation) which
  555. might make LRA work to fail. */
  556. SUBREG_REG (x) = new_rtx;
  557. return x;
  558. }
  559. else
  560. return simplify_gen_subreg (GET_MODE (x), new_rtx,
  561. GET_MODE (new_rtx), SUBREG_BYTE (x));
  562. }
  563. return x;
  564. case MEM:
  565. /* Our only special processing is to pass the mode of the MEM to our
  566. recursive call and copy the flags. While we are here, handle this
  567. case more efficiently. */
  568. return
  569. replace_equiv_address_nv
  570. (x,
  571. lra_eliminate_regs_1 (insn, XEXP (x, 0), GET_MODE (x),
  572. subst_p, update_p, update_sp_offset, full_p));
  573. case USE:
  574. /* Handle insn_list USE that a call to a pure function may generate. */
  575. new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), VOIDmode,
  576. subst_p, update_p, update_sp_offset, full_p);
  577. if (new_rtx != XEXP (x, 0))
  578. return gen_rtx_USE (GET_MODE (x), new_rtx);
  579. return x;
  580. case CLOBBER:
  581. case SET:
  582. gcc_unreachable ();
  583. default:
  584. break;
  585. }
  586. /* Process each of our operands recursively. If any have changed, make a
  587. copy of the rtx. */
  588. fmt = GET_RTX_FORMAT (code);
  589. for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
  590. {
  591. if (*fmt == 'e')
  592. {
  593. new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, i), mem_mode,
  594. subst_p, update_p,
  595. update_sp_offset, full_p);
  596. if (new_rtx != XEXP (x, i) && ! copied)
  597. {
  598. x = shallow_copy_rtx (x);
  599. copied = 1;
  600. }
  601. XEXP (x, i) = new_rtx;
  602. }
  603. else if (*fmt == 'E')
  604. {
  605. int copied_vec = 0;
  606. for (j = 0; j < XVECLEN (x, i); j++)
  607. {
  608. new_rtx = lra_eliminate_regs_1 (insn, XVECEXP (x, i, j), mem_mode,
  609. subst_p, update_p,
  610. update_sp_offset, full_p);
  611. if (new_rtx != XVECEXP (x, i, j) && ! copied_vec)
  612. {
  613. rtvec new_v = gen_rtvec_v (XVECLEN (x, i),
  614. XVEC (x, i)->elem);
  615. if (! copied)
  616. {
  617. x = shallow_copy_rtx (x);
  618. copied = 1;
  619. }
  620. XVEC (x, i) = new_v;
  621. copied_vec = 1;
  622. }
  623. XVECEXP (x, i, j) = new_rtx;
  624. }
  625. }
  626. }
  627. return x;
  628. }
  629. /* This function is used externally in subsequent passes of GCC. It
  630. always does a full elimination of X. */
  631. rtx
  632. lra_eliminate_regs (rtx x, machine_mode mem_mode,
  633. rtx insn ATTRIBUTE_UNUSED)
  634. {
  635. return lra_eliminate_regs_1 (NULL, x, mem_mode, true, false, 0, true);
  636. }
  637. /* Stack pointer offset before the current insn relative to one at the
  638. func start. RTL insns can change SP explicitly. We keep the
  639. changes from one insn to another through this variable. */
  640. static HOST_WIDE_INT curr_sp_change;
  641. /* Scan rtx X for references to elimination source or target registers
  642. in contexts that would prevent the elimination from happening.
  643. Update the table of eliminables to reflect the changed state.
  644. MEM_MODE is the mode of an enclosing MEM rtx, or VOIDmode if not
  645. within a MEM. */
  646. static void
  647. mark_not_eliminable (rtx x, machine_mode mem_mode)
  648. {
  649. enum rtx_code code = GET_CODE (x);
  650. struct lra_elim_table *ep;
  651. int i, j;
  652. const char *fmt;
  653. switch (code)
  654. {
  655. case PRE_INC:
  656. case POST_INC:
  657. case PRE_DEC:
  658. case POST_DEC:
  659. case POST_MODIFY:
  660. case PRE_MODIFY:
  661. if (XEXP (x, 0) == stack_pointer_rtx
  662. && ((code != PRE_MODIFY && code != POST_MODIFY)
  663. || (GET_CODE (XEXP (x, 1)) == PLUS
  664. && XEXP (x, 0) == XEXP (XEXP (x, 1), 0)
  665. && CONST_INT_P (XEXP (XEXP (x, 1), 1)))))
  666. {
  667. int size = GET_MODE_SIZE (mem_mode);
  668. #ifdef PUSH_ROUNDING
  669. /* If more bytes than MEM_MODE are pushed, account for
  670. them. */
  671. size = PUSH_ROUNDING (size);
  672. #endif
  673. if (code == PRE_DEC || code == POST_DEC)
  674. curr_sp_change -= size;
  675. else if (code == PRE_INC || code == POST_INC)
  676. curr_sp_change += size;
  677. else if (code == PRE_MODIFY || code == POST_MODIFY)
  678. curr_sp_change += INTVAL (XEXP (XEXP (x, 1), 1));
  679. }
  680. else if (REG_P (XEXP (x, 0))
  681. && REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER)
  682. {
  683. /* If we modify the source of an elimination rule, disable
  684. it. Do the same if it is the destination and not the
  685. hard frame register. */
  686. for (ep = reg_eliminate;
  687. ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
  688. ep++)
  689. if (ep->from_rtx == XEXP (x, 0)
  690. || (ep->to_rtx == XEXP (x, 0)
  691. && ep->to_rtx != hard_frame_pointer_rtx))
  692. setup_can_eliminate (ep, false);
  693. }
  694. return;
  695. case USE:
  696. if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
  697. /* If using a hard register that is the source of an eliminate
  698. we still think can be performed, note it cannot be
  699. performed since we don't know how this hard register is
  700. used. */
  701. for (ep = reg_eliminate;
  702. ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
  703. ep++)
  704. if (ep->from_rtx == XEXP (x, 0)
  705. && ep->to_rtx != hard_frame_pointer_rtx)
  706. setup_can_eliminate (ep, false);
  707. return;
  708. case CLOBBER:
  709. if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
  710. /* If clobbering a hard register that is the replacement
  711. register for an elimination we still think can be
  712. performed, note that it cannot be performed. Otherwise, we
  713. need not be concerned about it. */
  714. for (ep = reg_eliminate;
  715. ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
  716. ep++)
  717. if (ep->to_rtx == XEXP (x, 0)
  718. && ep->to_rtx != hard_frame_pointer_rtx)
  719. setup_can_eliminate (ep, false);
  720. return;
  721. case SET:
  722. if (SET_DEST (x) == stack_pointer_rtx
  723. && GET_CODE (SET_SRC (x)) == PLUS
  724. && XEXP (SET_SRC (x), 0) == SET_DEST (x)
  725. && CONST_INT_P (XEXP (SET_SRC (x), 1)))
  726. {
  727. curr_sp_change += INTVAL (XEXP (SET_SRC (x), 1));
  728. return;
  729. }
  730. if (! REG_P (SET_DEST (x))
  731. || REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER)
  732. mark_not_eliminable (SET_DEST (x), mem_mode);
  733. else
  734. {
  735. /* See if this is setting the replacement hard register for
  736. an elimination.
  737. If DEST is the hard frame pointer, we do nothing because
  738. we assume that all assignments to the frame pointer are
  739. for non-local gotos and are being done at a time when
  740. they are valid and do not disturb anything else. Some
  741. machines want to eliminate a fake argument pointer (or
  742. even a fake frame pointer) with either the real frame
  743. pointer or the stack pointer. Assignments to the hard
  744. frame pointer must not prevent this elimination. */
  745. for (ep = reg_eliminate;
  746. ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
  747. ep++)
  748. if (ep->to_rtx == SET_DEST (x)
  749. && SET_DEST (x) != hard_frame_pointer_rtx)
  750. setup_can_eliminate (ep, false);
  751. }
  752. mark_not_eliminable (SET_SRC (x), mem_mode);
  753. return;
  754. case MEM:
  755. /* Our only special processing is to pass the mode of the MEM to
  756. our recursive call. */
  757. mark_not_eliminable (XEXP (x, 0), GET_MODE (x));
  758. return;
  759. default:
  760. break;
  761. }
  762. fmt = GET_RTX_FORMAT (code);
  763. for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
  764. {
  765. if (*fmt == 'e')
  766. mark_not_eliminable (XEXP (x, i), mem_mode);
  767. else if (*fmt == 'E')
  768. for (j = 0; j < XVECLEN (x, i); j++)
  769. mark_not_eliminable (XVECEXP (x, i, j), mem_mode);
  770. }
  771. }
  772. #ifdef HARD_FRAME_POINTER_REGNUM
  773. /* Find offset equivalence note for reg WHAT in INSN and return the
  774. found elmination offset. If the note is not found, return NULL.
  775. Remove the found note. */
  776. static rtx
  777. remove_reg_equal_offset_note (rtx insn, rtx what)
  778. {
  779. rtx link, *link_loc;
  780. for (link_loc = &REG_NOTES (insn);
  781. (link = *link_loc) != NULL_RTX;
  782. link_loc = &XEXP (link, 1))
  783. if (REG_NOTE_KIND (link) == REG_EQUAL
  784. && GET_CODE (XEXP (link, 0)) == PLUS
  785. && XEXP (XEXP (link, 0), 0) == what
  786. && CONST_INT_P (XEXP (XEXP (link, 0), 1)))
  787. {
  788. *link_loc = XEXP (link, 1);
  789. return XEXP (XEXP (link, 0), 1);
  790. }
  791. return NULL_RTX;
  792. }
  793. #endif
  794. /* Scan INSN and eliminate all eliminable hard registers in it.
  795. If REPLACE_P is true, do the replacement destructively. Also
  796. delete the insn as dead it if it is setting an eliminable register.
  797. If REPLACE_P is false, just update the offsets while keeping the
  798. base register the same. If FIRST_P, use the sp offset for
  799. elimination to sp. Otherwise, use UPDATE_SP_OFFSET for this. If
  800. UPDATE_SP_OFFSET is non-zero, don't use difference of the offset
  801. and the previous offset. Attach the note about used elimination
  802. for insns setting frame pointer to update elimination easy (without
  803. parsing already generated elimination insns to find offset
  804. previously used) in future. */
  805. void
  806. eliminate_regs_in_insn (rtx_insn *insn, bool replace_p, bool first_p,
  807. HOST_WIDE_INT update_sp_offset)
  808. {
  809. int icode = recog_memoized (insn);
  810. rtx old_set = single_set (insn);
  811. bool validate_p;
  812. int i;
  813. rtx substed_operand[MAX_RECOG_OPERANDS];
  814. rtx orig_operand[MAX_RECOG_OPERANDS];
  815. struct lra_elim_table *ep;
  816. rtx plus_src, plus_cst_src;
  817. lra_insn_recog_data_t id;
  818. struct lra_static_insn_data *static_id;
  819. if (icode < 0 && asm_noperands (PATTERN (insn)) < 0 && ! DEBUG_INSN_P (insn))
  820. {
  821. lra_assert (GET_CODE (PATTERN (insn)) == USE
  822. || GET_CODE (PATTERN (insn)) == CLOBBER
  823. || GET_CODE (PATTERN (insn)) == ASM_INPUT);
  824. return;
  825. }
  826. /* Check for setting an eliminable register. */
  827. if (old_set != 0 && REG_P (SET_DEST (old_set))
  828. && (ep = get_elimination (SET_DEST (old_set))) != NULL)
  829. {
  830. for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
  831. if (ep->from_rtx == SET_DEST (old_set) && ep->can_eliminate)
  832. {
  833. bool delete_p = replace_p;
  834. #ifdef HARD_FRAME_POINTER_REGNUM
  835. if (ep->from == FRAME_POINTER_REGNUM
  836. && ep->to == HARD_FRAME_POINTER_REGNUM)
  837. /* If this is setting the frame pointer register to the
  838. hardware frame pointer register and this is an
  839. elimination that will be done (tested above), this
  840. insn is really adjusting the frame pointer downward
  841. to compensate for the adjustment done before a
  842. nonlocal goto. */
  843. {
  844. rtx src = SET_SRC (old_set);
  845. rtx off = remove_reg_equal_offset_note (insn, ep->to_rtx);
  846. /* We should never process such insn with non-zero
  847. UPDATE_SP_OFFSET. */
  848. lra_assert (update_sp_offset == 0);
  849. if (off != NULL_RTX
  850. || src == ep->to_rtx
  851. || (GET_CODE (src) == PLUS
  852. && XEXP (src, 0) == ep->to_rtx
  853. && CONST_INT_P (XEXP (src, 1))))
  854. {
  855. HOST_WIDE_INT offset;
  856. if (replace_p)
  857. {
  858. SET_DEST (old_set) = ep->to_rtx;
  859. lra_update_insn_recog_data (insn);
  860. return;
  861. }
  862. offset = (off != NULL_RTX ? INTVAL (off)
  863. : src == ep->to_rtx ? 0 : INTVAL (XEXP (src, 1)));
  864. offset -= (ep->offset - ep->previous_offset);
  865. src = plus_constant (Pmode, ep->to_rtx, offset);
  866. /* First see if this insn remains valid when we
  867. make the change. If not, keep the INSN_CODE
  868. the same and let the constraint pass fit it
  869. up. */
  870. validate_change (insn, &SET_SRC (old_set), src, 1);
  871. validate_change (insn, &SET_DEST (old_set),
  872. ep->from_rtx, 1);
  873. if (! apply_change_group ())
  874. {
  875. SET_SRC (old_set) = src;
  876. SET_DEST (old_set) = ep->from_rtx;
  877. }
  878. lra_update_insn_recog_data (insn);
  879. /* Add offset note for future updates. */
  880. add_reg_note (insn, REG_EQUAL, src);
  881. return;
  882. }
  883. }
  884. #endif
  885. /* This insn isn't serving a useful purpose. We delete it
  886. when REPLACE is set. */
  887. if (delete_p)
  888. lra_delete_dead_insn (insn);
  889. return;
  890. }
  891. }
  892. /* We allow one special case which happens to work on all machines we
  893. currently support: a single set with the source or a REG_EQUAL
  894. note being a PLUS of an eliminable register and a constant. */
  895. plus_src = plus_cst_src = 0;
  896. if (old_set && REG_P (SET_DEST (old_set)))
  897. {
  898. if (GET_CODE (SET_SRC (old_set)) == PLUS)
  899. plus_src = SET_SRC (old_set);
  900. /* First see if the source is of the form (plus (...) CST). */
  901. if (plus_src
  902. && CONST_INT_P (XEXP (plus_src, 1)))
  903. plus_cst_src = plus_src;
  904. /* Check that the first operand of the PLUS is a hard reg or
  905. the lowpart subreg of one. */
  906. if (plus_cst_src)
  907. {
  908. rtx reg = XEXP (plus_cst_src, 0);
  909. if (GET_CODE (reg) == SUBREG && subreg_lowpart_p (reg))
  910. reg = SUBREG_REG (reg);
  911. if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
  912. plus_cst_src = 0;
  913. }
  914. }
  915. if (plus_cst_src)
  916. {
  917. rtx reg = XEXP (plus_cst_src, 0);
  918. HOST_WIDE_INT offset = INTVAL (XEXP (plus_cst_src, 1));
  919. if (GET_CODE (reg) == SUBREG)
  920. reg = SUBREG_REG (reg);
  921. if (REG_P (reg) && (ep = get_elimination (reg)) != NULL)
  922. {
  923. rtx to_rtx = replace_p ? ep->to_rtx : ep->from_rtx;
  924. if (! replace_p)
  925. {
  926. if (update_sp_offset == 0)
  927. offset += (ep->offset - ep->previous_offset);
  928. if (ep->to_rtx == stack_pointer_rtx)
  929. {
  930. if (first_p)
  931. offset -= lra_get_insn_recog_data (insn)->sp_offset;
  932. else
  933. offset += update_sp_offset;
  934. }
  935. offset = trunc_int_for_mode (offset, GET_MODE (plus_cst_src));
  936. }
  937. if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG)
  938. to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)), to_rtx);
  939. /* If we have a nonzero offset, and the source is already a
  940. simple REG, the following transformation would increase
  941. the cost of the insn by replacing a simple REG with (plus
  942. (reg sp) CST). So try only when we already had a PLUS
  943. before. */
  944. if (offset == 0 || plus_src)
  945. {
  946. rtx new_src = plus_constant (GET_MODE (to_rtx), to_rtx, offset);
  947. old_set = single_set (insn);
  948. /* First see if this insn remains valid when we make the
  949. change. If not, try to replace the whole pattern
  950. with a simple set (this may help if the original insn
  951. was a PARALLEL that was only recognized as single_set
  952. due to REG_UNUSED notes). If this isn't valid
  953. either, keep the INSN_CODE the same and let the
  954. constraint pass fix it up. */
  955. if (! validate_change (insn, &SET_SRC (old_set), new_src, 0))
  956. {
  957. rtx new_pat = gen_rtx_SET (VOIDmode,
  958. SET_DEST (old_set), new_src);
  959. if (! validate_change (insn, &PATTERN (insn), new_pat, 0))
  960. SET_SRC (old_set) = new_src;
  961. }
  962. lra_update_insn_recog_data (insn);
  963. /* This can't have an effect on elimination offsets, so skip
  964. right to the end. */
  965. return;
  966. }
  967. }
  968. }
  969. /* Eliminate all eliminable registers occurring in operands that
  970. can be handled by the constraint pass. */
  971. id = lra_get_insn_recog_data (insn);
  972. static_id = id->insn_static_data;
  973. validate_p = false;
  974. for (i = 0; i < static_id->n_operands; i++)
  975. {
  976. orig_operand[i] = *id->operand_loc[i];
  977. substed_operand[i] = *id->operand_loc[i];
  978. /* For an asm statement, every operand is eliminable. */
  979. if (icode < 0 || insn_data[icode].operand[i].eliminable)
  980. {
  981. /* Check for setting a hard register that we know about. */
  982. if (static_id->operand[i].type != OP_IN
  983. && REG_P (orig_operand[i]))
  984. {
  985. /* If we are assigning to a hard register that can be
  986. eliminated, it must be as part of a PARALLEL, since
  987. the code above handles single SETs. This reg can not
  988. be longer eliminated -- it is forced by
  989. mark_not_eliminable. */
  990. for (ep = reg_eliminate;
  991. ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
  992. ep++)
  993. lra_assert (ep->from_rtx != orig_operand[i]
  994. || ! ep->can_eliminate);
  995. }
  996. /* Companion to the above plus substitution, we can allow
  997. invariants as the source of a plain move. */
  998. substed_operand[i]
  999. = lra_eliminate_regs_1 (insn, *id->operand_loc[i], VOIDmode,
  1000. replace_p, ! replace_p && ! first_p,
  1001. update_sp_offset, first_p);
  1002. if (substed_operand[i] != orig_operand[i])
  1003. validate_p = true;
  1004. }
  1005. }
  1006. if (! validate_p)
  1007. return;
  1008. /* Substitute the operands; the new values are in the substed_operand
  1009. array. */
  1010. for (i = 0; i < static_id->n_operands; i++)
  1011. *id->operand_loc[i] = substed_operand[i];
  1012. for (i = 0; i < static_id->n_dups; i++)
  1013. *id->dup_loc[i] = substed_operand[(int) static_id->dup_num[i]];
  1014. /* If we had a move insn but now we don't, re-recognize it.
  1015. This will cause spurious re-recognition if the old move had a
  1016. PARALLEL since the new one still will, but we can't call
  1017. single_set without having put new body into the insn and the
  1018. re-recognition won't hurt in this rare case. */
  1019. id = lra_update_insn_recog_data (insn);
  1020. static_id = id->insn_static_data;
  1021. }
  1022. /* Spill pseudos which are assigned to hard registers in SET. Add
  1023. affected insns for processing in the subsequent constraint
  1024. pass. */
  1025. static void
  1026. spill_pseudos (HARD_REG_SET set)
  1027. {
  1028. int i;
  1029. bitmap_head to_process;
  1030. rtx_insn *insn;
  1031. if (hard_reg_set_empty_p (set))
  1032. return;
  1033. if (lra_dump_file != NULL)
  1034. {
  1035. fprintf (lra_dump_file, " Spilling non-eliminable hard regs:");
  1036. for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
  1037. if (TEST_HARD_REG_BIT (set, i))
  1038. fprintf (lra_dump_file, " %d", i);
  1039. fprintf (lra_dump_file, "\n");
  1040. }
  1041. bitmap_initialize (&to_process, &reg_obstack);
  1042. for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
  1043. if (lra_reg_info[i].nrefs != 0 && reg_renumber[i] >= 0
  1044. && overlaps_hard_reg_set_p (set,
  1045. PSEUDO_REGNO_MODE (i), reg_renumber[i]))
  1046. {
  1047. if (lra_dump_file != NULL)
  1048. fprintf (lra_dump_file, " Spilling r%d(%d)\n",
  1049. i, reg_renumber[i]);
  1050. reg_renumber[i] = -1;
  1051. bitmap_ior_into (&to_process, &lra_reg_info[i].insn_bitmap);
  1052. }
  1053. IOR_HARD_REG_SET (lra_no_alloc_regs, set);
  1054. for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
  1055. if (bitmap_bit_p (&to_process, INSN_UID (insn)))
  1056. {
  1057. lra_push_insn (insn);
  1058. lra_set_used_insn_alternative (insn, -1);
  1059. }
  1060. bitmap_clear (&to_process);
  1061. }
  1062. /* Update all offsets and possibility for elimination on eliminable
  1063. registers. Spill pseudos assigned to registers which are
  1064. uneliminable, update LRA_NO_ALLOC_REGS and ELIMINABLE_REG_SET. Add
  1065. insns to INSNS_WITH_CHANGED_OFFSETS containing eliminable hard
  1066. registers whose offsets should be changed. Return true if any
  1067. elimination offset changed. */
  1068. static bool
  1069. update_reg_eliminate (bitmap insns_with_changed_offsets)
  1070. {
  1071. bool prev, result;
  1072. struct lra_elim_table *ep, *ep1;
  1073. HARD_REG_SET temp_hard_reg_set;
  1074. /* Clear self elimination offsets. */
  1075. for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
  1076. self_elim_offsets[ep->from] = 0;
  1077. for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
  1078. {
  1079. /* If it is a currently used elimination: update the previous
  1080. offset. */
  1081. if (elimination_map[ep->from] == ep)
  1082. ep->previous_offset = ep->offset;
  1083. prev = ep->prev_can_eliminate;
  1084. setup_can_eliminate (ep, targetm.can_eliminate (ep->from, ep->to));
  1085. if (ep->can_eliminate && ! prev)
  1086. {
  1087. /* It is possible that not eliminable register becomes
  1088. eliminable because we took other reasons into account to
  1089. set up eliminable regs in the initial set up. Just
  1090. ignore new eliminable registers. */
  1091. setup_can_eliminate (ep, false);
  1092. continue;
  1093. }
  1094. if (ep->can_eliminate != prev && elimination_map[ep->from] == ep)
  1095. {
  1096. /* We cannot use this elimination anymore -- find another
  1097. one. */
  1098. if (lra_dump_file != NULL)
  1099. fprintf (lra_dump_file,
  1100. " Elimination %d to %d is not possible anymore\n",
  1101. ep->from, ep->to);
  1102. /* If after processing RTL we decides that SP can be used as
  1103. a result of elimination, it can not be changed. */
  1104. gcc_assert ((ep->to_rtx != stack_pointer_rtx)
  1105. || (ep->from < FIRST_PSEUDO_REGISTER
  1106. && fixed_regs [ep->from]));
  1107. /* Mark that is not eliminable anymore. */
  1108. elimination_map[ep->from] = NULL;
  1109. for (ep1 = ep + 1; ep1 < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep1++)
  1110. if (ep1->can_eliminate && ep1->from == ep->from)
  1111. break;
  1112. if (ep1 < &reg_eliminate[NUM_ELIMINABLE_REGS])
  1113. {
  1114. if (lra_dump_file != NULL)
  1115. fprintf (lra_dump_file, " Using elimination %d to %d now\n",
  1116. ep1->from, ep1->to);
  1117. lra_assert (ep1->previous_offset == 0);
  1118. ep1->previous_offset = ep->offset;
  1119. }
  1120. else
  1121. {
  1122. /* There is no elimination anymore just use the hard
  1123. register `from' itself. Setup self elimination
  1124. offset to restore the original offset values. */
  1125. if (lra_dump_file != NULL)
  1126. fprintf (lra_dump_file, " %d is not eliminable at all\n",
  1127. ep->from);
  1128. self_elim_offsets[ep->from] = -ep->offset;
  1129. if (ep->offset != 0)
  1130. bitmap_ior_into (insns_with_changed_offsets,
  1131. &lra_reg_info[ep->from].insn_bitmap);
  1132. }
  1133. }
  1134. #ifdef ELIMINABLE_REGS
  1135. INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, ep->offset);
  1136. #else
  1137. INITIAL_FRAME_POINTER_OFFSET (ep->offset);
  1138. #endif
  1139. }
  1140. setup_elimination_map ();
  1141. result = false;
  1142. CLEAR_HARD_REG_SET (temp_hard_reg_set);
  1143. for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
  1144. if (elimination_map[ep->from] == NULL)
  1145. SET_HARD_REG_BIT (temp_hard_reg_set, ep->from);
  1146. else if (elimination_map[ep->from] == ep)
  1147. {
  1148. /* Prevent the hard register into which we eliminate from
  1149. the usage for pseudos. */
  1150. if (ep->from != ep->to)
  1151. SET_HARD_REG_BIT (temp_hard_reg_set, ep->to);
  1152. if (ep->previous_offset != ep->offset)
  1153. {
  1154. bitmap_ior_into (insns_with_changed_offsets,
  1155. &lra_reg_info[ep->from].insn_bitmap);
  1156. /* Update offset when the eliminate offset have been
  1157. changed. */
  1158. lra_update_reg_val_offset (lra_reg_info[ep->from].val,
  1159. ep->offset - ep->previous_offset);
  1160. result = true;
  1161. }
  1162. }
  1163. IOR_HARD_REG_SET (lra_no_alloc_regs, temp_hard_reg_set);
  1164. AND_COMPL_HARD_REG_SET (eliminable_regset, temp_hard_reg_set);
  1165. spill_pseudos (temp_hard_reg_set);
  1166. return result;
  1167. }
  1168. /* Initialize the table of hard registers to eliminate.
  1169. Pre-condition: global flag frame_pointer_needed has been set before
  1170. calling this function. */
  1171. static void
  1172. init_elim_table (void)
  1173. {
  1174. struct lra_elim_table *ep;
  1175. #ifdef ELIMINABLE_REGS
  1176. bool value_p;
  1177. const struct elim_table_1 *ep1;
  1178. #endif
  1179. if (!reg_eliminate)
  1180. reg_eliminate = XCNEWVEC (struct lra_elim_table, NUM_ELIMINABLE_REGS);
  1181. memset (self_elim_offsets, 0, sizeof (self_elim_offsets));
  1182. /* Initiate member values which will be never changed. */
  1183. self_elim_table.can_eliminate = self_elim_table.prev_can_eliminate = true;
  1184. self_elim_table.previous_offset = 0;
  1185. #ifdef ELIMINABLE_REGS
  1186. for (ep = reg_eliminate, ep1 = reg_eliminate_1;
  1187. ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++, ep1++)
  1188. {
  1189. ep->offset = ep->previous_offset = 0;
  1190. ep->from = ep1->from;
  1191. ep->to = ep1->to;
  1192. value_p = (targetm.can_eliminate (ep->from, ep->to)
  1193. && ! (ep->to == STACK_POINTER_REGNUM
  1194. && frame_pointer_needed
  1195. && (! SUPPORTS_STACK_ALIGNMENT
  1196. || ! stack_realign_fp)));
  1197. setup_can_eliminate (ep, value_p);
  1198. }
  1199. #else
  1200. reg_eliminate[0].offset = reg_eliminate[0].previous_offset = 0;
  1201. reg_eliminate[0].from = reg_eliminate_1[0].from;
  1202. reg_eliminate[0].to = reg_eliminate_1[0].to;
  1203. setup_can_eliminate (&reg_eliminate[0], ! frame_pointer_needed);
  1204. #endif
  1205. /* Build the FROM and TO REG rtx's. Note that code in gen_rtx_REG
  1206. will cause, e.g., gen_rtx_REG (Pmode, STACK_POINTER_REGNUM) to
  1207. equal stack_pointer_rtx. We depend on this. Threfore we switch
  1208. off that we are in LRA temporarily. */
  1209. lra_in_progress = 0;
  1210. for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
  1211. {
  1212. ep->from_rtx = gen_rtx_REG (Pmode, ep->from);
  1213. ep->to_rtx = gen_rtx_REG (Pmode, ep->to);
  1214. eliminable_reg_rtx[ep->from] = ep->from_rtx;
  1215. }
  1216. lra_in_progress = 1;
  1217. }
  1218. /* Function for initialization of elimination once per function. It
  1219. sets up sp offset for each insn. */
  1220. static void
  1221. init_elimination (void)
  1222. {
  1223. bool stop_to_sp_elimination_p;
  1224. basic_block bb;
  1225. rtx_insn *insn;
  1226. struct lra_elim_table *ep;
  1227. init_elim_table ();
  1228. FOR_EACH_BB_FN (bb, cfun)
  1229. {
  1230. curr_sp_change = 0;
  1231. stop_to_sp_elimination_p = false;
  1232. FOR_BB_INSNS (bb, insn)
  1233. if (INSN_P (insn))
  1234. {
  1235. lra_get_insn_recog_data (insn)->sp_offset = curr_sp_change;
  1236. if (NONDEBUG_INSN_P (insn))
  1237. {
  1238. mark_not_eliminable (PATTERN (insn), VOIDmode);
  1239. if (curr_sp_change != 0
  1240. && find_reg_note (insn, REG_LABEL_OPERAND, NULL_RTX))
  1241. stop_to_sp_elimination_p = true;
  1242. }
  1243. }
  1244. if (! frame_pointer_needed
  1245. && (curr_sp_change != 0 || stop_to_sp_elimination_p)
  1246. && bb->succs && bb->succs->length () != 0)
  1247. for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
  1248. if (ep->to == STACK_POINTER_REGNUM)
  1249. setup_can_eliminate (ep, false);
  1250. }
  1251. setup_elimination_map ();
  1252. }
  1253. /* Eliminate hard reg given by its location LOC. */
  1254. void
  1255. lra_eliminate_reg_if_possible (rtx *loc)
  1256. {
  1257. int regno;
  1258. struct lra_elim_table *ep;
  1259. lra_assert (REG_P (*loc));
  1260. if ((regno = REGNO (*loc)) >= FIRST_PSEUDO_REGISTER
  1261. || ! TEST_HARD_REG_BIT (lra_no_alloc_regs, regno))
  1262. return;
  1263. if ((ep = get_elimination (*loc)) != NULL)
  1264. *loc = ep->to_rtx;
  1265. }
  1266. /* Do (final if FINAL_P or first if FIRST_P) elimination in INSN. Add
  1267. the insn for subsequent processing in the constraint pass, update
  1268. the insn info. */
  1269. static void
  1270. process_insn_for_elimination (rtx_insn *insn, bool final_p, bool first_p)
  1271. {
  1272. eliminate_regs_in_insn (insn, final_p, first_p, 0);
  1273. if (! final_p)
  1274. {
  1275. /* Check that insn changed its code. This is a case when a move
  1276. insn becomes an add insn and we do not want to process the
  1277. insn as a move anymore. */
  1278. int icode = recog (PATTERN (insn), insn, 0);
  1279. if (icode >= 0 && icode != INSN_CODE (insn))
  1280. {
  1281. INSN_CODE (insn) = icode;
  1282. lra_update_insn_recog_data (insn);
  1283. }
  1284. lra_update_insn_regno_info (insn);
  1285. lra_push_insn (insn);
  1286. lra_set_used_insn_alternative (insn, -1);
  1287. }
  1288. }
  1289. /* Entry function to do final elimination if FINAL_P or to update
  1290. elimination register offsets (FIRST_P if we are doing it the first
  1291. time). */
  1292. void
  1293. lra_eliminate (bool final_p, bool first_p)
  1294. {
  1295. unsigned int uid;
  1296. bitmap_head insns_with_changed_offsets;
  1297. bitmap_iterator bi;
  1298. struct lra_elim_table *ep;
  1299. gcc_assert (! final_p || ! first_p);
  1300. timevar_push (TV_LRA_ELIMINATE);
  1301. if (first_p)
  1302. init_elimination ();
  1303. bitmap_initialize (&insns_with_changed_offsets, &reg_obstack);
  1304. if (final_p)
  1305. {
  1306. #ifdef ENABLE_CHECKING
  1307. update_reg_eliminate (&insns_with_changed_offsets);
  1308. if (! bitmap_empty_p (&insns_with_changed_offsets))
  1309. gcc_unreachable ();
  1310. #endif
  1311. /* We change eliminable hard registers in insns so we should do
  1312. this for all insns containing any eliminable hard
  1313. register. */
  1314. for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
  1315. if (elimination_map[ep->from] != NULL)
  1316. bitmap_ior_into (&insns_with_changed_offsets,
  1317. &lra_reg_info[ep->from].insn_bitmap);
  1318. }
  1319. else if (! update_reg_eliminate (&insns_with_changed_offsets))
  1320. goto lra_eliminate_done;
  1321. if (lra_dump_file != NULL)
  1322. {
  1323. fprintf (lra_dump_file, "New elimination table:\n");
  1324. print_elim_table (lra_dump_file);
  1325. }
  1326. EXECUTE_IF_SET_IN_BITMAP (&insns_with_changed_offsets, 0, uid, bi)
  1327. /* A dead insn can be deleted in process_insn_for_elimination. */
  1328. if (lra_insn_recog_data[uid] != NULL)
  1329. process_insn_for_elimination (lra_insn_recog_data[uid]->insn,
  1330. final_p, first_p);
  1331. bitmap_clear (&insns_with_changed_offsets);
  1332. lra_eliminate_done:
  1333. timevar_pop (TV_LRA_ELIMINATE);
  1334. }