rx.opt 4.2 KB

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  1. ; Command line options for the Renesas RX port of GCC.
  2. ; Copyright (C) 2008-2015 Free Software Foundation, Inc.
  3. ; Contributed by Red Hat.
  4. ;
  5. ; This file is part of GCC.
  6. ;
  7. ; GCC is free software; you can redistribute it and/or modify it under
  8. ; the terms of the GNU General Public License as published by the Free
  9. ; Software Foundation; either version 3, or (at your option) any later
  10. ; version.
  11. ;
  12. ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
  13. ; WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. ; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  15. ; for more details.
  16. ;
  17. ; You should have received a copy of the GNU General Public License
  18. ; along with GCC; see the file COPYING3. If not see
  19. ; <http://www.gnu.org/licenses/>.
  20. ;---------------------------------------------------
  21. HeaderInclude
  22. config/rx/rx-opts.h
  23. ; The default is -fpu -m32bit-doubles.
  24. m64bit-doubles
  25. Target RejectNegative Mask(64BIT_DOUBLES) Report
  26. Store doubles in 64 bits.
  27. m32bit-doubles
  28. Target RejectNegative InverseMask(64BIT_DOUBLES) Report
  29. Stores doubles in 32 bits. This is the default.
  30. nofpu
  31. Target RejectNegative Alias(mnofpu)
  32. Disable the use of RX FPU instructions.
  33. mnofpu
  34. Target RejectNegative Mask(NO_USE_FPU) Report Undocumented
  35. fpu
  36. Target RejectNegative InverseMask(NO_USE_FPU) Report
  37. Enable the use of RX FPU instructions. This is the default.
  38. ;---------------------------------------------------
  39. mcpu=
  40. Target RejectNegative Joined Var(rx_cpu_type) Report ToLower Enum(rx_cpu_types) Init(RX600)
  41. Specify the target RX cpu type.
  42. Enum
  43. Name(rx_cpu_types) Type(enum rx_cpu_types)
  44. EnumValue
  45. Enum(rx_cpu_types) String(rx610) Value(RX610)
  46. EnumValue
  47. Enum(rx_cpu_types) String(rx200) Value(RX200)
  48. EnumValue
  49. Enum(rx_cpu_types) String(rx600) Value(RX600)
  50. EnumValue
  51. Enum(rx_cpu_types) String(rx100) Value(RX100)
  52. ;---------------------------------------------------
  53. mbig-endian-data
  54. Target RejectNegative Mask(BIG_ENDIAN_DATA) Report
  55. Data is stored in big-endian format.
  56. mlittle-endian-data
  57. Target RejectNegative InverseMask(BIG_ENDIAN_DATA) Report
  58. Data is stored in little-endian format. (Default).
  59. ;---------------------------------------------------
  60. msmall-data-limit=
  61. Target RejectNegative Joined UInteger Var(rx_small_data_limit) Init(0)
  62. Maximum size of global and static variables which can be placed into the small data area.
  63. ;---------------------------------------------------
  64. msim
  65. Target
  66. Use the simulator runtime.
  67. ;---------------------------------------------------
  68. mas100-syntax
  69. Target Mask(AS100_SYNTAX) Report
  70. Generate assembler output that is compatible with the Renesas AS100 assembler. This may restrict some of the compiler's capabilities. The default is to generate GAS compatible syntax.
  71. ;---------------------------------------------------
  72. mrelax
  73. Target
  74. Enable linker relaxation.
  75. ;---------------------------------------------------
  76. mmax-constant-size=
  77. Target RejectNegative Joined UInteger Var(rx_max_constant_size) Init(0)
  78. Maximum size in bytes of constant values allowed as operands.
  79. ;---------------------------------------------------
  80. mint-register=
  81. Target RejectNegative Joined UInteger Var(rx_deferred_options) Defer
  82. Specifies the number of registers to reserve for interrupt handlers.
  83. ;---------------------------------------------------
  84. msave-acc-in-interrupts
  85. Target Mask(SAVE_ACC_REGISTER)
  86. Specifies whether interrupt functions should save and restore the accumulator register.
  87. ;---------------------------------------------------
  88. mpid
  89. Target Mask(PID)
  90. Enables Position-Independent-Data (PID) mode.
  91. ;---------------------------------------------------
  92. mwarn-multiple-fast-interrupts
  93. Target Report Var(rx_warn_multiple_fast_interrupts) Init(1) Warning
  94. Warn when multiple, different, fast interrupt handlers are in the compilation unit.
  95. mgcc-abi
  96. Target RejectNegative Report Mask(GCC_ABI)
  97. Enable the use of the old, broken, ABI where all stacked function arguments are aligned to 32-bits.
  98. mrx-abi
  99. Target RejectNegative Report InverseMask(GCC_ABI)
  100. Enable the use the standard RX ABI where all stacked function arguments are naturally aligned. This is the default.
  101. mlra
  102. Target Report Mask(ENABLE_LRA)
  103. Enable the use of the LRA register allocator.