mips.opt 11 KB

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  1. ; Options for the MIPS port of the compiler
  2. ;
  3. ; Copyright (C) 2005-2015 Free Software Foundation, Inc.
  4. ;
  5. ; This file is part of GCC.
  6. ;
  7. ; GCC is free software; you can redistribute it and/or modify it under
  8. ; the terms of the GNU General Public License as published by the Free
  9. ; Software Foundation; either version 3, or (at your option) any later
  10. ; version.
  11. ;
  12. ; GCC is distributed in the hope that it will be useful, but WITHOUT
  13. ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14. ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
  15. ; License for more details.
  16. ;
  17. ; You should have received a copy of the GNU General Public License
  18. ; along with GCC; see the file COPYING3. If not see
  19. ; <http://www.gnu.org/licenses/>.
  20. HeaderInclude
  21. config/mips/mips-opts.h
  22. EB
  23. Driver
  24. EL
  25. Driver
  26. mabi=
  27. Target RejectNegative Joined Enum(mips_abi) Var(mips_abi) Init(MIPS_ABI_DEFAULT)
  28. -mabi=ABI Generate code that conforms to the given ABI
  29. Enum
  30. Name(mips_abi) Type(int)
  31. Known MIPS ABIs (for use with the -mabi= option):
  32. EnumValue
  33. Enum(mips_abi) String(32) Value(ABI_32)
  34. EnumValue
  35. Enum(mips_abi) String(o64) Value(ABI_O64)
  36. EnumValue
  37. Enum(mips_abi) String(n32) Value(ABI_N32)
  38. EnumValue
  39. Enum(mips_abi) String(64) Value(ABI_64)
  40. EnumValue
  41. Enum(mips_abi) String(eabi) Value(ABI_EABI)
  42. mabicalls
  43. Target Report Mask(ABICALLS)
  44. Generate code that can be used in SVR4-style dynamic objects
  45. mmad
  46. Target Report Var(TARGET_MAD)
  47. Use PMC-style 'mad' instructions
  48. mimadd
  49. Target Report Mask(IMADD)
  50. Use integer madd/msub instructions
  51. march=
  52. Target RejectNegative Joined Var(mips_arch_option) ToLower Enum(mips_arch_opt_value)
  53. -march=ISA Generate code for the given ISA
  54. mbranch-cost=
  55. Target RejectNegative Joined UInteger Var(mips_branch_cost)
  56. -mbranch-cost=COST Set the cost of branches to roughly COST instructions
  57. mbranch-likely
  58. Target Report Mask(BRANCHLIKELY)
  59. Use Branch Likely instructions, overriding the architecture default
  60. mflip-mips16
  61. Target Report Var(TARGET_FLIP_MIPS16)
  62. Switch on/off MIPS16 ASE on alternating functions for compiler testing
  63. mcheck-zero-division
  64. Target Report Mask(CHECK_ZERO_DIV)
  65. Trap on integer divide by zero
  66. mcode-readable=
  67. Target RejectNegative Joined Enum(mips_code_readable_setting) Var(mips_code_readable) Init(CODE_READABLE_YES)
  68. -mcode-readable=SETTING Specify when instructions are allowed to access code
  69. Enum
  70. Name(mips_code_readable_setting) Type(enum mips_code_readable_setting)
  71. Valid arguments to -mcode-readable=:
  72. EnumValue
  73. Enum(mips_code_readable_setting) String(yes) Value(CODE_READABLE_YES)
  74. EnumValue
  75. Enum(mips_code_readable_setting) String(pcrel) Value(CODE_READABLE_PCREL)
  76. EnumValue
  77. Enum(mips_code_readable_setting) String(no) Value(CODE_READABLE_NO)
  78. mdivide-breaks
  79. Target Report RejectNegative Mask(DIVIDE_BREAKS)
  80. Use branch-and-break sequences to check for integer divide by zero
  81. mdivide-traps
  82. Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
  83. Use trap instructions to check for integer divide by zero
  84. mdmx
  85. Target Report RejectNegative Var(TARGET_MDMX)
  86. Allow the use of MDMX instructions
  87. mdouble-float
  88. Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
  89. Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
  90. mdsp
  91. Target Report Var(TARGET_DSP)
  92. Use MIPS-DSP instructions
  93. mdspr2
  94. Target Report Var(TARGET_DSPR2)
  95. Use MIPS-DSP REV 2 instructions
  96. mdebug
  97. Target Var(TARGET_DEBUG_MODE) Undocumented
  98. mdebugd
  99. Target Var(TARGET_DEBUG_D_MODE) Undocumented
  100. meb
  101. Target Report RejectNegative Mask(BIG_ENDIAN)
  102. Use big-endian byte order
  103. mel
  104. Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
  105. Use little-endian byte order
  106. membedded-data
  107. Target Report Var(TARGET_EMBEDDED_DATA)
  108. Use ROM instead of RAM
  109. meva
  110. Target Report Var(TARGET_EVA)
  111. Use Enhanced Virtual Addressing instructions
  112. mexplicit-relocs
  113. Target Report Mask(EXPLICIT_RELOCS)
  114. Use NewABI-style %reloc() assembly operators
  115. mextern-sdata
  116. Target Report Var(TARGET_EXTERN_SDATA) Init(1)
  117. Use -G for data that is not defined by the current object
  118. mfix-24k
  119. Target Report Var(TARGET_FIX_24K)
  120. Work around certain 24K errata
  121. mfix-r4000
  122. Target Report Mask(FIX_R4000)
  123. Work around certain R4000 errata
  124. mfix-r4400
  125. Target Report Mask(FIX_R4400)
  126. Work around certain R4400 errata
  127. mfix-rm7000
  128. Target Report Var(TARGET_FIX_RM7000)
  129. Work around certain RM7000 errata
  130. mfix-r10000
  131. Target Report Mask(FIX_R10000)
  132. Work around certain R10000 errata
  133. mfix-sb1
  134. Target Report Var(TARGET_FIX_SB1)
  135. Work around errata for early SB-1 revision 2 cores
  136. mfix-vr4120
  137. Target Report Var(TARGET_FIX_VR4120)
  138. Work around certain VR4120 errata
  139. mfix-vr4130
  140. Target Report Var(TARGET_FIX_VR4130)
  141. Work around VR4130 mflo/mfhi errata
  142. mfix4300
  143. Target Report Var(TARGET_4300_MUL_FIX)
  144. Work around an early 4300 hardware bug
  145. mfp-exceptions
  146. Target Report Var(TARGET_FP_EXCEPTIONS) Init(1)
  147. FP exceptions are enabled
  148. mfp32
  149. Target Report RejectNegative InverseMask(FLOAT64)
  150. Use 32-bit floating-point registers
  151. mfpxx
  152. Target Report RejectNegative Mask(FLOATXX)
  153. Conform to the o32 FPXX ABI
  154. mfp64
  155. Target Report RejectNegative Mask(FLOAT64)
  156. Use 64-bit floating-point registers
  157. mflush-func=
  158. Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC)
  159. -mflush-func=FUNC Use FUNC to flush the cache before calling stack trampolines
  160. mfused-madd
  161. Target Report Var(TARGET_FUSED_MADD) Init(1)
  162. Generate floating-point multiply-add instructions
  163. mabs=
  164. Target RejectNegative Joined Enum(mips_ieee_754_value) Var(mips_abs) Init(MIPS_IEEE_754_DEFAULT)
  165. -mabs=MODE Select the IEEE 754 ABS/NEG instruction execution mode
  166. mnan=
  167. Target RejectNegative Joined Enum(mips_ieee_754_value) Var(mips_nan) Init(MIPS_IEEE_754_DEFAULT)
  168. -mnan=ENCODING Select the IEEE 754 NaN data encoding
  169. Enum
  170. Name(mips_ieee_754_value) Type(int)
  171. Known MIPS IEEE 754 settings (for use with the -mabs= and -mnan= options):
  172. EnumValue
  173. Enum(mips_ieee_754_value) String(2008) Value(MIPS_IEEE_754_2008)
  174. EnumValue
  175. Enum(mips_ieee_754_value) String(legacy) Value(MIPS_IEEE_754_LEGACY)
  176. mgp32
  177. Target Report RejectNegative InverseMask(64BIT)
  178. Use 32-bit general registers
  179. mgp64
  180. Target Report RejectNegative Mask(64BIT)
  181. Use 64-bit general registers
  182. mgpopt
  183. Target Report Var(TARGET_GPOPT) Init(1)
  184. Use GP-relative addressing to access small data
  185. mplt
  186. Target Report Var(TARGET_PLT)
  187. When generating -mabicalls code, allow executables to use PLTs and copy relocations
  188. mhard-float
  189. Target Report RejectNegative InverseMask(SOFT_FLOAT_ABI, HARD_FLOAT_ABI)
  190. Allow the use of hardware floating-point ABI and instructions
  191. minterlink-compressed
  192. Target Report Var(TARGET_INTERLINK_COMPRESSED) Init(0)
  193. Generate code that is link-compatible with MIPS16 and microMIPS code.
  194. minterlink-mips16
  195. Target Report Var(TARGET_INTERLINK_COMPRESSED) Init(0)
  196. An alias for minterlink-compressed provided for backward-compatibility.
  197. mips
  198. Target RejectNegative Joined ToLower Enum(mips_mips_opt_value) Var(mips_isa_option)
  199. -mipsN Generate code for ISA level N
  200. mips16
  201. Target Report RejectNegative Mask(MIPS16)
  202. Generate MIPS16 code
  203. mips3d
  204. Target Report RejectNegative Var(TARGET_MIPS3D)
  205. Use MIPS-3D instructions
  206. mllsc
  207. Target Report Mask(LLSC)
  208. Use ll, sc and sync instructions
  209. mlocal-sdata
  210. Target Report Var(TARGET_LOCAL_SDATA) Init(1)
  211. Use -G for object-local data
  212. mlong-calls
  213. Target Report Var(TARGET_LONG_CALLS)
  214. Use indirect calls
  215. mlong32
  216. Target Report RejectNegative InverseMask(LONG64, LONG32)
  217. Use a 32-bit long type
  218. mlong64
  219. Target Report RejectNegative Mask(LONG64)
  220. Use a 64-bit long type
  221. mmcount-ra-address
  222. Target Report Var(TARGET_MCOUNT_RA_ADDRESS)
  223. Pass the address of the ra save location to _mcount in $12
  224. mmemcpy
  225. Target Report Mask(MEMCPY)
  226. Don't optimize block moves
  227. mmicromips
  228. Target Report Mask(MICROMIPS)
  229. Use microMIPS instructions
  230. mmt
  231. Target Report Var(TARGET_MT)
  232. Allow the use of MT instructions
  233. mno-float
  234. Target Report RejectNegative Var(TARGET_NO_FLOAT) Condition(TARGET_SUPPORTS_NO_FLOAT)
  235. Prevent the use of all floating-point operations
  236. mmcu
  237. Target Report Var(TARGET_MCU)
  238. Use MCU instructions
  239. mno-flush-func
  240. Target RejectNegative
  241. Do not use a cache-flushing function before calling stack trampolines
  242. mno-mdmx
  243. Target Report RejectNegative Var(TARGET_MDMX, 0)
  244. Do not use MDMX instructions
  245. mno-mips16
  246. Target Report RejectNegative InverseMask(MIPS16)
  247. Generate normal-mode code
  248. mno-mips3d
  249. Target Report RejectNegative Var(TARGET_MIPS3D, 0)
  250. Do not use MIPS-3D instructions
  251. mpaired-single
  252. Target Report Mask(PAIRED_SINGLE_FLOAT)
  253. Use paired-single floating-point instructions
  254. mr10k-cache-barrier=
  255. Target Joined RejectNegative Enum(mips_r10k_cache_barrier_setting) Var(mips_r10k_cache_barrier) Init(R10K_CACHE_BARRIER_NONE)
  256. -mr10k-cache-barrier=SETTING Specify when r10k cache barriers should be inserted
  257. Enum
  258. Name(mips_r10k_cache_barrier_setting) Type(enum mips_r10k_cache_barrier_setting)
  259. Valid arguments to -mr10k-cache-barrier=:
  260. EnumValue
  261. Enum(mips_r10k_cache_barrier_setting) String(load-store) Value(R10K_CACHE_BARRIER_LOAD_STORE)
  262. EnumValue
  263. Enum(mips_r10k_cache_barrier_setting) String(store) Value(R10K_CACHE_BARRIER_STORE)
  264. EnumValue
  265. Enum(mips_r10k_cache_barrier_setting) String(none) Value(R10K_CACHE_BARRIER_NONE)
  266. mrelax-pic-calls
  267. Target Report Mask(RELAX_PIC_CALLS)
  268. Try to allow the linker to turn PIC calls into direct calls
  269. mshared
  270. Target Report Var(TARGET_SHARED) Init(1)
  271. When generating -mabicalls code, make the code suitable for use in shared libraries
  272. msingle-float
  273. Target Report RejectNegative Mask(SINGLE_FLOAT)
  274. Restrict the use of hardware floating-point instructions to 32-bit operations
  275. msmartmips
  276. Target Report Mask(SMARTMIPS)
  277. Use SmartMIPS instructions
  278. msoft-float
  279. Target Report RejectNegative Mask(SOFT_FLOAT_ABI)
  280. Prevent the use of all hardware floating-point instructions
  281. msplit-addresses
  282. Target Report Mask(SPLIT_ADDRESSES)
  283. Optimize lui/addiu address loads
  284. msym32
  285. Target Report Var(TARGET_SYM32)
  286. Assume all symbols have 32-bit values
  287. msynci
  288. Target Report Mask(SYNCI)
  289. Use synci instruction to invalidate i-cache
  290. mlra
  291. Target Report Var(mips_lra_flag) Init(1) Save
  292. Use LRA instead of reload
  293. mtune=
  294. Target RejectNegative Joined Var(mips_tune_option) ToLower Enum(mips_arch_opt_value)
  295. -mtune=PROCESSOR Optimize the output for PROCESSOR
  296. muninit-const-in-rodata
  297. Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
  298. Put uninitialized constants in ROM (needs -membedded-data)
  299. mvirt
  300. Target Report Var(TARGET_VIRT)
  301. Use Virtualization Application Specific instructions
  302. mxpa
  303. Target Report Var(TARGET_XPA)
  304. Use eXtended Physical Address (XPA) instructions
  305. mvr4130-align
  306. Target Report Mask(VR4130_ALIGN)
  307. Perform VR4130-specific alignment optimizations
  308. mxgot
  309. Target Report Var(TARGET_XGOT)
  310. Lift restrictions on GOT size
  311. modd-spreg
  312. Target Report Mask(ODD_SPREG)
  313. Enable use of odd-numbered single-precision registers
  314. noasmopt
  315. Driver