Michael Buesch 14cdf5c6dc crcgen: Update 3 anni fa
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crcgen @ c2f1431dea 14cdf5c6dc crcgen: Update 3 anni fa
fpgamakelib @ ec6e123b58 d0ef8d44fe fpga: Update makefiles 4 anni fa
.gitignore fe465a179c Update crcgen 5 anni fa
Makefile 14cdf5c6dc crcgen: Update 3 anni fa
block_ram_mod.v e2542fed3c Add FPGA PHY source code 5 anni fa
edge_detect_mod.v e2542fed3c Add FPGA PHY source code 5 anni fa
led_blink_mod.v 2a97e0444f fpga: Add LED blinker 5 anni fa
main.v 0e4226eb30 phy-fpha: Declare miso as inout 5 anni fa
parity_func.v e2542fed3c Add FPGA PHY source code 5 anni fa
profibus_phy_mod.v 4db238f9ef phy-fpga: Set CRC error flag 5 anni fa
spi_slave_mod.v bf2afdb4e8 fpga: re-arrange pins 5 anni fa
sync_signal_mod.v e2542fed3c Add FPGA PHY source code 5 anni fa
tinyfpga_bx.pcf e2542fed3c Add FPGA PHY source code 5 anni fa
tinyfpga_bx_program.sh 0835c8771e tinyfpga_bx_program: Update bootloader, if required 5 anni fa
uart_mod.v 1eabd5e26d uart: Limit sym timer 5 anni fa