Commit History

Author SHA1 Message Date
  Michael Buesch dc1970e3e9 crcgen: Remove equality operator from dataclasses 5 years ago
  Michael Buesch b2cfb21d8b crcgen: Rewrite flattening optimizer 5 years ago
  Michael Buesch da953a4fe0 crcgen: Minor cleanup 5 years ago
  Michael Buesch fee1ba5530 crcgen: Clean up optimizer 5 years ago
  Michael Buesch 5f351a3d11 crcgen: Extend CRC generator 5 years ago
  Michael Buesch 1a9f2c23d8 crcgen: Extend reference implementation 5 years ago
  Michael Buesch 2fc259ffb8 phy-fpga: Add TX-active output pin 5 years ago
  Michael Buesch 985c1f425a fpga-driver: Reset RX buffer on invalid telegram length 5 years ago
  Michael Buesch a5553ea439 fpga-driver: Move code to separate modules 5 years ago
  Michael Buesch ec8d84fb01 fpga: Invert ifdef logic 5 years ago
  Michael Buesch 7c967c0005 fpga: Also reset state machine before soft reset 5 years ago
  Michael Buesch b8cc8f01cf fpga-driver: More fixes to I/O logic 5 years ago
  Michael Buesch 320f3a439f fpga: Add flags for hard reset 5 years ago
  Michael Buesch 36599defdd fpga: Add bit for status signalling 5 years ago
  Michael Buesch a536bd1507 fpga/pb: Change control message buffer handling 5 years ago
  Michael Buesch 4b4d67b430 fpga: re-arrange pins 5 years ago
  Michael Buesch 7781ceca28 fpga: Move target specific code to target module 5 years ago
  Michael Buesch 5e9a27efd7 fpga/pb: Make debug interface conditional on DEBUG define 5 years ago
  Michael Buesch c2d7483105 fpga: Add DEBUG define 5 years ago
  Michael Buesch e7254d162d fpga: Add LED blinker 5 years ago
  Michael Buesch fb07d30621 uart: Limit sym timer 5 years ago
  Michael Buesch b767e99ac4 release: Add build 5 years ago
  Michael Buesch ecc63ed1bd fpga: small makefile cleanups 5 years ago
  Michael Buesch 45fa95c68e fpga: Add prefixes to generated files 5 years ago
  Michael Buesch 60cca26ae9 fpga/crc: Add arg hex parser 5 years ago
  Michael Buesch 6ec6deb340 fpga: Add basic support for other targets 5 years ago
  Michael Buesch 741313965b setup: Add phy_fpga driver 5 years ago
  Michael Buesch 4a8c1315d0 manifest: Add phy_fpga 5 years ago
  Michael Buesch d51bbe5ae2 Add FPGA PHY source code 5 years ago
  Michael Buesch 9bd3dcdb17 Move fpga driver 5 years ago