m8def.inc 9.3 KB

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  1. ;***************************************************************************
  2. ;* A P P L I C A T I O N N O T E F O R T H E A V R F A M I L Y
  3. ;*
  4. ;* Number :AVR000
  5. ;* File Name :"m8def.inc"
  6. ;* Title :Register/Bit Definitions for the ATmega8
  7. ;* Date :07.09.2001
  8. ;* Version :1.00
  9. ;* Support telephone :+47 72 88 43 88 (ATMEL Norway)
  10. ;* Support fax :+47 72 88 43 99 (ATMEL Norway)
  11. ;* Support E-mail :avr@atmel.no
  12. ;* Target MCU :ATmega8
  13. ;*
  14. ;* DESCRIPTION
  15. ;* When including this file in the assembly program file, all I/O register
  16. ;* names and I/O register bit names appearing in the data book can be used.
  17. ;* In addition, the six registers forming the three data pointers X, Y and
  18. ;* Z have been assigned names XL - ZH. Highest RAM address for Internal
  19. ;* SRAM is also defined
  20. ;*
  21. ;* The Register names are represented by their hexadecimal address.
  22. ;*
  23. ;* The Register Bit names are represented by their bit number (0-7).
  24. ;*
  25. ;* Please observe the difference in using the bit names with instructions
  26. ;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc"
  27. ;* (skip if bit in register set/cleared). The following example illustrates
  28. ;* this:
  29. ;*
  30. ;* in r16,PORTB ;read PORTB latch
  31. ;* sbr r16,(1<<PB6)+(1<<PB5) ;set PB6 and PB5 (use masks, not bit#)
  32. ;* out PORTB,r16 ;output to PORTB
  33. ;*
  34. ;* in r16,TIFR ;read the Timer Interrupt Flag Register
  35. ;* sbrc r16,TOV0 ;test the overflow flag (use bit#)
  36. ;* rjmp TOV0_is_set ;jump if set
  37. ;* ... ;otherwise do something else
  38. ;***************************************************************************
  39. ;***** Specify Device
  40. .device ATmega8
  41. ;***** I/O Register Definitions
  42. .equ SREG =$3f
  43. .equ SPH =$3e
  44. .equ SPL =$3d
  45. .equ GIMSK =$3b
  46. .equ GICR =$3b ; new name for GIMSK
  47. .equ GIFR =$3a
  48. .equ TIMSK =$39
  49. .equ TIFR =$38
  50. .equ SPMCR =$37
  51. .equ I2CR =$36
  52. .equ TWCR =$36
  53. .equ MCUCR =$35
  54. .equ MCUSR =$34 ; For compatibility,
  55. .equ MCUCSR =$34 ; keep both names until further
  56. .equ TCCR0 =$33
  57. .equ TCNT0 =$32
  58. .equ OSCCAL =$31
  59. .equ SFIOR =$30
  60. .equ TCCR1A =$2f
  61. .equ TCCR1B =$2e
  62. .equ TCNT1H =$2d
  63. .equ TCNT1L =$2c
  64. .equ OCR1AH =$2b
  65. .equ OCR1AL =$2a
  66. .equ OCR1BH =$29
  67. .equ OCR1BL =$28
  68. .equ ICR1H =$27
  69. .equ ICR1L =$26
  70. .equ TCCR2 =$25
  71. .equ TCNT2 =$24
  72. .equ OCR2 =$23
  73. .equ ASSR =$22
  74. .equ WDTCR =$21
  75. .equ UBRRH =$20 ; Note! UCSRC equals UBRRH
  76. .equ EEARH =$1f
  77. .equ EEARL =$1e
  78. .equ EEDR =$1d
  79. .equ EECR =$1c
  80. .equ PORTB =$18
  81. .equ DDRB =$17
  82. .equ PINB =$16
  83. .equ PORTC =$15
  84. .equ DDRC =$14
  85. .equ PINC =$13
  86. .equ PORTD =$12
  87. .equ DDRD =$11
  88. .equ PIND =$10
  89. .equ SPDR =$0f
  90. .equ SPSR =$0e
  91. .equ SPCR =$0d
  92. .equ UDR =$0c
  93. .equ UCSRA =$0b
  94. .equ UCSRB =$0a
  95. .equ UCSRC =$20 ; Note! UCSRC equals UBRRH
  96. .equ UBRRL =$09
  97. .equ ACSR =$08
  98. .equ ADMUX =$07
  99. .equ ADCSR =$06
  100. .equ ADCSRA =$06
  101. .equ ADCH =$05
  102. .equ ADCL =$04
  103. .equ I2DR =$03
  104. .equ I2AR =$02
  105. .equ I2SR =$01
  106. .equ I2BR =$00
  107. .equ TWDR =$03
  108. .equ TWAR =$02
  109. .equ TWSR =$01
  110. .equ TWBR =$00
  111. ;***** Bit Definitions
  112. ;GICR (former GIMSK)
  113. .equ INT1 =7
  114. .equ INT0 =6
  115. .equ IVSEL =1 ; interrupt vector select
  116. .equ IVCE =0 ; interrupt vector change enable
  117. ;GIFR
  118. .equ INTF1 =7
  119. .equ INTF0 =6
  120. ;TIMSK
  121. .equ TOIE0 =0
  122. .equ TOIE1 =2
  123. .equ OCIE1B =3
  124. .equ OCIE1A =4
  125. .equ TICIE1 =5
  126. .equ TOIE2 =6
  127. .equ OCIE2 =7
  128. ;TIFR
  129. .equ TOV0 =0
  130. .equ TOV1 =2
  131. .equ OCF1B =3
  132. .equ OCF1A =4
  133. .equ ICF1 =5
  134. .equ TOV2 =6
  135. .equ OCF2 =7
  136. ;SPMCR
  137. .equ SPMIE =7
  138. .equ RWWSB =6
  139. .equ RWWSRE =4
  140. .equ BLBSET =3
  141. .equ PGWRT =2
  142. .equ PGERS =1
  143. .equ SPMEN =0
  144. ;MCUCR
  145. .equ SE =7
  146. .equ SM2 =6
  147. .equ SM1 =5
  148. .equ SM0 =4
  149. .equ ISC11 =3
  150. .equ ISC10 =2
  151. .equ ISC01 =1
  152. .equ ISC00 =0
  153. ;MCUCSR
  154. .equ WDRF =3
  155. .equ BORF =2
  156. .equ EXTRF =1
  157. .equ PORF =0
  158. ;TCCR0
  159. .equ CS02 =2
  160. .equ CS01 =1
  161. .equ CS00 =0
  162. ;TCCR1A
  163. .equ COM1A1 =7
  164. .equ COM1A0 =6
  165. .equ COM1B1 =5
  166. .equ COM1B0 =4
  167. .equ FOC1A =3
  168. .equ FOC1B =2
  169. .equ PWM11 =1 ; OBSOLETE! Use WGM11
  170. .equ PWM10 =0 ; OBSOLETE! Use WGM10
  171. .equ WGM11 =1
  172. .equ WGM10 =0
  173. ;TCCR1B
  174. .equ ICNC1 =7
  175. .equ ICES1 =6
  176. .equ CTC11 =4 ; OBSOLETE! Use WGM13
  177. .equ CTC10 =3 ; OBSOLETE! Use WGM12
  178. .equ WGM13 =4
  179. .equ WGM12 =3
  180. .equ CTC1 =3 ; Obsolete - Included for backward compatibility
  181. .equ CS12 =2
  182. .equ CS11 =1
  183. .equ CS10 =0
  184. ;TCCR2
  185. .equ FOC2 =7
  186. .equ PWM2 =6 ; OBSOLETE! Use WGM20
  187. .equ WGM20 =6
  188. .equ COM21 =5
  189. .equ COM20 =4
  190. .equ CTC2 =3 ; OBSOLETE! Use WGM21
  191. .equ WGM21 =3
  192. .equ CS22 =2
  193. .equ CS21 =1
  194. .equ CS20 =0
  195. ;SFIOR
  196. .equ ADHSM =4
  197. .equ ACME =3
  198. .equ PUD =2
  199. .equ PSR2 =1
  200. .equ PSR10 =0
  201. ;WDTCR
  202. .equ WDCE =4
  203. .equ WDTOE =4
  204. .equ WDE =3
  205. .equ WDP2 =2
  206. .equ WDP1 =1
  207. .equ WDP0 =0
  208. ;EECR
  209. .equ EERIE =3
  210. .equ EEMWE =2
  211. .equ EEWE =1
  212. .equ EERE =0
  213. ;PORTB
  214. .equ PB7 =7
  215. .equ PB6 =6
  216. .equ PB5 =5
  217. .equ PB4 =4
  218. .equ PB3 =3
  219. .equ PB2 =2
  220. .equ PB1 =1
  221. .equ PB0 =0
  222. ;DDRB
  223. .equ DDB7 =7
  224. .equ DDB6 =6
  225. .equ DDB5 =5
  226. .equ DDB4 =4
  227. .equ DDB3 =3
  228. .equ DDB2 =2
  229. .equ DDB1 =1
  230. .equ DDB0 =0
  231. ;PINB
  232. .equ PINB7 =7
  233. .equ PINB6 =6
  234. .equ PINB5 =5
  235. .equ PINB4 =4
  236. .equ PINB3 =3
  237. .equ PINB2 =2
  238. .equ PINB1 =1
  239. .equ PINB0 =0
  240. ;PORTC
  241. .equ PC6 =6
  242. .equ PC5 =5
  243. .equ PC4 =4
  244. .equ PC3 =3
  245. .equ PC2 =2
  246. .equ PC1 =1
  247. .equ PC0 =0
  248. ;DDRC
  249. .equ DDC6 =6
  250. .equ DDC5 =5
  251. .equ DDC4 =4
  252. .equ DDC3 =3
  253. .equ DDC2 =2
  254. .equ DDC1 =1
  255. .equ DDC0 =0
  256. ;PINC
  257. .equ PINC6 =6
  258. .equ PINC5 =5
  259. .equ PINC4 =4
  260. .equ PINC3 =3
  261. .equ PINC2 =2
  262. .equ PINC1 =1
  263. .equ PINC0 =0
  264. ;PORTD
  265. .equ PD7 =7
  266. .equ PD6 =6
  267. .equ PD5 =5
  268. .equ PD4 =4
  269. .equ PD3 =3
  270. .equ PD2 =2
  271. .equ PD1 =1
  272. .equ PD0 =0
  273. ;DDRD
  274. .equ DDD7 =7
  275. .equ DDD6 =6
  276. .equ DDD5 =5
  277. .equ DDD4 =4
  278. .equ DDD3 =3
  279. .equ DDD2 =2
  280. .equ DDD1 =1
  281. .equ DDD0 =0
  282. ;PIND
  283. .equ PIND7 =7
  284. .equ PIND6 =6
  285. .equ PIND5 =5
  286. .equ PIND4 =4
  287. .equ PIND3 =3
  288. .equ PIND2 =2
  289. .equ PIND1 =1
  290. .equ PIND0 =0
  291. ;UCSRA
  292. .equ RXC =7
  293. .equ TXC =6
  294. .equ UDRE =5
  295. .equ FE =4
  296. .equ OR =3 ; old name kept for compatibilty
  297. .equ DOR =3
  298. .equ UPE =2
  299. .equ PE =2
  300. .equ U2X =1
  301. .equ MPCM =0
  302. ;UCSRB
  303. .equ RXCIE =7
  304. .equ TXCIE =6
  305. .equ UDRIE =5
  306. .equ RXEN =4
  307. .equ TXEN =3
  308. .equ CHR9 =2 ; old name kept for compatibilty
  309. .equ UCSZ2 =2
  310. .equ RXB8 =1
  311. .equ TXB8 =0
  312. ;UCSRC
  313. .equ URSEL =7
  314. .equ UMSEL =6
  315. .equ UPM1 =5
  316. .equ UPM0 =4
  317. .equ USBS =3
  318. .equ UCSZ1 =2
  319. .equ UCSZ0 =1
  320. .equ UCPOL =0
  321. ;SPCR
  322. .equ SPIE =7
  323. .equ SPE =6
  324. .equ DORD =5
  325. .equ MSTR =4
  326. .equ CPOL =3
  327. .equ CPHA =2
  328. .equ SPR1 =1
  329. .equ SPR0 =0
  330. ;SPSR
  331. .equ SPIF =7
  332. .equ WCOL =6
  333. .equ SPI2X =0
  334. ;ACSR
  335. .equ ACD =7
  336. .equ ACBG =6
  337. .equ ACO =5
  338. .equ ACI =4
  339. .equ ACIE =3
  340. .equ ACIC =2
  341. .equ ACIS1 =1
  342. .equ ACIS0 =0
  343. ;ADMUX
  344. .equ REFS1 =7
  345. .equ REFS0 =6
  346. .equ ADLAR =5
  347. .equ MUX3 =3
  348. .equ MUX2 =2
  349. .equ MUX1 =1
  350. .equ MUX0 =0
  351. ;ADCSR
  352. .equ ADEN =7
  353. .equ ADSC =6
  354. .equ ADFR =5
  355. .equ ADIF =4
  356. .equ ADIE =3
  357. .equ ADPS2 =2
  358. .equ ADPS1 =1
  359. .equ ADPS0 =0
  360. ; TWCR
  361. .equ TWINT =7
  362. .equ TWEA =6
  363. .equ TWSTA =5
  364. .equ TWSTO =4
  365. .equ TWWC =3
  366. .equ TWEN =2
  367. .equ TWIE =0
  368. ; TWAR
  369. .equ TWA6 =7
  370. .equ TWA5 =6
  371. .equ TWA4 =5
  372. .equ TWA3 =4
  373. .equ TWA2 =3
  374. .equ TWA1 =2
  375. .equ TWA0 =1
  376. .equ TWGCE =0
  377. ; TWSR
  378. .equ TWS7 =7
  379. .equ TWS6 =6
  380. .equ TWS5 =5
  381. .equ TWS4 =4
  382. .equ TWS3 =3
  383. .equ TWPS1 =1
  384. .equ TWPS0 =0
  385. ;ASSR
  386. .equ AS2 =3
  387. .equ TCN2UB =2
  388. .equ OCR2UB =1
  389. .equ TCR2UB =0
  390. .def XL =r26
  391. .def XH =r27
  392. .def YL =r28
  393. .def YH =r29
  394. .def ZL =r30
  395. .def ZH =r31
  396. .equ RAMEND =$45F
  397. .equ FLASHEND =$FFF
  398. ; byte groups
  399. ; /\/--\/--\/--\
  400. .equ SMALLBOOTSTART =0b00111110000000 ;($0F80) smallest boot block is 256
  401. .equ SECONDBOOTSTART =0b00111100000000 ;($0F00) 2'nd boot block size is 512
  402. .equ THIRDBOOTSTART =0b00111000000000 ;($0E00) third boot block size is 1K
  403. .equ LARGEBOOTSTART =0b00110000000000 ;($0C00) largest boot block is 2K
  404. .equ BOOTSTART =THIRDBOOTSTART ;OBSOLETE!!! kept for compatibility
  405. .equ PAGESIZE =32 ;number of WORDS in a page
  406. .equ INT0addr=$001 ; External Interrupt0 Vector Address
  407. .equ INT1addr=$002 ; External Interrupt1 Vector Address
  408. .equ OC2addr =$003 ; Output Compare2 Interrupt Vector Address
  409. .equ OVF2addr=$004 ; Overflow2 Interrupt Vector Address
  410. .equ ICP1addr=$005 ; Input Capture1 Interrupt Vector Address
  411. .equ OC1Aaddr=$006 ; Output Compare1A Interrupt Vector Address
  412. .equ OC1Baddr=$007 ; Output Compare1B Interrupt Vector Address
  413. .equ OVF1addr=$008 ; Overflow1 Interrupt Vector Address
  414. .equ OVF0addr=$009 ; Overflow0 Interrupt Vector Address
  415. .equ SPIaddr =$00a ; SPI Interrupt Vector Address
  416. .equ URXCaddr=$00b ; USART Receive Complete Interrupt Vector Address
  417. .equ UDREaddr=$00c ; USART Data Register Empty Interrupt Vector Address
  418. .equ UTXCaddr=$00d ; USART Transmit Complete Interrupt Vector Address
  419. .equ ADCCaddr=$00e ; ADC Interrupt Vector Address
  420. .equ ERDYaddr=$00f ; EEPROM Interrupt Vector Address
  421. .equ ACIaddr =$010 ; Analog Comparator Interrupt Vector Address
  422. .equ TWIaddr =$011 ; Irq. vector address for Two-Wire Interface
  423. .equ SPMaddr =$012 ; SPM complete Interrupt Vector Address
  424. .equ SPMRaddr =$012 ; SPM complete Interrupt Vector Address