From 5bffd9941711ac36bf2828f0df355ff4acc1afd5 Mon Sep 17 00:00:00 2001
From: Timothy Pearson <tpearson@raptorengineeringinc.com>
Date: Fri, 14 Aug 2015 15:20:42 -0500
Subject: [PATCH 119/143] southbridge/amd/sr5650: Add MCFG ACPI table support

Change-Id: I0c4ba74ddcc727cd92b848d5d3240e6f9f392101
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
---
 src/southbridge/amd/rs780/rs780.c   |   11 +++++++++++
 src/southbridge/amd/rs780/rs780.h   |    1 +
 src/southbridge/amd/sb700/lpc.c     |    6 ------
 src/southbridge/amd/sb800/lpc.c     |    7 +------
 src/southbridge/amd/sr5650/sr5650.c |   16 ++++++++++++++++
 5 files changed, 29 insertions(+), 12 deletions(-)

diff --git a/src/southbridge/amd/rs780/rs780.c b/src/southbridge/amd/rs780/rs780.c
index c7003c7..3b2c4f4 100644
--- a/src/southbridge/amd/rs780/rs780.c
+++ b/src/southbridge/amd/rs780/rs780.c
@@ -353,6 +353,17 @@ void rs780_enable(device_t dev)
 	}
 }
 
+#if !IS_ENABLED(CONFIG_AMD_SB_CIMX)
+unsigned long acpi_fill_mcfg(unsigned long current)
+{
+	/* FIXME
+	 * Leave table blank until proper contents
+	 * are determined.
+	 */
+	return current;
+}
+#endif
+
 struct chip_operations southbridge_amd_rs780_ops = {
 	CHIP_NAME("ATI RS780")
 	.enable_dev = rs780_enable,
diff --git a/src/southbridge/amd/rs780/rs780.h b/src/southbridge/amd/rs780/rs780.h
index dd2743f..a4ede50 100644
--- a/src/southbridge/amd/rs780/rs780.h
+++ b/src/southbridge/amd/rs780/rs780.h
@@ -21,6 +21,7 @@
 #define __RS780_H__
 
 #include <stdint.h>
+#include <arch/acpi.h>
 #include <device/pci_ids.h>
 #include "chip.h"
 #include "rev.h"
diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c
index 145a01f..fc27bef 100644
--- a/src/southbridge/amd/sb700/lpc.c
+++ b/src/southbridge/amd/sb700/lpc.c
@@ -34,12 +34,6 @@
 #include <cpu/amd/powernow.h>
 #include "sb700.h"
 
-unsigned long acpi_fill_mcfg(unsigned long current)
-{
-       /* Just a dummy */
-       return current;
-}
-
 static void lpc_init(device_t dev)
 {
 	u8 byte;
diff --git a/src/southbridge/amd/sb800/lpc.c b/src/southbridge/amd/sb800/lpc.c
index 0cd5b32..af96ea7 100644
--- a/src/southbridge/amd/sb800/lpc.c
+++ b/src/southbridge/amd/sb800/lpc.c
@@ -2,6 +2,7 @@
  * This file is part of the coreboot project.
  *
  * Copyright (C) 2010 Advanced Micro Devices, Inc.
+ * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -29,12 +30,6 @@
 #include <arch/acpi.h>
 #include "sb800.h"
 
-unsigned long acpi_fill_mcfg(unsigned long current)
-{
-       /* Just a dummy */
-       return current;
-}
-
 static void lpc_init(device_t dev)
 {
 	u8 byte;
diff --git a/src/southbridge/amd/sr5650/sr5650.c b/src/southbridge/amd/sr5650/sr5650.c
index b296c47..4622f36 100644
--- a/src/southbridge/amd/sr5650/sr5650.c
+++ b/src/southbridge/amd/sr5650/sr5650.c
@@ -800,6 +800,22 @@ static void add_ivrs_device_entries(struct device *parent, struct device *dev, i
 	free(root_level);
 }
 
+unsigned long acpi_fill_mcfg(unsigned long current)
+{
+	struct resource *res;
+	resource_t mmconf_base = EXT_CONF_BASE_ADDRESS;
+
+	device_t dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+	/* Report MMCONF base */
+	res = probe_resource(dev, 0x1c);
+	if (res)
+		mmconf_base = res->base;
+
+	current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current, mmconf_base, 0x0, 0x0, 0x1f);
+
+	return current;
+}
+
 static unsigned long acpi_fill_ivrs(acpi_ivrs_t* ivrs, unsigned long current)
 {
 	uint8_t *p;
-- 
1.7.9.5

