mipi_dsi.c 15 KB

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  1. /* Copyright (c) 2008-2012, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. */
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/sched.h>
  16. #include <linux/time.h>
  17. #include <linux/init.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/spinlock.h>
  20. #include <linux/delay.h>
  21. #include <linux/io.h>
  22. #include <linux/semaphore.h>
  23. #include <linux/uaccess.h>
  24. #include <linux/clk.h>
  25. #include <linux/platform_device.h>
  26. #include <asm/system.h>
  27. #include <asm/mach-types.h>
  28. #include <mach/hardware.h>
  29. #include <mach/gpio.h>
  30. #include <mach/clk.h>
  31. #include "msm_fb.h"
  32. #include "mipi_dsi.h"
  33. #include "mdp.h"
  34. #include "mdp4.h"
  35. u32 dsi_irq;
  36. u32 esc_byte_ratio;
  37. static boolean tlmm_settings = FALSE;
  38. static int mipi_dsi_probe(struct platform_device *pdev);
  39. static int mipi_dsi_remove(struct platform_device *pdev);
  40. static int mipi_dsi_off(struct platform_device *pdev);
  41. static int mipi_dsi_on(struct platform_device *pdev);
  42. static struct platform_device *pdev_list[MSM_FB_MAX_DEV_LIST];
  43. static int pdev_list_cnt;
  44. static struct mipi_dsi_platform_data *mipi_dsi_pdata;
  45. static int vsync_gpio = -1;
  46. static struct platform_driver mipi_dsi_driver = {
  47. .probe = mipi_dsi_probe,
  48. .remove = mipi_dsi_remove,
  49. .shutdown = NULL,
  50. .driver = {
  51. .name = "mipi_dsi",
  52. },
  53. };
  54. struct device dsi_dev;
  55. static int mipi_dsi_off(struct platform_device *pdev)
  56. {
  57. int ret = 0;
  58. struct msm_fb_data_type *mfd;
  59. struct msm_panel_info *pinfo;
  60. pr_debug("%s+:\n", __func__);
  61. mfd = platform_get_drvdata(pdev);
  62. pinfo = &mfd->panel_info;
  63. if (mdp_rev >= MDP_REV_41)
  64. mutex_lock(&mfd->dma->ov_mutex);
  65. else
  66. down(&mfd->dma->mutex);
  67. if (mfd->panel_info.type == MIPI_CMD_PANEL) {
  68. mipi_dsi_prepare_clocks();
  69. mipi_dsi_ahb_ctrl(1);
  70. mipi_dsi_clk_enable();
  71. /* make sure dsi_cmd_mdp is idle */
  72. mipi_dsi_cmd_mdp_busy();
  73. }
  74. /*
  75. * Desctiption: change to DSI_CMD_MODE since it needed to
  76. * tx DCS dsiplay off comamnd to panel
  77. */
  78. mipi_dsi_op_mode_config(DSI_CMD_MODE);
  79. if (mfd->panel_info.type == MIPI_CMD_PANEL) {
  80. if (pinfo->lcd.vsync_enable) {
  81. if (pinfo->lcd.hw_vsync_mode && vsync_gpio >= 0) {
  82. if (MDP_REV_303 != mdp_rev)
  83. gpio_free(vsync_gpio);
  84. }
  85. mipi_dsi_set_tear_off(mfd);
  86. }
  87. }
  88. ret = panel_next_off(pdev);
  89. mipi_dsi_clk_disable();
  90. /* disbale dsi engine */
  91. MIPI_OUTP(MIPI_DSI_BASE + 0x0000, 0);
  92. mipi_dsi_phy_ctrl(0);
  93. mipi_dsi_ahb_ctrl(0);
  94. mipi_dsi_unprepare_clocks();
  95. if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save)
  96. mipi_dsi_pdata->dsi_power_save(0);
  97. if (mdp_rev >= MDP_REV_41)
  98. mutex_unlock(&mfd->dma->ov_mutex);
  99. else
  100. up(&mfd->dma->mutex);
  101. pr_debug("%s-:\n", __func__);
  102. return ret;
  103. }
  104. static int mipi_dsi_on(struct platform_device *pdev)
  105. {
  106. int ret = 0;
  107. u32 clk_rate;
  108. struct msm_fb_data_type *mfd;
  109. struct fb_info *fbi;
  110. struct fb_var_screeninfo *var;
  111. struct msm_panel_info *pinfo;
  112. struct mipi_panel_info *mipi;
  113. u32 hbp, hfp, vbp, vfp, hspw, vspw, width, height;
  114. u32 ystride, bpp, data;
  115. u32 dummy_xres, dummy_yres;
  116. int target_type = 0;
  117. pr_debug("%s+:\n", __func__);
  118. mfd = platform_get_drvdata(pdev);
  119. fbi = mfd->fbi;
  120. var = &fbi->var;
  121. pinfo = &mfd->panel_info;
  122. esc_byte_ratio = pinfo->mipi.esc_byte_ratio;
  123. if (mipi_dsi_pdata && mipi_dsi_pdata->dsi_power_save)
  124. mipi_dsi_pdata->dsi_power_save(1);
  125. cont_splash_clk_ctrl(0);
  126. mipi_dsi_prepare_clocks();
  127. mipi_dsi_ahb_ctrl(1);
  128. clk_rate = mfd->fbi->var.pixclock;
  129. clk_rate = min(clk_rate, mfd->panel_info.clk_max);
  130. mipi_dsi_phy_ctrl(1);
  131. if (mdp_rev == MDP_REV_42 && mipi_dsi_pdata)
  132. target_type = mipi_dsi_pdata->target_type;
  133. mipi_dsi_phy_init(0, &(mfd->panel_info), target_type);
  134. mipi_dsi_clk_enable();
  135. MIPI_OUTP(MIPI_DSI_BASE + 0x114, 1);
  136. MIPI_OUTP(MIPI_DSI_BASE + 0x114, 0);
  137. hbp = var->left_margin;
  138. hfp = var->right_margin;
  139. vbp = var->upper_margin;
  140. vfp = var->lower_margin;
  141. hspw = var->hsync_len;
  142. vspw = var->vsync_len;
  143. width = mfd->panel_info.xres;
  144. height = mfd->panel_info.yres;
  145. mipi = &mfd->panel_info.mipi;
  146. if (mfd->panel_info.type == MIPI_VIDEO_PANEL) {
  147. dummy_xres = mfd->panel_info.lcdc.xres_pad;
  148. dummy_yres = mfd->panel_info.lcdc.yres_pad;
  149. if (mdp_rev >= MDP_REV_41) {
  150. MIPI_OUTP(MIPI_DSI_BASE + 0x20,
  151. ((hspw + hbp + width + dummy_xres) << 16 |
  152. (hspw + hbp)));
  153. MIPI_OUTP(MIPI_DSI_BASE + 0x24,
  154. ((vspw + vbp + height + dummy_yres) << 16 |
  155. (vspw + vbp)));
  156. MIPI_OUTP(MIPI_DSI_BASE + 0x28,
  157. (vspw + vbp + height + dummy_yres +
  158. vfp - 1) << 16 | (hspw + hbp +
  159. width + dummy_xres + hfp - 1));
  160. } else {
  161. /* DSI_LAN_SWAP_CTRL */
  162. MIPI_OUTP(MIPI_DSI_BASE + 0x00ac, mipi->dlane_swap);
  163. MIPI_OUTP(MIPI_DSI_BASE + 0x20,
  164. ((hbp + width + dummy_xres) << 16 | (hbp)));
  165. MIPI_OUTP(MIPI_DSI_BASE + 0x24,
  166. ((vbp + height + dummy_yres) << 16 | (vbp)));
  167. MIPI_OUTP(MIPI_DSI_BASE + 0x28,
  168. (vbp + height + dummy_yres + vfp) << 16 |
  169. (hbp + width + dummy_xres + hfp));
  170. }
  171. MIPI_OUTP(MIPI_DSI_BASE + 0x2c, (hspw << 16));
  172. MIPI_OUTP(MIPI_DSI_BASE + 0x30, 0);
  173. MIPI_OUTP(MIPI_DSI_BASE + 0x34, (vspw << 16));
  174. } else { /* command mode */
  175. if (mipi->dst_format == DSI_CMD_DST_FORMAT_RGB888)
  176. bpp = 3;
  177. else if (mipi->dst_format == DSI_CMD_DST_FORMAT_RGB666)
  178. bpp = 3;
  179. else if (mipi->dst_format == DSI_CMD_DST_FORMAT_RGB565)
  180. bpp = 2;
  181. else
  182. bpp = 3; /* Default format set to RGB888 */
  183. ystride = width * bpp + 1;
  184. /* DSI_COMMAND_MODE_MDP_STREAM_CTRL */
  185. data = (ystride << 16) | (mipi->vc << 8) | DTYPE_DCS_LWRITE;
  186. MIPI_OUTP(MIPI_DSI_BASE + 0x5c, data);
  187. MIPI_OUTP(MIPI_DSI_BASE + 0x54, data);
  188. /* DSI_COMMAND_MODE_MDP_STREAM_TOTAL */
  189. data = height << 16 | width;
  190. MIPI_OUTP(MIPI_DSI_BASE + 0x60, data);
  191. MIPI_OUTP(MIPI_DSI_BASE + 0x58, data);
  192. }
  193. mipi_dsi_host_init(mipi);
  194. if (mipi->force_clk_lane_hs) {
  195. u32 tmp;
  196. tmp = MIPI_INP(MIPI_DSI_BASE + 0xA8);
  197. tmp |= (1<<28);
  198. MIPI_OUTP(MIPI_DSI_BASE + 0xA8, tmp);
  199. wmb();
  200. }
  201. if (mdp_rev >= MDP_REV_41)
  202. mutex_lock(&mfd->dma->ov_mutex);
  203. else
  204. down(&mfd->dma->mutex);
  205. ret = panel_next_on(pdev);
  206. mipi_dsi_op_mode_config(mipi->mode);
  207. if (mfd->panel_info.type == MIPI_CMD_PANEL) {
  208. if (pinfo->lcd.vsync_enable) {
  209. if (pinfo->lcd.hw_vsync_mode && vsync_gpio >= 0) {
  210. if (mdp_rev >= MDP_REV_41) {
  211. if (gpio_request(vsync_gpio,
  212. "MDP_VSYNC") == 0)
  213. gpio_direction_input(
  214. vsync_gpio);
  215. else
  216. pr_err("%s: unable to \
  217. request gpio=%d\n",
  218. __func__, vsync_gpio);
  219. } else if (mdp_rev == MDP_REV_303) {
  220. if (!tlmm_settings && gpio_request(
  221. vsync_gpio, "MDP_VSYNC") == 0) {
  222. ret = gpio_tlmm_config(
  223. GPIO_CFG(
  224. vsync_gpio, 1,
  225. GPIO_CFG_INPUT,
  226. GPIO_CFG_PULL_DOWN,
  227. GPIO_CFG_2MA),
  228. GPIO_CFG_ENABLE);
  229. if (ret) {
  230. pr_err(
  231. "%s: unable to config \
  232. tlmm = %d\n",
  233. __func__, vsync_gpio);
  234. }
  235. tlmm_settings = TRUE;
  236. gpio_direction_input(
  237. vsync_gpio);
  238. } else {
  239. if (!tlmm_settings) {
  240. pr_err(
  241. "%s: unable to request \
  242. gpio=%d\n",
  243. __func__, vsync_gpio);
  244. }
  245. }
  246. }
  247. }
  248. mipi_dsi_set_tear_on(mfd);
  249. }
  250. mipi_dsi_clk_disable();
  251. mipi_dsi_ahb_ctrl(0);
  252. mipi_dsi_unprepare_clocks();
  253. }
  254. if (mdp_rev >= MDP_REV_41)
  255. mutex_unlock(&mfd->dma->ov_mutex);
  256. else
  257. up(&mfd->dma->mutex);
  258. pr_debug("%s-:\n", __func__);
  259. return ret;
  260. }
  261. static int mipi_dsi_late_init(struct platform_device *pdev)
  262. {
  263. return panel_next_late_init(pdev);
  264. }
  265. static int mipi_dsi_resource_initialized;
  266. static int mipi_dsi_probe(struct platform_device *pdev)
  267. {
  268. struct msm_fb_data_type *mfd;
  269. struct fb_info *fbi;
  270. struct msm_panel_info *pinfo;
  271. struct mipi_panel_info *mipi;
  272. struct platform_device *mdp_dev = NULL;
  273. struct msm_fb_panel_data *pdata = NULL;
  274. int rc;
  275. uint8 lanes = 0, bpp;
  276. uint32 h_period, v_period, dsi_pclk_rate;
  277. resource_size_t size ;
  278. if ((pdev->id == 1) && (pdev->num_resources >= 0)) {
  279. mipi_dsi_pdata = pdev->dev.platform_data;
  280. size = resource_size(&pdev->resource[0]);
  281. mipi_dsi_base = ioremap(pdev->resource[0].start, size);
  282. MSM_FB_INFO("mipi_dsi base phy_addr = 0x%x virt = 0x%x\n",
  283. pdev->resource[0].start, (int) mipi_dsi_base);
  284. if (!mipi_dsi_base)
  285. return -ENOMEM;
  286. if (mdp_rev >= MDP_REV_41) {
  287. mmss_sfpb_base = ioremap(MMSS_SFPB_BASE_PHY, 0x100);
  288. MSM_FB_INFO("mmss_sfpb base phy_addr = 0x%x,"
  289. "virt = 0x%x\n", MMSS_SFPB_BASE_PHY,
  290. (int) mmss_sfpb_base);
  291. if (!mmss_sfpb_base)
  292. return -ENOMEM;
  293. }
  294. dsi_irq = platform_get_irq(pdev, 0);
  295. if (dsi_irq < 0) {
  296. pr_err("mipi_dsi: can not get mdp irq\n");
  297. return -ENOMEM;
  298. }
  299. rc = request_irq(dsi_irq, mipi_dsi_isr, IRQF_DISABLED,
  300. "MIPI_DSI", 0);
  301. if (rc) {
  302. pr_err("mipi_dsi_host request_irq() failed!\n");
  303. return rc;
  304. }
  305. disable_irq(dsi_irq);
  306. if (mdp_rev == MDP_REV_42 && mipi_dsi_pdata &&
  307. mipi_dsi_pdata->target_type == 1) {
  308. /* Target type is 1 for device with (De)serializer
  309. * 0x4f00000 is the base for TV Encoder.
  310. * Unused Offset 0x1000 is used for
  311. * (de)serializer on emulation platform
  312. */
  313. periph_base = ioremap(MMSS_SERDES_BASE_PHY, 0x100);
  314. if (periph_base) {
  315. pr_debug("periph_base %p\n", periph_base);
  316. writel(0x4, periph_base + 0x28);
  317. writel(0xc, periph_base + 0x28);
  318. } else {
  319. pr_err("periph_base is NULL\n");
  320. free_irq(dsi_irq, 0);
  321. return -ENOMEM;
  322. }
  323. }
  324. if (mipi_dsi_pdata) {
  325. vsync_gpio = mipi_dsi_pdata->vsync_gpio;
  326. pr_debug("%s: vsync_gpio=%d\n", __func__, vsync_gpio);
  327. if (mdp_rev == MDP_REV_303 &&
  328. mipi_dsi_pdata->dsi_client_reset) {
  329. if (mipi_dsi_pdata->dsi_client_reset())
  330. pr_err("%s: DSI Client Reset failed!\n",
  331. __func__);
  332. else
  333. pr_debug("%s: DSI Client Reset success\n",
  334. __func__);
  335. }
  336. }
  337. if (mipi_dsi_clk_init(pdev))
  338. return -EPERM;
  339. if (mipi_dsi_pdata->splash_is_enabled &&
  340. !mipi_dsi_pdata->splash_is_enabled()) {
  341. mipi_dsi_ahb_ctrl(1);
  342. MIPI_OUTP(MIPI_DSI_BASE + 0x118, 0);
  343. MIPI_OUTP(MIPI_DSI_BASE + 0x0, 0);
  344. MIPI_OUTP(MIPI_DSI_BASE + 0x200, 0);
  345. mipi_dsi_ahb_ctrl(0);
  346. }
  347. mipi_dsi_resource_initialized = 1;
  348. return 0;
  349. }
  350. if (!mipi_dsi_resource_initialized)
  351. return -EPERM;
  352. mfd = platform_get_drvdata(pdev);
  353. if (!mfd)
  354. return -ENODEV;
  355. if (mfd->key != MFD_KEY)
  356. return -EINVAL;
  357. if (pdev_list_cnt >= MSM_FB_MAX_DEV_LIST)
  358. return -ENOMEM;
  359. mdp_dev = platform_device_alloc("mdp", pdev->id);
  360. if (!mdp_dev)
  361. return -ENOMEM;
  362. /*
  363. * link to the latest pdev
  364. */
  365. mfd->pdev = mdp_dev;
  366. /*
  367. * alloc panel device data
  368. */
  369. if (platform_device_add_data
  370. (mdp_dev, pdev->dev.platform_data,
  371. sizeof(struct msm_fb_panel_data))) {
  372. pr_err("mipi_dsi_probe: platform_device_add_data failed!\n");
  373. platform_device_put(mdp_dev);
  374. return -ENOMEM;
  375. }
  376. /*
  377. * data chain
  378. */
  379. pdata = mdp_dev->dev.platform_data;
  380. pdata->on = mipi_dsi_on;
  381. pdata->off = mipi_dsi_off;
  382. pdata->late_init = mipi_dsi_late_init;
  383. pdata->next = pdev;
  384. /*
  385. * get/set panel specific fb info
  386. */
  387. mfd->panel_info = pdata->panel_info;
  388. pinfo = &mfd->panel_info;
  389. if (mfd->panel_info.type == MIPI_VIDEO_PANEL)
  390. mfd->dest = DISPLAY_LCDC;
  391. else
  392. mfd->dest = DISPLAY_LCD;
  393. if (mdp_rev == MDP_REV_303 &&
  394. mipi_dsi_pdata->get_lane_config) {
  395. if (mipi_dsi_pdata->get_lane_config() != 2) {
  396. pr_info("Changing to DSI Single Mode Configuration\n");
  397. #ifdef CONFIG_FB_MSM_MDP303
  398. update_lane_config(pinfo);
  399. #endif
  400. }
  401. }
  402. if (mfd->index == 0)
  403. mfd->fb_imgType = MSMFB_DEFAULT_TYPE;
  404. else
  405. mfd->fb_imgType = MDP_RGB_565;
  406. fbi = mfd->fbi;
  407. fbi->var.pixclock = mfd->panel_info.clk_rate;
  408. fbi->var.left_margin = mfd->panel_info.lcdc.h_back_porch;
  409. fbi->var.right_margin = mfd->panel_info.lcdc.h_front_porch;
  410. fbi->var.upper_margin = mfd->panel_info.lcdc.v_back_porch;
  411. fbi->var.lower_margin = mfd->panel_info.lcdc.v_front_porch;
  412. fbi->var.hsync_len = mfd->panel_info.lcdc.h_pulse_width;
  413. fbi->var.vsync_len = mfd->panel_info.lcdc.v_pulse_width;
  414. h_period = ((mfd->panel_info.lcdc.h_pulse_width)
  415. + (mfd->panel_info.lcdc.h_back_porch)
  416. + (mfd->panel_info.xres)
  417. + (mfd->panel_info.lcdc.h_front_porch));
  418. v_period = ((mfd->panel_info.lcdc.v_pulse_width)
  419. + (mfd->panel_info.lcdc.v_back_porch)
  420. + (mfd->panel_info.yres)
  421. + (mfd->panel_info.lcdc.v_front_porch));
  422. mipi = &mfd->panel_info.mipi;
  423. if (mipi->data_lane3)
  424. lanes += 1;
  425. if (mipi->data_lane2)
  426. lanes += 1;
  427. if (mipi->data_lane1)
  428. lanes += 1;
  429. if (mipi->data_lane0)
  430. lanes += 1;
  431. if ((mipi->dst_format == DSI_CMD_DST_FORMAT_RGB888)
  432. || (mipi->dst_format == DSI_VIDEO_DST_FORMAT_RGB888)
  433. || (mipi->dst_format == DSI_VIDEO_DST_FORMAT_RGB666_LOOSE))
  434. bpp = 3;
  435. else if ((mipi->dst_format == DSI_CMD_DST_FORMAT_RGB565)
  436. || (mipi->dst_format == DSI_VIDEO_DST_FORMAT_RGB565))
  437. bpp = 2;
  438. else
  439. bpp = 3; /* Default format set to RGB888 */
  440. if (mfd->panel_info.type == MIPI_VIDEO_PANEL &&
  441. !mfd->panel_info.clk_rate) {
  442. h_period += mfd->panel_info.lcdc.xres_pad;
  443. v_period += mfd->panel_info.lcdc.yres_pad;
  444. if (lanes > 0) {
  445. mfd->panel_info.clk_rate =
  446. ((h_period * v_period * (mipi->frame_rate) * bpp * 8)
  447. / lanes);
  448. } else {
  449. pr_err("%s: forcing mipi_dsi lanes to 1\n", __func__);
  450. mfd->panel_info.clk_rate =
  451. (h_period * v_period
  452. * (mipi->frame_rate) * bpp * 8);
  453. }
  454. }
  455. pll_divider_config.clk_rate = mfd->panel_info.clk_rate;
  456. rc = mipi_dsi_clk_div_config(bpp, lanes, &dsi_pclk_rate);
  457. if (rc)
  458. goto mipi_dsi_probe_err;
  459. if ((dsi_pclk_rate < 3300000) || (dsi_pclk_rate > 223000000)) {
  460. pr_err("%s: Pixel clock not supported\n", __func__);
  461. dsi_pclk_rate = 35000000;
  462. }
  463. mipi->dsi_pclk_rate = dsi_pclk_rate;
  464. /*
  465. * set driver data
  466. */
  467. platform_set_drvdata(mdp_dev, mfd);
  468. /*
  469. * register in mdp driver
  470. */
  471. rc = platform_device_add(mdp_dev);
  472. if (rc)
  473. goto mipi_dsi_probe_err;
  474. pdev_list[pdev_list_cnt++] = pdev;
  475. if (!mfd->cont_splash_done)
  476. cont_splash_clk_ctrl(1);
  477. return 0;
  478. mipi_dsi_probe_err:
  479. platform_device_put(mdp_dev);
  480. return rc;
  481. }
  482. static int mipi_dsi_remove(struct platform_device *pdev)
  483. {
  484. struct msm_fb_data_type *mfd;
  485. mfd = platform_get_drvdata(pdev);
  486. iounmap(mipi_dsi_base);
  487. return 0;
  488. }
  489. static int mipi_dsi_register_driver(void)
  490. {
  491. return platform_driver_register(&mipi_dsi_driver);
  492. }
  493. static int __init mipi_dsi_driver_init(void)
  494. {
  495. int ret;
  496. mipi_dsi_init();
  497. ret = mipi_dsi_register_driver();
  498. device_initialize(&dsi_dev);
  499. if (ret) {
  500. pr_err("mipi_dsi_register_driver() failed!\n");
  501. return ret;
  502. }
  503. return ret;
  504. }
  505. module_init(mipi_dsi_driver_init);