nwpserial.c 11 KB

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  1. /*
  2. * Serial Port driver for a NWP uart device
  3. *
  4. * Copyright (C) 2008 IBM Corp., Benjamin Krill <ben@codiert.org>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. *
  11. */
  12. #include <linux/init.h>
  13. #include <linux/export.h>
  14. #include <linux/console.h>
  15. #include <linux/serial.h>
  16. #include <linux/serial_reg.h>
  17. #include <linux/serial_core.h>
  18. #include <linux/tty.h>
  19. #include <linux/tty_flip.h>
  20. #include <linux/irqreturn.h>
  21. #include <linux/mutex.h>
  22. #include <linux/of_platform.h>
  23. #include <linux/of_device.h>
  24. #include <linux/nwpserial.h>
  25. #include <asm/prom.h>
  26. #include <asm/dcr.h>
  27. #define NWPSERIAL_NR 2
  28. #define NWPSERIAL_STATUS_RXVALID 0x1
  29. #define NWPSERIAL_STATUS_TXFULL 0x2
  30. struct nwpserial_port {
  31. struct uart_port port;
  32. dcr_host_t dcr_host;
  33. unsigned int ier;
  34. unsigned int mcr;
  35. };
  36. static DEFINE_MUTEX(nwpserial_mutex);
  37. static struct nwpserial_port nwpserial_ports[NWPSERIAL_NR];
  38. static void wait_for_bits(struct nwpserial_port *up, int bits)
  39. {
  40. unsigned int status, tmout = 10000;
  41. /* Wait up to 10ms for the character(s) to be sent. */
  42. do {
  43. status = dcr_read(up->dcr_host, UART_LSR);
  44. if (--tmout == 0)
  45. break;
  46. udelay(1);
  47. } while ((status & bits) != bits);
  48. }
  49. #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL_CONSOLE
  50. static void nwpserial_console_putchar(struct uart_port *port, int c)
  51. {
  52. struct nwpserial_port *up;
  53. up = container_of(port, struct nwpserial_port, port);
  54. /* check if tx buffer is full */
  55. wait_for_bits(up, UART_LSR_THRE);
  56. dcr_write(up->dcr_host, UART_TX, c);
  57. up->port.icount.tx++;
  58. }
  59. static void
  60. nwpserial_console_write(struct console *co, const char *s, unsigned int count)
  61. {
  62. struct nwpserial_port *up = &nwpserial_ports[co->index];
  63. unsigned long flags;
  64. int locked = 1;
  65. if (oops_in_progress)
  66. locked = spin_trylock_irqsave(&up->port.lock, flags);
  67. else
  68. spin_lock_irqsave(&up->port.lock, flags);
  69. /* save and disable interrupt */
  70. up->ier = dcr_read(up->dcr_host, UART_IER);
  71. dcr_write(up->dcr_host, UART_IER, up->ier & ~UART_IER_RDI);
  72. uart_console_write(&up->port, s, count, nwpserial_console_putchar);
  73. /* wait for transmitter to become empty */
  74. while ((dcr_read(up->dcr_host, UART_LSR) & UART_LSR_THRE) == 0)
  75. cpu_relax();
  76. /* restore interrupt state */
  77. dcr_write(up->dcr_host, UART_IER, up->ier);
  78. if (locked)
  79. spin_unlock_irqrestore(&up->port.lock, flags);
  80. }
  81. static struct uart_driver nwpserial_reg;
  82. static struct console nwpserial_console = {
  83. .name = "ttySQ",
  84. .write = nwpserial_console_write,
  85. .device = uart_console_device,
  86. .flags = CON_PRINTBUFFER,
  87. .index = -1,
  88. .data = &nwpserial_reg,
  89. };
  90. #define NWPSERIAL_CONSOLE (&nwpserial_console)
  91. #else
  92. #define NWPSERIAL_CONSOLE NULL
  93. #endif /* CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL_CONSOLE */
  94. /**************************************************************************/
  95. static int nwpserial_request_port(struct uart_port *port)
  96. {
  97. return 0;
  98. }
  99. static void nwpserial_release_port(struct uart_port *port)
  100. {
  101. /* N/A */
  102. }
  103. static void nwpserial_config_port(struct uart_port *port, int flags)
  104. {
  105. port->type = PORT_NWPSERIAL;
  106. }
  107. static irqreturn_t nwpserial_interrupt(int irq, void *dev_id)
  108. {
  109. struct nwpserial_port *up = dev_id;
  110. struct tty_struct *tty = up->port.state->port.tty;
  111. irqreturn_t ret;
  112. unsigned int iir;
  113. unsigned char ch;
  114. spin_lock(&up->port.lock);
  115. /* check if the uart was the interrupt source. */
  116. iir = dcr_read(up->dcr_host, UART_IIR);
  117. if (!iir) {
  118. ret = IRQ_NONE;
  119. goto out;
  120. }
  121. do {
  122. up->port.icount.rx++;
  123. ch = dcr_read(up->dcr_host, UART_RX);
  124. if (up->port.ignore_status_mask != NWPSERIAL_STATUS_RXVALID)
  125. tty_insert_flip_char(tty, ch, TTY_NORMAL);
  126. } while (dcr_read(up->dcr_host, UART_LSR) & UART_LSR_DR);
  127. tty_flip_buffer_push(tty);
  128. ret = IRQ_HANDLED;
  129. /* clear interrupt */
  130. dcr_write(up->dcr_host, UART_IIR, 1);
  131. out:
  132. spin_unlock(&up->port.lock);
  133. return ret;
  134. }
  135. static int nwpserial_startup(struct uart_port *port)
  136. {
  137. struct nwpserial_port *up;
  138. int err;
  139. up = container_of(port, struct nwpserial_port, port);
  140. /* disable flow control by default */
  141. up->mcr = dcr_read(up->dcr_host, UART_MCR) & ~UART_MCR_AFE;
  142. dcr_write(up->dcr_host, UART_MCR, up->mcr);
  143. /* register interrupt handler */
  144. err = request_irq(up->port.irq, nwpserial_interrupt,
  145. IRQF_SHARED, "nwpserial", up);
  146. if (err)
  147. return err;
  148. /* enable interrupts */
  149. up->ier = UART_IER_RDI;
  150. dcr_write(up->dcr_host, UART_IER, up->ier);
  151. /* enable receiving */
  152. up->port.ignore_status_mask &= ~NWPSERIAL_STATUS_RXVALID;
  153. return 0;
  154. }
  155. static void nwpserial_shutdown(struct uart_port *port)
  156. {
  157. struct nwpserial_port *up;
  158. up = container_of(port, struct nwpserial_port, port);
  159. /* disable receiving */
  160. up->port.ignore_status_mask |= NWPSERIAL_STATUS_RXVALID;
  161. /* disable interrupts from this port */
  162. up->ier = 0;
  163. dcr_write(up->dcr_host, UART_IER, up->ier);
  164. /* free irq */
  165. free_irq(up->port.irq, port);
  166. }
  167. static int nwpserial_verify_port(struct uart_port *port,
  168. struct serial_struct *ser)
  169. {
  170. return -EINVAL;
  171. }
  172. static const char *nwpserial_type(struct uart_port *port)
  173. {
  174. return port->type == PORT_NWPSERIAL ? "nwpserial" : NULL;
  175. }
  176. static void nwpserial_set_termios(struct uart_port *port,
  177. struct ktermios *termios, struct ktermios *old)
  178. {
  179. struct nwpserial_port *up;
  180. up = container_of(port, struct nwpserial_port, port);
  181. up->port.read_status_mask = NWPSERIAL_STATUS_RXVALID
  182. | NWPSERIAL_STATUS_TXFULL;
  183. up->port.ignore_status_mask = 0;
  184. /* ignore all characters if CREAD is not set */
  185. if ((termios->c_cflag & CREAD) == 0)
  186. up->port.ignore_status_mask |= NWPSERIAL_STATUS_RXVALID;
  187. /* Copy back the old hardware settings */
  188. if (old)
  189. tty_termios_copy_hw(termios, old);
  190. }
  191. static void nwpserial_break_ctl(struct uart_port *port, int ctl)
  192. {
  193. /* N/A */
  194. }
  195. static void nwpserial_enable_ms(struct uart_port *port)
  196. {
  197. /* N/A */
  198. }
  199. static void nwpserial_stop_rx(struct uart_port *port)
  200. {
  201. struct nwpserial_port *up;
  202. up = container_of(port, struct nwpserial_port, port);
  203. /* don't forward any more data (like !CREAD) */
  204. up->port.ignore_status_mask = NWPSERIAL_STATUS_RXVALID;
  205. }
  206. static void nwpserial_putchar(struct nwpserial_port *up, unsigned char c)
  207. {
  208. /* check if tx buffer is full */
  209. wait_for_bits(up, UART_LSR_THRE);
  210. dcr_write(up->dcr_host, UART_TX, c);
  211. up->port.icount.tx++;
  212. }
  213. static void nwpserial_start_tx(struct uart_port *port)
  214. {
  215. struct nwpserial_port *up;
  216. struct circ_buf *xmit;
  217. up = container_of(port, struct nwpserial_port, port);
  218. xmit = &up->port.state->xmit;
  219. if (port->x_char) {
  220. nwpserial_putchar(up, up->port.x_char);
  221. port->x_char = 0;
  222. }
  223. while (!(uart_circ_empty(xmit) || uart_tx_stopped(&up->port))) {
  224. nwpserial_putchar(up, xmit->buf[xmit->tail]);
  225. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
  226. }
  227. }
  228. static unsigned int nwpserial_get_mctrl(struct uart_port *port)
  229. {
  230. return 0;
  231. }
  232. static void nwpserial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  233. {
  234. /* N/A */
  235. }
  236. static void nwpserial_stop_tx(struct uart_port *port)
  237. {
  238. /* N/A */
  239. }
  240. static unsigned int nwpserial_tx_empty(struct uart_port *port)
  241. {
  242. struct nwpserial_port *up;
  243. unsigned long flags;
  244. int ret;
  245. up = container_of(port, struct nwpserial_port, port);
  246. spin_lock_irqsave(&up->port.lock, flags);
  247. ret = dcr_read(up->dcr_host, UART_LSR);
  248. spin_unlock_irqrestore(&up->port.lock, flags);
  249. return ret & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  250. }
  251. static struct uart_ops nwpserial_pops = {
  252. .tx_empty = nwpserial_tx_empty,
  253. .set_mctrl = nwpserial_set_mctrl,
  254. .get_mctrl = nwpserial_get_mctrl,
  255. .stop_tx = nwpserial_stop_tx,
  256. .start_tx = nwpserial_start_tx,
  257. .stop_rx = nwpserial_stop_rx,
  258. .enable_ms = nwpserial_enable_ms,
  259. .break_ctl = nwpserial_break_ctl,
  260. .startup = nwpserial_startup,
  261. .shutdown = nwpserial_shutdown,
  262. .set_termios = nwpserial_set_termios,
  263. .type = nwpserial_type,
  264. .release_port = nwpserial_release_port,
  265. .request_port = nwpserial_request_port,
  266. .config_port = nwpserial_config_port,
  267. .verify_port = nwpserial_verify_port,
  268. };
  269. static struct uart_driver nwpserial_reg = {
  270. .owner = THIS_MODULE,
  271. .driver_name = "nwpserial",
  272. .dev_name = "ttySQ",
  273. .major = TTY_MAJOR,
  274. .minor = 68,
  275. .nr = NWPSERIAL_NR,
  276. .cons = NWPSERIAL_CONSOLE,
  277. };
  278. int nwpserial_register_port(struct uart_port *port)
  279. {
  280. struct nwpserial_port *up = NULL;
  281. int ret = -1;
  282. int i;
  283. static int first = 1;
  284. int dcr_len;
  285. int dcr_base;
  286. struct device_node *dn;
  287. mutex_lock(&nwpserial_mutex);
  288. dn = port->dev->of_node;
  289. if (dn == NULL)
  290. goto out;
  291. /* get dcr base. */
  292. dcr_base = dcr_resource_start(dn, 0);
  293. /* find matching entry */
  294. for (i = 0; i < NWPSERIAL_NR; i++)
  295. if (nwpserial_ports[i].port.iobase == dcr_base) {
  296. up = &nwpserial_ports[i];
  297. break;
  298. }
  299. /* we didn't find a mtching entry, search for a free port */
  300. if (up == NULL)
  301. for (i = 0; i < NWPSERIAL_NR; i++)
  302. if (nwpserial_ports[i].port.type == PORT_UNKNOWN &&
  303. nwpserial_ports[i].port.iobase == 0) {
  304. up = &nwpserial_ports[i];
  305. break;
  306. }
  307. if (up == NULL) {
  308. ret = -EBUSY;
  309. goto out;
  310. }
  311. if (first)
  312. uart_register_driver(&nwpserial_reg);
  313. first = 0;
  314. up->port.membase = port->membase;
  315. up->port.irq = port->irq;
  316. up->port.uartclk = port->uartclk;
  317. up->port.fifosize = port->fifosize;
  318. up->port.regshift = port->regshift;
  319. up->port.iotype = port->iotype;
  320. up->port.flags = port->flags;
  321. up->port.mapbase = port->mapbase;
  322. up->port.private_data = port->private_data;
  323. if (port->dev)
  324. up->port.dev = port->dev;
  325. if (up->port.iobase != dcr_base) {
  326. up->port.ops = &nwpserial_pops;
  327. up->port.fifosize = 16;
  328. spin_lock_init(&up->port.lock);
  329. up->port.iobase = dcr_base;
  330. dcr_len = dcr_resource_len(dn, 0);
  331. up->dcr_host = dcr_map(dn, dcr_base, dcr_len);
  332. if (!DCR_MAP_OK(up->dcr_host)) {
  333. printk(KERN_ERR "Cannot map DCR resources for NWPSERIAL");
  334. goto out;
  335. }
  336. }
  337. ret = uart_add_one_port(&nwpserial_reg, &up->port);
  338. if (ret == 0)
  339. ret = up->port.line;
  340. out:
  341. mutex_unlock(&nwpserial_mutex);
  342. return ret;
  343. }
  344. EXPORT_SYMBOL(nwpserial_register_port);
  345. void nwpserial_unregister_port(int line)
  346. {
  347. struct nwpserial_port *up = &nwpserial_ports[line];
  348. mutex_lock(&nwpserial_mutex);
  349. uart_remove_one_port(&nwpserial_reg, &up->port);
  350. up->port.type = PORT_UNKNOWN;
  351. mutex_unlock(&nwpserial_mutex);
  352. }
  353. EXPORT_SYMBOL(nwpserial_unregister_port);
  354. #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL_CONSOLE
  355. static int __init nwpserial_console_init(void)
  356. {
  357. struct nwpserial_port *up = NULL;
  358. struct device_node *dn;
  359. const char *name;
  360. int dcr_base;
  361. int dcr_len;
  362. int i;
  363. /* search for a free port */
  364. for (i = 0; i < NWPSERIAL_NR; i++)
  365. if (nwpserial_ports[i].port.type == PORT_UNKNOWN) {
  366. up = &nwpserial_ports[i];
  367. break;
  368. }
  369. if (up == NULL)
  370. return -1;
  371. name = of_get_property(of_chosen, "linux,stdout-path", NULL);
  372. if (name == NULL)
  373. return -1;
  374. dn = of_find_node_by_path(name);
  375. if (!dn)
  376. return -1;
  377. spin_lock_init(&up->port.lock);
  378. up->port.ops = &nwpserial_pops;
  379. up->port.type = PORT_NWPSERIAL;
  380. up->port.fifosize = 16;
  381. dcr_base = dcr_resource_start(dn, 0);
  382. dcr_len = dcr_resource_len(dn, 0);
  383. up->port.iobase = dcr_base;
  384. up->dcr_host = dcr_map(dn, dcr_base, dcr_len);
  385. if (!DCR_MAP_OK(up->dcr_host)) {
  386. printk("Cannot map DCR resources for SERIAL");
  387. return -1;
  388. }
  389. register_console(&nwpserial_console);
  390. return 0;
  391. }
  392. console_initcall(nwpserial_console_init);
  393. #endif /* CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL_CONSOLE */