carma-fpga.c 37 KB

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  1. /*
  2. * CARMA DATA-FPGA Access Driver
  3. *
  4. * Copyright (c) 2009-2011 Ira W. Snyder <iws@ovro.caltech.edu>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. /*
  12. * FPGA Memory Dump Format
  13. *
  14. * FPGA #0 control registers (32 x 32-bit words)
  15. * FPGA #1 control registers (32 x 32-bit words)
  16. * FPGA #2 control registers (32 x 32-bit words)
  17. * FPGA #3 control registers (32 x 32-bit words)
  18. * SYSFPGA control registers (32 x 32-bit words)
  19. * FPGA #0 correlation array (NUM_CORL0 correlation blocks)
  20. * FPGA #1 correlation array (NUM_CORL1 correlation blocks)
  21. * FPGA #2 correlation array (NUM_CORL2 correlation blocks)
  22. * FPGA #3 correlation array (NUM_CORL3 correlation blocks)
  23. *
  24. * Each correlation array consists of:
  25. *
  26. * Correlation Data (2 x NUM_LAGSn x 32-bit words)
  27. * Pipeline Metadata (2 x NUM_METAn x 32-bit words)
  28. * Quantization Counters (2 x NUM_QCNTn x 32-bit words)
  29. *
  30. * The NUM_CORLn, NUM_LAGSn, NUM_METAn, and NUM_QCNTn values come from
  31. * the FPGA configuration registers. They do not change once the FPGA's
  32. * have been programmed, they only change on re-programming.
  33. */
  34. /*
  35. * Basic Description:
  36. *
  37. * This driver is used to capture correlation spectra off of the four data
  38. * processing FPGAs. The FPGAs are often reprogrammed at runtime, therefore
  39. * this driver supports dynamic enable/disable of capture while the device
  40. * remains open.
  41. *
  42. * The nominal capture rate is 64Hz (every 15.625ms). To facilitate this fast
  43. * capture rate, all buffers are pre-allocated to avoid any potentially long
  44. * running memory allocations while capturing.
  45. *
  46. * There are two lists and one pointer which are used to keep track of the
  47. * different states of data buffers.
  48. *
  49. * 1) free list
  50. * This list holds all empty data buffers which are ready to receive data.
  51. *
  52. * 2) inflight pointer
  53. * This pointer holds the currently inflight data buffer. This buffer is having
  54. * data copied into it by the DMA engine.
  55. *
  56. * 3) used list
  57. * This list holds data buffers which have been filled, and are waiting to be
  58. * read by userspace.
  59. *
  60. * All buffers start life on the free list, then move successively to the
  61. * inflight pointer, and then to the used list. After they have been read by
  62. * userspace, they are moved back to the free list. The cycle repeats as long
  63. * as necessary.
  64. *
  65. * It should be noted that all buffers are mapped and ready for DMA when they
  66. * are on any of the three lists. They are only unmapped when they are in the
  67. * process of being read by userspace.
  68. */
  69. /*
  70. * Notes on the IRQ masking scheme:
  71. *
  72. * The IRQ masking scheme here is different than most other hardware. The only
  73. * way for the DATA-FPGAs to detect if the kernel has taken too long to copy
  74. * the data is if the status registers are not cleared before the next
  75. * correlation data dump is ready.
  76. *
  77. * The interrupt line is connected to the status registers, such that when they
  78. * are cleared, the interrupt is de-asserted. Therein lies our problem. We need
  79. * to schedule a long-running DMA operation and return from the interrupt
  80. * handler quickly, but we cannot clear the status registers.
  81. *
  82. * To handle this, the system controller FPGA has the capability to connect the
  83. * interrupt line to a user-controlled GPIO pin. This pin is driven high
  84. * (unasserted) and left that way. To mask the interrupt, we change the
  85. * interrupt source to the GPIO pin. Tada, we hid the interrupt. :)
  86. */
  87. #include <linux/of_platform.h>
  88. #include <linux/dma-mapping.h>
  89. #include <linux/miscdevice.h>
  90. #include <linux/interrupt.h>
  91. #include <linux/dmaengine.h>
  92. #include <linux/seq_file.h>
  93. #include <linux/highmem.h>
  94. #include <linux/debugfs.h>
  95. #include <linux/kernel.h>
  96. #include <linux/module.h>
  97. #include <linux/poll.h>
  98. #include <linux/init.h>
  99. #include <linux/slab.h>
  100. #include <linux/kref.h>
  101. #include <linux/io.h>
  102. #include <media/videobuf-dma-sg.h>
  103. /* system controller registers */
  104. #define SYS_IRQ_SOURCE_CTL 0x24
  105. #define SYS_IRQ_OUTPUT_EN 0x28
  106. #define SYS_IRQ_OUTPUT_DATA 0x2C
  107. #define SYS_IRQ_INPUT_DATA 0x30
  108. #define SYS_FPGA_CONFIG_STATUS 0x44
  109. /* GPIO IRQ line assignment */
  110. #define IRQ_CORL_DONE 0x10
  111. /* FPGA registers */
  112. #define MMAP_REG_VERSION 0x00
  113. #define MMAP_REG_CORL_CONF1 0x08
  114. #define MMAP_REG_CORL_CONF2 0x0C
  115. #define MMAP_REG_STATUS 0x48
  116. #define SYS_FPGA_BLOCK 0xF0000000
  117. #define DATA_FPGA_START 0x400000
  118. #define DATA_FPGA_SIZE 0x80000
  119. static const char drv_name[] = "carma-fpga";
  120. #define NUM_FPGA 4
  121. #define MIN_DATA_BUFS 8
  122. #define MAX_DATA_BUFS 64
  123. struct fpga_info {
  124. unsigned int num_lag_ram;
  125. unsigned int blk_size;
  126. };
  127. struct data_buf {
  128. struct list_head entry;
  129. struct videobuf_dmabuf vb;
  130. size_t size;
  131. };
  132. struct fpga_device {
  133. /* character device */
  134. struct miscdevice miscdev;
  135. struct device *dev;
  136. struct mutex mutex;
  137. /* reference count */
  138. struct kref ref;
  139. /* FPGA registers and information */
  140. struct fpga_info info[NUM_FPGA];
  141. void __iomem *regs;
  142. int irq;
  143. /* FPGA Physical Address/Size Information */
  144. resource_size_t phys_addr;
  145. size_t phys_size;
  146. /* DMA structures */
  147. struct sg_table corl_table;
  148. unsigned int corl_nents;
  149. struct dma_chan *chan;
  150. /* Protection for all members below */
  151. spinlock_t lock;
  152. /* Device enable/disable flag */
  153. bool enabled;
  154. /* Correlation data buffers */
  155. wait_queue_head_t wait;
  156. struct list_head free;
  157. struct list_head used;
  158. struct data_buf *inflight;
  159. /* Information about data buffers */
  160. unsigned int num_dropped;
  161. unsigned int num_buffers;
  162. size_t bufsize;
  163. struct dentry *dbg_entry;
  164. };
  165. struct fpga_reader {
  166. struct fpga_device *priv;
  167. struct data_buf *buf;
  168. off_t buf_start;
  169. };
  170. static void fpga_device_release(struct kref *ref)
  171. {
  172. struct fpga_device *priv = container_of(ref, struct fpga_device, ref);
  173. /* the last reader has exited, cleanup the last bits */
  174. mutex_destroy(&priv->mutex);
  175. kfree(priv);
  176. }
  177. /*
  178. * Data Buffer Allocation Helpers
  179. */
  180. /**
  181. * data_free_buffer() - free a single data buffer and all allocated memory
  182. * @buf: the buffer to free
  183. *
  184. * This will free all of the pages allocated to the given data buffer, and
  185. * then free the structure itself
  186. */
  187. static void data_free_buffer(struct data_buf *buf)
  188. {
  189. /* It is ok to free a NULL buffer */
  190. if (!buf)
  191. return;
  192. /* free all memory */
  193. videobuf_dma_free(&buf->vb);
  194. kfree(buf);
  195. }
  196. /**
  197. * data_alloc_buffer() - allocate and fill a data buffer with pages
  198. * @bytes: the number of bytes required
  199. *
  200. * This allocates all space needed for a data buffer. It must be mapped before
  201. * use in a DMA transaction using videobuf_dma_map().
  202. *
  203. * Returns NULL on failure
  204. */
  205. static struct data_buf *data_alloc_buffer(const size_t bytes)
  206. {
  207. unsigned int nr_pages;
  208. struct data_buf *buf;
  209. int ret;
  210. /* calculate the number of pages necessary */
  211. nr_pages = DIV_ROUND_UP(bytes, PAGE_SIZE);
  212. /* allocate the buffer structure */
  213. buf = kzalloc(sizeof(*buf), GFP_KERNEL);
  214. if (!buf)
  215. goto out_return;
  216. /* initialize internal fields */
  217. INIT_LIST_HEAD(&buf->entry);
  218. buf->size = bytes;
  219. /* allocate the videobuf */
  220. videobuf_dma_init(&buf->vb);
  221. ret = videobuf_dma_init_kernel(&buf->vb, DMA_FROM_DEVICE, nr_pages);
  222. if (ret)
  223. goto out_free_buf;
  224. return buf;
  225. out_free_buf:
  226. kfree(buf);
  227. out_return:
  228. return NULL;
  229. }
  230. /**
  231. * data_free_buffers() - free all allocated buffers
  232. * @priv: the driver's private data structure
  233. *
  234. * Free all buffers allocated by the driver (except those currently in the
  235. * process of being read by userspace).
  236. *
  237. * LOCKING: must hold dev->mutex
  238. * CONTEXT: user
  239. */
  240. static void data_free_buffers(struct fpga_device *priv)
  241. {
  242. struct data_buf *buf, *tmp;
  243. /* the device should be stopped, no DMA in progress */
  244. BUG_ON(priv->inflight != NULL);
  245. list_for_each_entry_safe(buf, tmp, &priv->free, entry) {
  246. list_del_init(&buf->entry);
  247. videobuf_dma_unmap(priv->dev, &buf->vb);
  248. data_free_buffer(buf);
  249. }
  250. list_for_each_entry_safe(buf, tmp, &priv->used, entry) {
  251. list_del_init(&buf->entry);
  252. videobuf_dma_unmap(priv->dev, &buf->vb);
  253. data_free_buffer(buf);
  254. }
  255. priv->num_buffers = 0;
  256. priv->bufsize = 0;
  257. }
  258. /**
  259. * data_alloc_buffers() - allocate 1 seconds worth of data buffers
  260. * @priv: the driver's private data structure
  261. *
  262. * Allocate enough buffers for a whole second worth of data
  263. *
  264. * This routine will attempt to degrade nicely by succeeding even if a full
  265. * second worth of data buffers could not be allocated, as long as a minimum
  266. * number were allocated. In this case, it will print a message to the kernel
  267. * log.
  268. *
  269. * The device must not be modifying any lists when this is called.
  270. *
  271. * CONTEXT: user
  272. * LOCKING: must hold dev->mutex
  273. *
  274. * Returns 0 on success, -ERRNO otherwise
  275. */
  276. static int data_alloc_buffers(struct fpga_device *priv)
  277. {
  278. struct data_buf *buf;
  279. int i, ret;
  280. for (i = 0; i < MAX_DATA_BUFS; i++) {
  281. /* allocate a buffer */
  282. buf = data_alloc_buffer(priv->bufsize);
  283. if (!buf)
  284. break;
  285. /* map it for DMA */
  286. ret = videobuf_dma_map(priv->dev, &buf->vb);
  287. if (ret) {
  288. data_free_buffer(buf);
  289. break;
  290. }
  291. /* add it to the list of free buffers */
  292. list_add_tail(&buf->entry, &priv->free);
  293. priv->num_buffers++;
  294. }
  295. /* Make sure we allocated the minimum required number of buffers */
  296. if (priv->num_buffers < MIN_DATA_BUFS) {
  297. dev_err(priv->dev, "Unable to allocate enough data buffers\n");
  298. data_free_buffers(priv);
  299. return -ENOMEM;
  300. }
  301. /* Warn if we are running in a degraded state, but do not fail */
  302. if (priv->num_buffers < MAX_DATA_BUFS) {
  303. dev_warn(priv->dev,
  304. "Unable to allocate %d buffers, using %d buffers instead\n",
  305. MAX_DATA_BUFS, i);
  306. }
  307. return 0;
  308. }
  309. /*
  310. * DMA Operations Helpers
  311. */
  312. /**
  313. * fpga_start_addr() - get the physical address a DATA-FPGA
  314. * @priv: the driver's private data structure
  315. * @fpga: the DATA-FPGA number (zero based)
  316. */
  317. static dma_addr_t fpga_start_addr(struct fpga_device *priv, unsigned int fpga)
  318. {
  319. return priv->phys_addr + 0x400000 + (0x80000 * fpga);
  320. }
  321. /**
  322. * fpga_block_addr() - get the physical address of a correlation data block
  323. * @priv: the driver's private data structure
  324. * @fpga: the DATA-FPGA number (zero based)
  325. * @blknum: the correlation block number (zero based)
  326. */
  327. static dma_addr_t fpga_block_addr(struct fpga_device *priv, unsigned int fpga,
  328. unsigned int blknum)
  329. {
  330. return fpga_start_addr(priv, fpga) + (0x10000 * (1 + blknum));
  331. }
  332. #define REG_BLOCK_SIZE (32 * 4)
  333. /**
  334. * data_setup_corl_table() - create the scatterlist for correlation dumps
  335. * @priv: the driver's private data structure
  336. *
  337. * Create the scatterlist for transferring a correlation dump from the
  338. * DATA FPGAs. This structure will be reused for each buffer than needs
  339. * to be filled with correlation data.
  340. *
  341. * Returns 0 on success, -ERRNO otherwise
  342. */
  343. static int data_setup_corl_table(struct fpga_device *priv)
  344. {
  345. struct sg_table *table = &priv->corl_table;
  346. struct scatterlist *sg;
  347. struct fpga_info *info;
  348. int i, j, ret;
  349. /* Calculate the number of entries needed */
  350. priv->corl_nents = (1 + NUM_FPGA) * REG_BLOCK_SIZE;
  351. for (i = 0; i < NUM_FPGA; i++)
  352. priv->corl_nents += priv->info[i].num_lag_ram;
  353. /* Allocate the scatterlist table */
  354. ret = sg_alloc_table(table, priv->corl_nents, GFP_KERNEL);
  355. if (ret) {
  356. dev_err(priv->dev, "unable to allocate DMA table\n");
  357. return ret;
  358. }
  359. /* Add the DATA FPGA registers to the scatterlist */
  360. sg = table->sgl;
  361. for (i = 0; i < NUM_FPGA; i++) {
  362. sg_dma_address(sg) = fpga_start_addr(priv, i);
  363. sg_dma_len(sg) = REG_BLOCK_SIZE;
  364. sg = sg_next(sg);
  365. }
  366. /* Add the SYS-FPGA registers to the scatterlist */
  367. sg_dma_address(sg) = SYS_FPGA_BLOCK;
  368. sg_dma_len(sg) = REG_BLOCK_SIZE;
  369. sg = sg_next(sg);
  370. /* Add the FPGA correlation data blocks to the scatterlist */
  371. for (i = 0; i < NUM_FPGA; i++) {
  372. info = &priv->info[i];
  373. for (j = 0; j < info->num_lag_ram; j++) {
  374. sg_dma_address(sg) = fpga_block_addr(priv, i, j);
  375. sg_dma_len(sg) = info->blk_size;
  376. sg = sg_next(sg);
  377. }
  378. }
  379. /*
  380. * All physical addresses and lengths are present in the structure
  381. * now. It can be reused for every FPGA DATA interrupt
  382. */
  383. return 0;
  384. }
  385. /*
  386. * FPGA Register Access Helpers
  387. */
  388. static void fpga_write_reg(struct fpga_device *priv, unsigned int fpga,
  389. unsigned int reg, u32 val)
  390. {
  391. const int fpga_start = DATA_FPGA_START + (fpga * DATA_FPGA_SIZE);
  392. iowrite32be(val, priv->regs + fpga_start + reg);
  393. }
  394. static u32 fpga_read_reg(struct fpga_device *priv, unsigned int fpga,
  395. unsigned int reg)
  396. {
  397. const int fpga_start = DATA_FPGA_START + (fpga * DATA_FPGA_SIZE);
  398. return ioread32be(priv->regs + fpga_start + reg);
  399. }
  400. /**
  401. * data_calculate_bufsize() - calculate the data buffer size required
  402. * @priv: the driver's private data structure
  403. *
  404. * Calculate the total buffer size needed to hold a single block
  405. * of correlation data
  406. *
  407. * CONTEXT: user
  408. *
  409. * Returns 0 on success, -ERRNO otherwise
  410. */
  411. static int data_calculate_bufsize(struct fpga_device *priv)
  412. {
  413. u32 num_corl, num_lags, num_meta, num_qcnt, num_pack;
  414. u32 conf1, conf2, version;
  415. u32 num_lag_ram, blk_size;
  416. int i;
  417. /* Each buffer starts with the 5 FPGA register areas */
  418. priv->bufsize = (1 + NUM_FPGA) * REG_BLOCK_SIZE;
  419. /* Read and store the configuration data for each FPGA */
  420. for (i = 0; i < NUM_FPGA; i++) {
  421. version = fpga_read_reg(priv, i, MMAP_REG_VERSION);
  422. conf1 = fpga_read_reg(priv, i, MMAP_REG_CORL_CONF1);
  423. conf2 = fpga_read_reg(priv, i, MMAP_REG_CORL_CONF2);
  424. /* minor version 2 and later */
  425. if ((version & 0x000000FF) >= 2) {
  426. num_corl = (conf1 & 0x000000F0) >> 4;
  427. num_pack = (conf1 & 0x00000F00) >> 8;
  428. num_lags = (conf1 & 0x00FFF000) >> 12;
  429. num_meta = (conf1 & 0x7F000000) >> 24;
  430. num_qcnt = (conf2 & 0x00000FFF) >> 0;
  431. } else {
  432. num_corl = (conf1 & 0x000000F0) >> 4;
  433. num_pack = 1; /* implied */
  434. num_lags = (conf1 & 0x000FFF00) >> 8;
  435. num_meta = (conf1 & 0x7FF00000) >> 20;
  436. num_qcnt = (conf2 & 0x00000FFF) >> 0;
  437. }
  438. num_lag_ram = (num_corl + num_pack - 1) / num_pack;
  439. blk_size = ((num_pack * num_lags) + num_meta + num_qcnt) * 8;
  440. priv->info[i].num_lag_ram = num_lag_ram;
  441. priv->info[i].blk_size = blk_size;
  442. priv->bufsize += num_lag_ram * blk_size;
  443. dev_dbg(priv->dev, "FPGA %d NUM_CORL: %d\n", i, num_corl);
  444. dev_dbg(priv->dev, "FPGA %d NUM_PACK: %d\n", i, num_pack);
  445. dev_dbg(priv->dev, "FPGA %d NUM_LAGS: %d\n", i, num_lags);
  446. dev_dbg(priv->dev, "FPGA %d NUM_META: %d\n", i, num_meta);
  447. dev_dbg(priv->dev, "FPGA %d NUM_QCNT: %d\n", i, num_qcnt);
  448. dev_dbg(priv->dev, "FPGA %d BLK_SIZE: %d\n", i, blk_size);
  449. }
  450. dev_dbg(priv->dev, "TOTAL BUFFER SIZE: %zu bytes\n", priv->bufsize);
  451. return 0;
  452. }
  453. /*
  454. * Interrupt Handling
  455. */
  456. /**
  457. * data_disable_interrupts() - stop the device from generating interrupts
  458. * @priv: the driver's private data structure
  459. *
  460. * Hide interrupts by switching to GPIO interrupt source
  461. *
  462. * LOCKING: must hold dev->lock
  463. */
  464. static void data_disable_interrupts(struct fpga_device *priv)
  465. {
  466. /* hide the interrupt by switching the IRQ driver to GPIO */
  467. iowrite32be(0x2F, priv->regs + SYS_IRQ_SOURCE_CTL);
  468. }
  469. /**
  470. * data_enable_interrupts() - allow the device to generate interrupts
  471. * @priv: the driver's private data structure
  472. *
  473. * Unhide interrupts by switching to the FPGA interrupt source. At the
  474. * same time, clear the DATA-FPGA status registers.
  475. *
  476. * LOCKING: must hold dev->lock
  477. */
  478. static void data_enable_interrupts(struct fpga_device *priv)
  479. {
  480. /* clear the actual FPGA corl_done interrupt */
  481. fpga_write_reg(priv, 0, MMAP_REG_STATUS, 0x0);
  482. fpga_write_reg(priv, 1, MMAP_REG_STATUS, 0x0);
  483. fpga_write_reg(priv, 2, MMAP_REG_STATUS, 0x0);
  484. fpga_write_reg(priv, 3, MMAP_REG_STATUS, 0x0);
  485. /* flush the writes */
  486. fpga_read_reg(priv, 0, MMAP_REG_STATUS);
  487. fpga_read_reg(priv, 1, MMAP_REG_STATUS);
  488. fpga_read_reg(priv, 2, MMAP_REG_STATUS);
  489. fpga_read_reg(priv, 3, MMAP_REG_STATUS);
  490. /* switch back to the external interrupt source */
  491. iowrite32be(0x3F, priv->regs + SYS_IRQ_SOURCE_CTL);
  492. }
  493. /**
  494. * data_dma_cb() - DMAEngine callback for DMA completion
  495. * @data: the driver's private data structure
  496. *
  497. * Complete a DMA transfer from the DATA-FPGA's
  498. *
  499. * This is called via the DMA callback mechanism, and will handle moving the
  500. * completed DMA transaction to the used list, and then wake any processes
  501. * waiting for new data
  502. *
  503. * CONTEXT: any, softirq expected
  504. */
  505. static void data_dma_cb(void *data)
  506. {
  507. struct fpga_device *priv = data;
  508. unsigned long flags;
  509. spin_lock_irqsave(&priv->lock, flags);
  510. /* If there is no inflight buffer, we've got a bug */
  511. BUG_ON(priv->inflight == NULL);
  512. /* Move the inflight buffer onto the used list */
  513. list_move_tail(&priv->inflight->entry, &priv->used);
  514. priv->inflight = NULL;
  515. /*
  516. * If data dumping is still enabled, then clear the FPGA
  517. * status registers and re-enable FPGA interrupts
  518. */
  519. if (priv->enabled)
  520. data_enable_interrupts(priv);
  521. spin_unlock_irqrestore(&priv->lock, flags);
  522. /*
  523. * We've changed both the inflight and used lists, so we need
  524. * to wake up any processes that are blocking for those events
  525. */
  526. wake_up(&priv->wait);
  527. }
  528. /**
  529. * data_submit_dma() - prepare and submit the required DMA to fill a buffer
  530. * @priv: the driver's private data structure
  531. * @buf: the data buffer
  532. *
  533. * Prepare and submit the necessary DMA transactions to fill a correlation
  534. * data buffer.
  535. *
  536. * LOCKING: must hold dev->lock
  537. * CONTEXT: hardirq only
  538. *
  539. * Returns 0 on success, -ERRNO otherwise
  540. */
  541. static int data_submit_dma(struct fpga_device *priv, struct data_buf *buf)
  542. {
  543. struct scatterlist *dst_sg, *src_sg;
  544. unsigned int dst_nents, src_nents;
  545. struct dma_chan *chan = priv->chan;
  546. struct dma_async_tx_descriptor *tx;
  547. dma_cookie_t cookie;
  548. dma_addr_t dst, src;
  549. dst_sg = buf->vb.sglist;
  550. dst_nents = buf->vb.sglen;
  551. src_sg = priv->corl_table.sgl;
  552. src_nents = priv->corl_nents;
  553. /*
  554. * All buffers passed to this function should be ready and mapped
  555. * for DMA already. Therefore, we don't need to do anything except
  556. * submit it to the Freescale DMA Engine for processing
  557. */
  558. /* setup the scatterlist to scatterlist transfer */
  559. tx = chan->device->device_prep_dma_sg(chan,
  560. dst_sg, dst_nents,
  561. src_sg, src_nents,
  562. 0);
  563. if (!tx) {
  564. dev_err(priv->dev, "unable to prep scatterlist DMA\n");
  565. return -ENOMEM;
  566. }
  567. /* submit the transaction to the DMA controller */
  568. cookie = tx->tx_submit(tx);
  569. if (dma_submit_error(cookie)) {
  570. dev_err(priv->dev, "unable to submit scatterlist DMA\n");
  571. return -ENOMEM;
  572. }
  573. /* Prepare the re-read of the SYS-FPGA block */
  574. dst = sg_dma_address(dst_sg) + (NUM_FPGA * REG_BLOCK_SIZE);
  575. src = SYS_FPGA_BLOCK;
  576. tx = chan->device->device_prep_dma_memcpy(chan, dst, src,
  577. REG_BLOCK_SIZE,
  578. DMA_PREP_INTERRUPT);
  579. if (!tx) {
  580. dev_err(priv->dev, "unable to prep SYS-FPGA DMA\n");
  581. return -ENOMEM;
  582. }
  583. /* Setup the callback */
  584. tx->callback = data_dma_cb;
  585. tx->callback_param = priv;
  586. /* submit the transaction to the DMA controller */
  587. cookie = tx->tx_submit(tx);
  588. if (dma_submit_error(cookie)) {
  589. dev_err(priv->dev, "unable to submit SYS-FPGA DMA\n");
  590. return -ENOMEM;
  591. }
  592. return 0;
  593. }
  594. #define CORL_DONE 0x1
  595. #define CORL_ERR 0x2
  596. static irqreturn_t data_irq(int irq, void *dev_id)
  597. {
  598. struct fpga_device *priv = dev_id;
  599. bool submitted = false;
  600. struct data_buf *buf;
  601. u32 status;
  602. int i;
  603. /* detect spurious interrupts via FPGA status */
  604. for (i = 0; i < 4; i++) {
  605. status = fpga_read_reg(priv, i, MMAP_REG_STATUS);
  606. if (!(status & (CORL_DONE | CORL_ERR))) {
  607. dev_err(priv->dev, "spurious irq detected (FPGA)\n");
  608. return IRQ_NONE;
  609. }
  610. }
  611. /* detect spurious interrupts via raw IRQ pin readback */
  612. status = ioread32be(priv->regs + SYS_IRQ_INPUT_DATA);
  613. if (status & IRQ_CORL_DONE) {
  614. dev_err(priv->dev, "spurious irq detected (IRQ)\n");
  615. return IRQ_NONE;
  616. }
  617. spin_lock(&priv->lock);
  618. /*
  619. * This is an error case that should never happen.
  620. *
  621. * If this driver has a bug and manages to re-enable interrupts while
  622. * a DMA is in progress, then we will hit this statement and should
  623. * start paying attention immediately.
  624. */
  625. BUG_ON(priv->inflight != NULL);
  626. /* hide the interrupt by switching the IRQ driver to GPIO */
  627. data_disable_interrupts(priv);
  628. /* If there are no free buffers, drop this data */
  629. if (list_empty(&priv->free)) {
  630. priv->num_dropped++;
  631. goto out;
  632. }
  633. buf = list_first_entry(&priv->free, struct data_buf, entry);
  634. list_del_init(&buf->entry);
  635. BUG_ON(buf->size != priv->bufsize);
  636. /* Submit a DMA transfer to get the correlation data */
  637. if (data_submit_dma(priv, buf)) {
  638. dev_err(priv->dev, "Unable to setup DMA transfer\n");
  639. list_move_tail(&buf->entry, &priv->free);
  640. goto out;
  641. }
  642. /* Save the buffer for the DMA callback */
  643. priv->inflight = buf;
  644. submitted = true;
  645. /* Start the DMA Engine */
  646. dma_async_memcpy_issue_pending(priv->chan);
  647. out:
  648. /* If no DMA was submitted, re-enable interrupts */
  649. if (!submitted)
  650. data_enable_interrupts(priv);
  651. spin_unlock(&priv->lock);
  652. return IRQ_HANDLED;
  653. }
  654. /*
  655. * Realtime Device Enable Helpers
  656. */
  657. /**
  658. * data_device_enable() - enable the device for buffered dumping
  659. * @priv: the driver's private data structure
  660. *
  661. * Enable the device for buffered dumping. Allocates buffers and hooks up
  662. * the interrupt handler. When this finishes, data will come pouring in.
  663. *
  664. * LOCKING: must hold dev->mutex
  665. * CONTEXT: user context only
  666. *
  667. * Returns 0 on success, -ERRNO otherwise
  668. */
  669. static int data_device_enable(struct fpga_device *priv)
  670. {
  671. bool enabled;
  672. u32 val;
  673. int ret;
  674. /* multiple enables are safe: they do nothing */
  675. spin_lock_irq(&priv->lock);
  676. enabled = priv->enabled;
  677. spin_unlock_irq(&priv->lock);
  678. if (enabled)
  679. return 0;
  680. /* check that the FPGAs are programmed */
  681. val = ioread32be(priv->regs + SYS_FPGA_CONFIG_STATUS);
  682. if (!(val & (1 << 18))) {
  683. dev_err(priv->dev, "DATA-FPGAs are not enabled\n");
  684. return -ENODATA;
  685. }
  686. /* read the FPGAs to calculate the buffer size */
  687. ret = data_calculate_bufsize(priv);
  688. if (ret) {
  689. dev_err(priv->dev, "unable to calculate buffer size\n");
  690. goto out_error;
  691. }
  692. /* allocate the correlation data buffers */
  693. ret = data_alloc_buffers(priv);
  694. if (ret) {
  695. dev_err(priv->dev, "unable to allocate buffers\n");
  696. goto out_error;
  697. }
  698. /* setup the source scatterlist for dumping correlation data */
  699. ret = data_setup_corl_table(priv);
  700. if (ret) {
  701. dev_err(priv->dev, "unable to setup correlation DMA table\n");
  702. goto out_error;
  703. }
  704. /* prevent the FPGAs from generating interrupts */
  705. data_disable_interrupts(priv);
  706. /* hookup the irq handler */
  707. ret = request_irq(priv->irq, data_irq, IRQF_SHARED, drv_name, priv);
  708. if (ret) {
  709. dev_err(priv->dev, "unable to request IRQ handler\n");
  710. goto out_error;
  711. }
  712. /* allow the DMA callback to re-enable FPGA interrupts */
  713. spin_lock_irq(&priv->lock);
  714. priv->enabled = true;
  715. spin_unlock_irq(&priv->lock);
  716. /* allow the FPGAs to generate interrupts */
  717. data_enable_interrupts(priv);
  718. return 0;
  719. out_error:
  720. sg_free_table(&priv->corl_table);
  721. priv->corl_nents = 0;
  722. data_free_buffers(priv);
  723. return ret;
  724. }
  725. /**
  726. * data_device_disable() - disable the device for buffered dumping
  727. * @priv: the driver's private data structure
  728. *
  729. * Disable the device for buffered dumping. Stops new DMA transactions from
  730. * being generated, waits for all outstanding DMA to complete, and then frees
  731. * all buffers.
  732. *
  733. * LOCKING: must hold dev->mutex
  734. * CONTEXT: user only
  735. *
  736. * Returns 0 on success, -ERRNO otherwise
  737. */
  738. static int data_device_disable(struct fpga_device *priv)
  739. {
  740. spin_lock_irq(&priv->lock);
  741. /* allow multiple disable */
  742. if (!priv->enabled) {
  743. spin_unlock_irq(&priv->lock);
  744. return 0;
  745. }
  746. /*
  747. * Mark the device disabled
  748. *
  749. * This stops DMA callbacks from re-enabling interrupts
  750. */
  751. priv->enabled = false;
  752. /* prevent the FPGAs from generating interrupts */
  753. data_disable_interrupts(priv);
  754. /* wait until all ongoing DMA has finished */
  755. while (priv->inflight != NULL) {
  756. spin_unlock_irq(&priv->lock);
  757. wait_event(priv->wait, priv->inflight == NULL);
  758. spin_lock_irq(&priv->lock);
  759. }
  760. spin_unlock_irq(&priv->lock);
  761. /* unhook the irq handler */
  762. free_irq(priv->irq, priv);
  763. /* free the correlation table */
  764. sg_free_table(&priv->corl_table);
  765. priv->corl_nents = 0;
  766. /* free all buffers: the free and used lists are not being changed */
  767. data_free_buffers(priv);
  768. return 0;
  769. }
  770. /*
  771. * DEBUGFS Interface
  772. */
  773. #ifdef CONFIG_DEBUG_FS
  774. /*
  775. * Count the number of entries in the given list
  776. */
  777. static unsigned int list_num_entries(struct list_head *list)
  778. {
  779. struct list_head *entry;
  780. unsigned int ret = 0;
  781. list_for_each(entry, list)
  782. ret++;
  783. return ret;
  784. }
  785. static int data_debug_show(struct seq_file *f, void *offset)
  786. {
  787. struct fpga_device *priv = f->private;
  788. spin_lock_irq(&priv->lock);
  789. seq_printf(f, "enabled: %d\n", priv->enabled);
  790. seq_printf(f, "bufsize: %d\n", priv->bufsize);
  791. seq_printf(f, "num_buffers: %d\n", priv->num_buffers);
  792. seq_printf(f, "num_free: %d\n", list_num_entries(&priv->free));
  793. seq_printf(f, "inflight: %d\n", priv->inflight != NULL);
  794. seq_printf(f, "num_used: %d\n", list_num_entries(&priv->used));
  795. seq_printf(f, "num_dropped: %d\n", priv->num_dropped);
  796. spin_unlock_irq(&priv->lock);
  797. return 0;
  798. }
  799. static int data_debug_open(struct inode *inode, struct file *file)
  800. {
  801. return single_open(file, data_debug_show, inode->i_private);
  802. }
  803. static const struct file_operations data_debug_fops = {
  804. .owner = THIS_MODULE,
  805. .open = data_debug_open,
  806. .read = seq_read,
  807. .llseek = seq_lseek,
  808. .release = single_release,
  809. };
  810. static int data_debugfs_init(struct fpga_device *priv)
  811. {
  812. priv->dbg_entry = debugfs_create_file(drv_name, S_IRUGO, NULL, priv,
  813. &data_debug_fops);
  814. if (IS_ERR(priv->dbg_entry))
  815. return PTR_ERR(priv->dbg_entry);
  816. return 0;
  817. }
  818. static void data_debugfs_exit(struct fpga_device *priv)
  819. {
  820. debugfs_remove(priv->dbg_entry);
  821. }
  822. #else
  823. static inline int data_debugfs_init(struct fpga_device *priv)
  824. {
  825. return 0;
  826. }
  827. static inline void data_debugfs_exit(struct fpga_device *priv)
  828. {
  829. }
  830. #endif /* CONFIG_DEBUG_FS */
  831. /*
  832. * SYSFS Attributes
  833. */
  834. static ssize_t data_en_show(struct device *dev, struct device_attribute *attr,
  835. char *buf)
  836. {
  837. struct fpga_device *priv = dev_get_drvdata(dev);
  838. int ret;
  839. spin_lock_irq(&priv->lock);
  840. ret = snprintf(buf, PAGE_SIZE, "%u\n", priv->enabled);
  841. spin_unlock_irq(&priv->lock);
  842. return ret;
  843. }
  844. static ssize_t data_en_set(struct device *dev, struct device_attribute *attr,
  845. const char *buf, size_t count)
  846. {
  847. struct fpga_device *priv = dev_get_drvdata(dev);
  848. unsigned long enable;
  849. int ret;
  850. ret = strict_strtoul(buf, 0, &enable);
  851. if (ret) {
  852. dev_err(priv->dev, "unable to parse enable input\n");
  853. return -EINVAL;
  854. }
  855. /* protect against concurrent enable/disable */
  856. ret = mutex_lock_interruptible(&priv->mutex);
  857. if (ret)
  858. return ret;
  859. if (enable)
  860. ret = data_device_enable(priv);
  861. else
  862. ret = data_device_disable(priv);
  863. if (ret) {
  864. dev_err(priv->dev, "device %s failed\n",
  865. enable ? "enable" : "disable");
  866. count = ret;
  867. goto out_unlock;
  868. }
  869. out_unlock:
  870. mutex_unlock(&priv->mutex);
  871. return count;
  872. }
  873. static DEVICE_ATTR(enable, S_IWUSR | S_IRUGO, data_en_show, data_en_set);
  874. static struct attribute *data_sysfs_attrs[] = {
  875. &dev_attr_enable.attr,
  876. NULL,
  877. };
  878. static const struct attribute_group rt_sysfs_attr_group = {
  879. .attrs = data_sysfs_attrs,
  880. };
  881. /*
  882. * FPGA Realtime Data Character Device
  883. */
  884. static int data_open(struct inode *inode, struct file *filp)
  885. {
  886. /*
  887. * The miscdevice layer puts our struct miscdevice into the
  888. * filp->private_data field. We use this to find our private
  889. * data and then overwrite it with our own private structure.
  890. */
  891. struct fpga_device *priv = container_of(filp->private_data,
  892. struct fpga_device, miscdev);
  893. struct fpga_reader *reader;
  894. int ret;
  895. /* allocate private data */
  896. reader = kzalloc(sizeof(*reader), GFP_KERNEL);
  897. if (!reader)
  898. return -ENOMEM;
  899. reader->priv = priv;
  900. reader->buf = NULL;
  901. filp->private_data = reader;
  902. ret = nonseekable_open(inode, filp);
  903. if (ret) {
  904. dev_err(priv->dev, "nonseekable-open failed\n");
  905. kfree(reader);
  906. return ret;
  907. }
  908. /*
  909. * success, increase the reference count of the private data structure
  910. * so that it doesn't disappear if the device is unbound
  911. */
  912. kref_get(&priv->ref);
  913. return 0;
  914. }
  915. static int data_release(struct inode *inode, struct file *filp)
  916. {
  917. struct fpga_reader *reader = filp->private_data;
  918. struct fpga_device *priv = reader->priv;
  919. /* free the per-reader structure */
  920. data_free_buffer(reader->buf);
  921. kfree(reader);
  922. filp->private_data = NULL;
  923. /* decrement our reference count to the private data */
  924. kref_put(&priv->ref, fpga_device_release);
  925. return 0;
  926. }
  927. static ssize_t data_read(struct file *filp, char __user *ubuf, size_t count,
  928. loff_t *f_pos)
  929. {
  930. struct fpga_reader *reader = filp->private_data;
  931. struct fpga_device *priv = reader->priv;
  932. struct list_head *used = &priv->used;
  933. bool drop_buffer = false;
  934. struct data_buf *dbuf;
  935. size_t avail;
  936. void *data;
  937. int ret;
  938. /* check if we already have a partial buffer */
  939. if (reader->buf) {
  940. dbuf = reader->buf;
  941. goto have_buffer;
  942. }
  943. spin_lock_irq(&priv->lock);
  944. /* Block until there is at least one buffer on the used list */
  945. while (list_empty(used)) {
  946. spin_unlock_irq(&priv->lock);
  947. if (filp->f_flags & O_NONBLOCK)
  948. return -EAGAIN;
  949. ret = wait_event_interruptible(priv->wait, !list_empty(used));
  950. if (ret)
  951. return ret;
  952. spin_lock_irq(&priv->lock);
  953. }
  954. /* Grab the first buffer off of the used list */
  955. dbuf = list_first_entry(used, struct data_buf, entry);
  956. list_del_init(&dbuf->entry);
  957. spin_unlock_irq(&priv->lock);
  958. /* Buffers are always mapped: unmap it */
  959. videobuf_dma_unmap(priv->dev, &dbuf->vb);
  960. /* save the buffer for later */
  961. reader->buf = dbuf;
  962. reader->buf_start = 0;
  963. have_buffer:
  964. /* Get the number of bytes available */
  965. avail = dbuf->size - reader->buf_start;
  966. data = dbuf->vb.vaddr + reader->buf_start;
  967. /* Get the number of bytes we can transfer */
  968. count = min(count, avail);
  969. /* Copy the data to the userspace buffer */
  970. if (copy_to_user(ubuf, data, count))
  971. return -EFAULT;
  972. /* Update the amount of available space */
  973. avail -= count;
  974. /*
  975. * If there is still some data available, save the buffer for the
  976. * next userspace call to read() and return
  977. */
  978. if (avail > 0) {
  979. reader->buf_start += count;
  980. reader->buf = dbuf;
  981. return count;
  982. }
  983. /*
  984. * Get the buffer ready to be reused for DMA
  985. *
  986. * If it fails, we pretend that the read never happed and return
  987. * -EFAULT to userspace. The read will be retried.
  988. */
  989. ret = videobuf_dma_map(priv->dev, &dbuf->vb);
  990. if (ret) {
  991. dev_err(priv->dev, "unable to remap buffer for DMA\n");
  992. return -EFAULT;
  993. }
  994. /* Lock against concurrent enable/disable */
  995. spin_lock_irq(&priv->lock);
  996. /* the reader is finished with this buffer */
  997. reader->buf = NULL;
  998. /*
  999. * One of two things has happened, the device is disabled, or the
  1000. * device has been reconfigured underneath us. In either case, we
  1001. * should just throw away the buffer.
  1002. *
  1003. * Lockdep complains if this is done under the spinlock, so we
  1004. * handle it during the unlock path.
  1005. */
  1006. if (!priv->enabled || dbuf->size != priv->bufsize) {
  1007. drop_buffer = true;
  1008. goto out_unlock;
  1009. }
  1010. /* The buffer is safe to reuse, so add it back to the free list */
  1011. list_add_tail(&dbuf->entry, &priv->free);
  1012. out_unlock:
  1013. spin_unlock_irq(&priv->lock);
  1014. if (drop_buffer) {
  1015. videobuf_dma_unmap(priv->dev, &dbuf->vb);
  1016. data_free_buffer(dbuf);
  1017. }
  1018. return count;
  1019. }
  1020. static unsigned int data_poll(struct file *filp, struct poll_table_struct *tbl)
  1021. {
  1022. struct fpga_reader *reader = filp->private_data;
  1023. struct fpga_device *priv = reader->priv;
  1024. unsigned int mask = 0;
  1025. poll_wait(filp, &priv->wait, tbl);
  1026. if (!list_empty(&priv->used))
  1027. mask |= POLLIN | POLLRDNORM;
  1028. return mask;
  1029. }
  1030. static int data_mmap(struct file *filp, struct vm_area_struct *vma)
  1031. {
  1032. struct fpga_reader *reader = filp->private_data;
  1033. struct fpga_device *priv = reader->priv;
  1034. unsigned long offset, vsize, psize, addr;
  1035. /* VMA properties */
  1036. offset = vma->vm_pgoff << PAGE_SHIFT;
  1037. vsize = vma->vm_end - vma->vm_start;
  1038. psize = priv->phys_size - offset;
  1039. addr = (priv->phys_addr + offset) >> PAGE_SHIFT;
  1040. /* Check against the FPGA region's physical memory size */
  1041. if (vsize > psize) {
  1042. dev_err(priv->dev, "requested mmap mapping too large\n");
  1043. return -EINVAL;
  1044. }
  1045. /* IO memory (stop cacheing) */
  1046. vma->vm_flags |= VM_IO | VM_RESERVED;
  1047. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  1048. return io_remap_pfn_range(vma, vma->vm_start, addr, vsize,
  1049. vma->vm_page_prot);
  1050. }
  1051. static const struct file_operations data_fops = {
  1052. .owner = THIS_MODULE,
  1053. .open = data_open,
  1054. .release = data_release,
  1055. .read = data_read,
  1056. .poll = data_poll,
  1057. .mmap = data_mmap,
  1058. .llseek = no_llseek,
  1059. };
  1060. /*
  1061. * OpenFirmware Device Subsystem
  1062. */
  1063. static bool dma_filter(struct dma_chan *chan, void *data)
  1064. {
  1065. /*
  1066. * DMA Channel #0 is used for the FPGA Programmer, so ignore it
  1067. *
  1068. * This probably won't survive an unload/load cycle of the Freescale
  1069. * DMAEngine driver, but that won't be a problem
  1070. */
  1071. if (chan->chan_id == 0 && chan->device->dev_id == 0)
  1072. return false;
  1073. return true;
  1074. }
  1075. static int data_of_probe(struct platform_device *op)
  1076. {
  1077. struct device_node *of_node = op->dev.of_node;
  1078. struct device *this_device;
  1079. struct fpga_device *priv;
  1080. struct resource res;
  1081. dma_cap_mask_t mask;
  1082. int ret;
  1083. /* Allocate private data */
  1084. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  1085. if (!priv) {
  1086. dev_err(&op->dev, "Unable to allocate device private data\n");
  1087. ret = -ENOMEM;
  1088. goto out_return;
  1089. }
  1090. dev_set_drvdata(&op->dev, priv);
  1091. priv->dev = &op->dev;
  1092. kref_init(&priv->ref);
  1093. mutex_init(&priv->mutex);
  1094. dev_set_drvdata(priv->dev, priv);
  1095. spin_lock_init(&priv->lock);
  1096. INIT_LIST_HEAD(&priv->free);
  1097. INIT_LIST_HEAD(&priv->used);
  1098. init_waitqueue_head(&priv->wait);
  1099. /* Setup the misc device */
  1100. priv->miscdev.minor = MISC_DYNAMIC_MINOR;
  1101. priv->miscdev.name = drv_name;
  1102. priv->miscdev.fops = &data_fops;
  1103. /* Get the physical address of the FPGA registers */
  1104. ret = of_address_to_resource(of_node, 0, &res);
  1105. if (ret) {
  1106. dev_err(&op->dev, "Unable to find FPGA physical address\n");
  1107. ret = -ENODEV;
  1108. goto out_free_priv;
  1109. }
  1110. priv->phys_addr = res.start;
  1111. priv->phys_size = resource_size(&res);
  1112. /* ioremap the registers for use */
  1113. priv->regs = of_iomap(of_node, 0);
  1114. if (!priv->regs) {
  1115. dev_err(&op->dev, "Unable to ioremap registers\n");
  1116. ret = -ENOMEM;
  1117. goto out_free_priv;
  1118. }
  1119. dma_cap_zero(mask);
  1120. dma_cap_set(DMA_MEMCPY, mask);
  1121. dma_cap_set(DMA_INTERRUPT, mask);
  1122. dma_cap_set(DMA_SLAVE, mask);
  1123. dma_cap_set(DMA_SG, mask);
  1124. /* Request a DMA channel */
  1125. priv->chan = dma_request_channel(mask, dma_filter, NULL);
  1126. if (!priv->chan) {
  1127. dev_err(&op->dev, "Unable to request DMA channel\n");
  1128. ret = -ENODEV;
  1129. goto out_unmap_regs;
  1130. }
  1131. /* Find the correct IRQ number */
  1132. priv->irq = irq_of_parse_and_map(of_node, 0);
  1133. if (priv->irq == NO_IRQ) {
  1134. dev_err(&op->dev, "Unable to find IRQ line\n");
  1135. ret = -ENODEV;
  1136. goto out_release_dma;
  1137. }
  1138. /* Drive the GPIO for FPGA IRQ high (no interrupt) */
  1139. iowrite32be(IRQ_CORL_DONE, priv->regs + SYS_IRQ_OUTPUT_DATA);
  1140. /* Register the miscdevice */
  1141. ret = misc_register(&priv->miscdev);
  1142. if (ret) {
  1143. dev_err(&op->dev, "Unable to register miscdevice\n");
  1144. goto out_irq_dispose_mapping;
  1145. }
  1146. /* Create the debugfs files */
  1147. ret = data_debugfs_init(priv);
  1148. if (ret) {
  1149. dev_err(&op->dev, "Unable to create debugfs files\n");
  1150. goto out_misc_deregister;
  1151. }
  1152. /* Create the sysfs files */
  1153. this_device = priv->miscdev.this_device;
  1154. dev_set_drvdata(this_device, priv);
  1155. ret = sysfs_create_group(&this_device->kobj, &rt_sysfs_attr_group);
  1156. if (ret) {
  1157. dev_err(&op->dev, "Unable to create sysfs files\n");
  1158. goto out_data_debugfs_exit;
  1159. }
  1160. dev_info(&op->dev, "CARMA FPGA Realtime Data Driver Loaded\n");
  1161. return 0;
  1162. out_data_debugfs_exit:
  1163. data_debugfs_exit(priv);
  1164. out_misc_deregister:
  1165. misc_deregister(&priv->miscdev);
  1166. out_irq_dispose_mapping:
  1167. irq_dispose_mapping(priv->irq);
  1168. out_release_dma:
  1169. dma_release_channel(priv->chan);
  1170. out_unmap_regs:
  1171. iounmap(priv->regs);
  1172. out_free_priv:
  1173. kref_put(&priv->ref, fpga_device_release);
  1174. out_return:
  1175. return ret;
  1176. }
  1177. static int data_of_remove(struct platform_device *op)
  1178. {
  1179. struct fpga_device *priv = dev_get_drvdata(&op->dev);
  1180. struct device *this_device = priv->miscdev.this_device;
  1181. /* remove all sysfs files, now the device cannot be re-enabled */
  1182. sysfs_remove_group(&this_device->kobj, &rt_sysfs_attr_group);
  1183. /* remove all debugfs files */
  1184. data_debugfs_exit(priv);
  1185. /* disable the device from generating data */
  1186. data_device_disable(priv);
  1187. /* remove the character device to stop new readers from appearing */
  1188. misc_deregister(&priv->miscdev);
  1189. /* cleanup everything not needed by readers */
  1190. irq_dispose_mapping(priv->irq);
  1191. dma_release_channel(priv->chan);
  1192. iounmap(priv->regs);
  1193. /* release our reference */
  1194. kref_put(&priv->ref, fpga_device_release);
  1195. return 0;
  1196. }
  1197. static struct of_device_id data_of_match[] = {
  1198. { .compatible = "carma,carma-fpga", },
  1199. {},
  1200. };
  1201. static struct platform_driver data_of_driver = {
  1202. .probe = data_of_probe,
  1203. .remove = data_of_remove,
  1204. .driver = {
  1205. .name = drv_name,
  1206. .of_match_table = data_of_match,
  1207. .owner = THIS_MODULE,
  1208. },
  1209. };
  1210. module_platform_driver(data_of_driver);
  1211. MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>");
  1212. MODULE_DESCRIPTION("CARMA DATA-FPGA Access Driver");
  1213. MODULE_LICENSE("GPL");