ctrl.c 7.1 KB

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  1. /*
  2. * CAAM control-plane driver backend
  3. * Controller-level driver, kernel property detection, initialization
  4. *
  5. * Copyright 2008-2011 Freescale Semiconductor, Inc.
  6. */
  7. #include "compat.h"
  8. #include "regs.h"
  9. #include "intern.h"
  10. #include "jr.h"
  11. static int caam_remove(struct platform_device *pdev)
  12. {
  13. struct device *ctrldev;
  14. struct caam_drv_private *ctrlpriv;
  15. struct caam_drv_private_jr *jrpriv;
  16. struct caam_full __iomem *topregs;
  17. int ring, ret = 0;
  18. ctrldev = &pdev->dev;
  19. ctrlpriv = dev_get_drvdata(ctrldev);
  20. topregs = (struct caam_full __iomem *)ctrlpriv->ctrl;
  21. /* shut down JobRs */
  22. for (ring = 0; ring < ctrlpriv->total_jobrs; ring++) {
  23. ret |= caam_jr_shutdown(ctrlpriv->jrdev[ring]);
  24. jrpriv = dev_get_drvdata(ctrlpriv->jrdev[ring]);
  25. irq_dispose_mapping(jrpriv->irq);
  26. }
  27. /* Shut down debug views */
  28. #ifdef CONFIG_DEBUG_FS
  29. debugfs_remove_recursive(ctrlpriv->dfs_root);
  30. #endif
  31. /* Unmap controller region */
  32. iounmap(&topregs->ctrl);
  33. kfree(ctrlpriv->jrdev);
  34. kfree(ctrlpriv);
  35. return ret;
  36. }
  37. /* Probe routine for CAAM top (controller) level */
  38. static int caam_probe(struct platform_device *pdev)
  39. {
  40. int ring, rspec;
  41. struct device *dev;
  42. struct device_node *nprop, *np;
  43. struct caam_ctrl __iomem *ctrl;
  44. struct caam_full __iomem *topregs;
  45. struct caam_drv_private *ctrlpriv;
  46. #ifdef CONFIG_DEBUG_FS
  47. struct caam_perfmon *perfmon;
  48. #endif
  49. ctrlpriv = kzalloc(sizeof(struct caam_drv_private), GFP_KERNEL);
  50. if (!ctrlpriv)
  51. return -ENOMEM;
  52. dev = &pdev->dev;
  53. dev_set_drvdata(dev, ctrlpriv);
  54. ctrlpriv->pdev = pdev;
  55. nprop = pdev->dev.of_node;
  56. /* Get configuration properties from device tree */
  57. /* First, get register page */
  58. ctrl = of_iomap(nprop, 0);
  59. if (ctrl == NULL) {
  60. dev_err(dev, "caam: of_iomap() failed\n");
  61. return -ENOMEM;
  62. }
  63. ctrlpriv->ctrl = (struct caam_ctrl __force *)ctrl;
  64. /* topregs used to derive pointers to CAAM sub-blocks only */
  65. topregs = (struct caam_full __iomem *)ctrl;
  66. /* Get the IRQ of the controller (for security violations only) */
  67. ctrlpriv->secvio_irq = of_irq_to_resource(nprop, 0, NULL);
  68. /*
  69. * Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT kernel,
  70. * 36-bit pointers in master configuration register
  71. */
  72. setbits32(&topregs->ctrl.mcr, MCFGR_WDENABLE |
  73. (sizeof(dma_addr_t) == sizeof(u64) ? MCFGR_LONG_PTR : 0));
  74. if (sizeof(dma_addr_t) == sizeof(u64))
  75. dma_set_mask(dev, DMA_BIT_MASK(36));
  76. /*
  77. * Detect and enable JobRs
  78. * First, find out how many ring spec'ed, allocate references
  79. * for all, then go probe each one.
  80. */
  81. rspec = 0;
  82. for_each_compatible_node(np, NULL, "fsl,sec-v4.0-job-ring")
  83. rspec++;
  84. ctrlpriv->jrdev = kzalloc(sizeof(struct device *) * rspec, GFP_KERNEL);
  85. if (ctrlpriv->jrdev == NULL) {
  86. iounmap(&topregs->ctrl);
  87. return -ENOMEM;
  88. }
  89. ring = 0;
  90. ctrlpriv->total_jobrs = 0;
  91. for_each_compatible_node(np, NULL, "fsl,sec-v4.0-job-ring") {
  92. caam_jr_probe(pdev, np, ring);
  93. ctrlpriv->total_jobrs++;
  94. ring++;
  95. }
  96. /* Check to see if QI present. If so, enable */
  97. ctrlpriv->qi_present = !!(rd_reg64(&topregs->ctrl.perfmon.comp_parms) &
  98. CTPR_QI_MASK);
  99. if (ctrlpriv->qi_present) {
  100. ctrlpriv->qi = (struct caam_queue_if __force *)&topregs->qi;
  101. /* This is all that's required to physically enable QI */
  102. wr_reg32(&topregs->qi.qi_control_lo, QICTL_DQEN);
  103. }
  104. /* If no QI and no rings specified, quit and go home */
  105. if ((!ctrlpriv->qi_present) && (!ctrlpriv->total_jobrs)) {
  106. dev_err(dev, "no queues configured, terminating\n");
  107. caam_remove(pdev);
  108. return -ENOMEM;
  109. }
  110. /* NOTE: RTIC detection ought to go here, around Si time */
  111. /* Initialize queue allocator lock */
  112. spin_lock_init(&ctrlpriv->jr_alloc_lock);
  113. /* Report "alive" for developer to see */
  114. dev_info(dev, "device ID = 0x%016llx\n",
  115. rd_reg64(&topregs->ctrl.perfmon.caam_id));
  116. dev_info(dev, "job rings = %d, qi = %d\n",
  117. ctrlpriv->total_jobrs, ctrlpriv->qi_present);
  118. #ifdef CONFIG_DEBUG_FS
  119. /*
  120. * FIXME: needs better naming distinction, as some amalgamation of
  121. * "caam" and nprop->full_name. The OF name isn't distinctive,
  122. * but does separate instances
  123. */
  124. perfmon = (struct caam_perfmon __force *)&ctrl->perfmon;
  125. ctrlpriv->dfs_root = debugfs_create_dir("caam", NULL);
  126. ctrlpriv->ctl = debugfs_create_dir("ctl", ctrlpriv->dfs_root);
  127. /* Controller-level - performance monitor counters */
  128. ctrlpriv->ctl_rq_dequeued =
  129. debugfs_create_u64("rq_dequeued",
  130. S_IRUSR | S_IRGRP | S_IROTH,
  131. ctrlpriv->ctl, &perfmon->req_dequeued);
  132. ctrlpriv->ctl_ob_enc_req =
  133. debugfs_create_u64("ob_rq_encrypted",
  134. S_IRUSR | S_IRGRP | S_IROTH,
  135. ctrlpriv->ctl, &perfmon->ob_enc_req);
  136. ctrlpriv->ctl_ib_dec_req =
  137. debugfs_create_u64("ib_rq_decrypted",
  138. S_IRUSR | S_IRGRP | S_IROTH,
  139. ctrlpriv->ctl, &perfmon->ib_dec_req);
  140. ctrlpriv->ctl_ob_enc_bytes =
  141. debugfs_create_u64("ob_bytes_encrypted",
  142. S_IRUSR | S_IRGRP | S_IROTH,
  143. ctrlpriv->ctl, &perfmon->ob_enc_bytes);
  144. ctrlpriv->ctl_ob_prot_bytes =
  145. debugfs_create_u64("ob_bytes_protected",
  146. S_IRUSR | S_IRGRP | S_IROTH,
  147. ctrlpriv->ctl, &perfmon->ob_prot_bytes);
  148. ctrlpriv->ctl_ib_dec_bytes =
  149. debugfs_create_u64("ib_bytes_decrypted",
  150. S_IRUSR | S_IRGRP | S_IROTH,
  151. ctrlpriv->ctl, &perfmon->ib_dec_bytes);
  152. ctrlpriv->ctl_ib_valid_bytes =
  153. debugfs_create_u64("ib_bytes_validated",
  154. S_IRUSR | S_IRGRP | S_IROTH,
  155. ctrlpriv->ctl, &perfmon->ib_valid_bytes);
  156. /* Controller level - global status values */
  157. ctrlpriv->ctl_faultaddr =
  158. debugfs_create_u64("fault_addr",
  159. S_IRUSR | S_IRGRP | S_IROTH,
  160. ctrlpriv->ctl, &perfmon->faultaddr);
  161. ctrlpriv->ctl_faultdetail =
  162. debugfs_create_u32("fault_detail",
  163. S_IRUSR | S_IRGRP | S_IROTH,
  164. ctrlpriv->ctl, &perfmon->faultdetail);
  165. ctrlpriv->ctl_faultstatus =
  166. debugfs_create_u32("fault_status",
  167. S_IRUSR | S_IRGRP | S_IROTH,
  168. ctrlpriv->ctl, &perfmon->status);
  169. /* Internal covering keys (useful in non-secure mode only) */
  170. ctrlpriv->ctl_kek_wrap.data = &ctrlpriv->ctrl->kek[0];
  171. ctrlpriv->ctl_kek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
  172. ctrlpriv->ctl_kek = debugfs_create_blob("kek",
  173. S_IRUSR |
  174. S_IRGRP | S_IROTH,
  175. ctrlpriv->ctl,
  176. &ctrlpriv->ctl_kek_wrap);
  177. ctrlpriv->ctl_tkek_wrap.data = &ctrlpriv->ctrl->tkek[0];
  178. ctrlpriv->ctl_tkek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
  179. ctrlpriv->ctl_tkek = debugfs_create_blob("tkek",
  180. S_IRUSR |
  181. S_IRGRP | S_IROTH,
  182. ctrlpriv->ctl,
  183. &ctrlpriv->ctl_tkek_wrap);
  184. ctrlpriv->ctl_tdsk_wrap.data = &ctrlpriv->ctrl->tdsk[0];
  185. ctrlpriv->ctl_tdsk_wrap.size = KEK_KEY_SIZE * sizeof(u32);
  186. ctrlpriv->ctl_tdsk = debugfs_create_blob("tdsk",
  187. S_IRUSR |
  188. S_IRGRP | S_IROTH,
  189. ctrlpriv->ctl,
  190. &ctrlpriv->ctl_tdsk_wrap);
  191. #endif
  192. return 0;
  193. }
  194. static struct of_device_id caam_match[] = {
  195. {
  196. .compatible = "fsl,sec-v4.0",
  197. },
  198. {},
  199. };
  200. MODULE_DEVICE_TABLE(of, caam_match);
  201. static struct platform_driver caam_driver = {
  202. .driver = {
  203. .name = "caam",
  204. .owner = THIS_MODULE,
  205. .of_match_table = caam_match,
  206. },
  207. .probe = caam_probe,
  208. .remove = __devexit_p(caam_remove),
  209. };
  210. module_platform_driver(caam_driver);
  211. MODULE_LICENSE("GPL");
  212. MODULE_DESCRIPTION("FSL CAAM request backend");
  213. MODULE_AUTHOR("Freescale Semiconductor - NMG/STC");