hw_breakpoint.c 12 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License as published by
  4. * the Free Software Foundation; either version 2 of the License, or
  5. * (at your option) any later version.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. * You should have received a copy of the GNU General Public License
  13. * along with this program; if not, write to the Free Software
  14. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  15. *
  16. * Copyright (C) 2007 Alan Stern
  17. * Copyright (C) 2009 IBM Corporation
  18. * Copyright (C) 2009 Frederic Weisbecker <fweisbec@gmail.com>
  19. *
  20. * Authors: Alan Stern <stern@rowland.harvard.edu>
  21. * K.Prasad <prasad@linux.vnet.ibm.com>
  22. * Frederic Weisbecker <fweisbec@gmail.com>
  23. */
  24. /*
  25. * HW_breakpoint: a unified kernel/user-space hardware breakpoint facility,
  26. * using the CPU's debug registers.
  27. */
  28. #include <linux/perf_event.h>
  29. #include <linux/hw_breakpoint.h>
  30. #include <linux/irqflags.h>
  31. #include <linux/notifier.h>
  32. #include <linux/kallsyms.h>
  33. #include <linux/kprobes.h>
  34. #include <linux/percpu.h>
  35. #include <linux/kdebug.h>
  36. #include <linux/kernel.h>
  37. #include <linux/module.h>
  38. #include <linux/sched.h>
  39. #include <linux/init.h>
  40. #include <linux/smp.h>
  41. #include <asm/hw_breakpoint.h>
  42. #include <asm/processor.h>
  43. #include <asm/debugreg.h>
  44. /* Per cpu debug control register value */
  45. DEFINE_PER_CPU(unsigned long, cpu_dr7);
  46. EXPORT_PER_CPU_SYMBOL(cpu_dr7);
  47. /* Per cpu debug address registers values */
  48. static DEFINE_PER_CPU(unsigned long, cpu_debugreg[HBP_NUM]);
  49. /*
  50. * Stores the breakpoints currently in use on each breakpoint address
  51. * register for each cpus
  52. */
  53. static DEFINE_PER_CPU(struct perf_event *, bp_per_reg[HBP_NUM]);
  54. static inline unsigned long
  55. __encode_dr7(int drnum, unsigned int len, unsigned int type)
  56. {
  57. unsigned long bp_info;
  58. bp_info = (len | type) & 0xf;
  59. bp_info <<= (DR_CONTROL_SHIFT + drnum * DR_CONTROL_SIZE);
  60. bp_info |= (DR_GLOBAL_ENABLE << (drnum * DR_ENABLE_SIZE));
  61. return bp_info;
  62. }
  63. /*
  64. * Encode the length, type, Exact, and Enable bits for a particular breakpoint
  65. * as stored in debug register 7.
  66. */
  67. unsigned long encode_dr7(int drnum, unsigned int len, unsigned int type)
  68. {
  69. return __encode_dr7(drnum, len, type) | DR_GLOBAL_SLOWDOWN;
  70. }
  71. /*
  72. * Decode the length and type bits for a particular breakpoint as
  73. * stored in debug register 7. Return the "enabled" status.
  74. */
  75. int decode_dr7(unsigned long dr7, int bpnum, unsigned *len, unsigned *type)
  76. {
  77. int bp_info = dr7 >> (DR_CONTROL_SHIFT + bpnum * DR_CONTROL_SIZE);
  78. *len = (bp_info & 0xc) | 0x40;
  79. *type = (bp_info & 0x3) | 0x80;
  80. return (dr7 >> (bpnum * DR_ENABLE_SIZE)) & 0x3;
  81. }
  82. /*
  83. * Install a perf counter breakpoint.
  84. *
  85. * We seek a free debug address register and use it for this
  86. * breakpoint. Eventually we enable it in the debug control register.
  87. *
  88. * Atomic: we hold the counter->ctx->lock and we only handle variables
  89. * and registers local to this cpu.
  90. */
  91. int arch_install_hw_breakpoint(struct perf_event *bp)
  92. {
  93. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  94. unsigned long *dr7;
  95. int i;
  96. for (i = 0; i < HBP_NUM; i++) {
  97. struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
  98. if (!*slot) {
  99. *slot = bp;
  100. break;
  101. }
  102. }
  103. if (WARN_ONCE(i == HBP_NUM, "Can't find any breakpoint slot"))
  104. return -EBUSY;
  105. set_debugreg(info->address, i);
  106. __this_cpu_write(cpu_debugreg[i], info->address);
  107. dr7 = &__get_cpu_var(cpu_dr7);
  108. *dr7 |= encode_dr7(i, info->len, info->type);
  109. set_debugreg(*dr7, 7);
  110. return 0;
  111. }
  112. /*
  113. * Uninstall the breakpoint contained in the given counter.
  114. *
  115. * First we search the debug address register it uses and then we disable
  116. * it.
  117. *
  118. * Atomic: we hold the counter->ctx->lock and we only handle variables
  119. * and registers local to this cpu.
  120. */
  121. void arch_uninstall_hw_breakpoint(struct perf_event *bp)
  122. {
  123. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  124. unsigned long *dr7;
  125. int i;
  126. for (i = 0; i < HBP_NUM; i++) {
  127. struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
  128. if (*slot == bp) {
  129. *slot = NULL;
  130. break;
  131. }
  132. }
  133. if (WARN_ONCE(i == HBP_NUM, "Can't find any breakpoint slot"))
  134. return;
  135. dr7 = &__get_cpu_var(cpu_dr7);
  136. *dr7 &= ~__encode_dr7(i, info->len, info->type);
  137. set_debugreg(*dr7, 7);
  138. }
  139. static int get_hbp_len(u8 hbp_len)
  140. {
  141. unsigned int len_in_bytes = 0;
  142. switch (hbp_len) {
  143. case X86_BREAKPOINT_LEN_1:
  144. len_in_bytes = 1;
  145. break;
  146. case X86_BREAKPOINT_LEN_2:
  147. len_in_bytes = 2;
  148. break;
  149. case X86_BREAKPOINT_LEN_4:
  150. len_in_bytes = 4;
  151. break;
  152. #ifdef CONFIG_X86_64
  153. case X86_BREAKPOINT_LEN_8:
  154. len_in_bytes = 8;
  155. break;
  156. #endif
  157. }
  158. return len_in_bytes;
  159. }
  160. /*
  161. * Check for virtual address in kernel space.
  162. */
  163. int arch_check_bp_in_kernelspace(struct perf_event *bp)
  164. {
  165. unsigned int len;
  166. unsigned long va;
  167. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  168. va = info->address;
  169. len = get_hbp_len(info->len);
  170. return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE);
  171. }
  172. int arch_bp_generic_fields(int x86_len, int x86_type,
  173. int *gen_len, int *gen_type)
  174. {
  175. /* Type */
  176. switch (x86_type) {
  177. case X86_BREAKPOINT_EXECUTE:
  178. if (x86_len != X86_BREAKPOINT_LEN_X)
  179. return -EINVAL;
  180. *gen_type = HW_BREAKPOINT_X;
  181. *gen_len = sizeof(long);
  182. return 0;
  183. case X86_BREAKPOINT_WRITE:
  184. *gen_type = HW_BREAKPOINT_W;
  185. break;
  186. case X86_BREAKPOINT_RW:
  187. *gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R;
  188. break;
  189. default:
  190. return -EINVAL;
  191. }
  192. /* Len */
  193. switch (x86_len) {
  194. case X86_BREAKPOINT_LEN_1:
  195. *gen_len = HW_BREAKPOINT_LEN_1;
  196. break;
  197. case X86_BREAKPOINT_LEN_2:
  198. *gen_len = HW_BREAKPOINT_LEN_2;
  199. break;
  200. case X86_BREAKPOINT_LEN_4:
  201. *gen_len = HW_BREAKPOINT_LEN_4;
  202. break;
  203. #ifdef CONFIG_X86_64
  204. case X86_BREAKPOINT_LEN_8:
  205. *gen_len = HW_BREAKPOINT_LEN_8;
  206. break;
  207. #endif
  208. default:
  209. return -EINVAL;
  210. }
  211. return 0;
  212. }
  213. static int arch_build_bp_info(struct perf_event *bp)
  214. {
  215. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  216. info->address = bp->attr.bp_addr;
  217. /* Type */
  218. switch (bp->attr.bp_type) {
  219. case HW_BREAKPOINT_W:
  220. info->type = X86_BREAKPOINT_WRITE;
  221. break;
  222. case HW_BREAKPOINT_W | HW_BREAKPOINT_R:
  223. info->type = X86_BREAKPOINT_RW;
  224. break;
  225. case HW_BREAKPOINT_X:
  226. info->type = X86_BREAKPOINT_EXECUTE;
  227. /*
  228. * x86 inst breakpoints need to have a specific undefined len.
  229. * But we still need to check userspace is not trying to setup
  230. * an unsupported length, to get a range breakpoint for example.
  231. */
  232. if (bp->attr.bp_len == sizeof(long)) {
  233. info->len = X86_BREAKPOINT_LEN_X;
  234. return 0;
  235. }
  236. default:
  237. return -EINVAL;
  238. }
  239. /* Len */
  240. switch (bp->attr.bp_len) {
  241. case HW_BREAKPOINT_LEN_1:
  242. info->len = X86_BREAKPOINT_LEN_1;
  243. break;
  244. case HW_BREAKPOINT_LEN_2:
  245. info->len = X86_BREAKPOINT_LEN_2;
  246. break;
  247. case HW_BREAKPOINT_LEN_4:
  248. info->len = X86_BREAKPOINT_LEN_4;
  249. break;
  250. #ifdef CONFIG_X86_64
  251. case HW_BREAKPOINT_LEN_8:
  252. info->len = X86_BREAKPOINT_LEN_8;
  253. break;
  254. #endif
  255. default:
  256. return -EINVAL;
  257. }
  258. return 0;
  259. }
  260. /*
  261. * Validate the arch-specific HW Breakpoint register settings
  262. */
  263. int arch_validate_hwbkpt_settings(struct perf_event *bp)
  264. {
  265. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  266. unsigned int align;
  267. int ret;
  268. ret = arch_build_bp_info(bp);
  269. if (ret)
  270. return ret;
  271. ret = -EINVAL;
  272. switch (info->len) {
  273. case X86_BREAKPOINT_LEN_1:
  274. align = 0;
  275. break;
  276. case X86_BREAKPOINT_LEN_2:
  277. align = 1;
  278. break;
  279. case X86_BREAKPOINT_LEN_4:
  280. align = 3;
  281. break;
  282. #ifdef CONFIG_X86_64
  283. case X86_BREAKPOINT_LEN_8:
  284. align = 7;
  285. break;
  286. #endif
  287. default:
  288. return ret;
  289. }
  290. /*
  291. * Check that the low-order bits of the address are appropriate
  292. * for the alignment implied by len.
  293. */
  294. if (info->address & align)
  295. return -EINVAL;
  296. return 0;
  297. }
  298. /*
  299. * Dump the debug register contents to the user.
  300. * We can't dump our per cpu values because it
  301. * may contain cpu wide breakpoint, something that
  302. * doesn't belong to the current task.
  303. *
  304. * TODO: include non-ptrace user breakpoints (perf)
  305. */
  306. void aout_dump_debugregs(struct user *dump)
  307. {
  308. int i;
  309. int dr7 = 0;
  310. struct perf_event *bp;
  311. struct arch_hw_breakpoint *info;
  312. struct thread_struct *thread = &current->thread;
  313. for (i = 0; i < HBP_NUM; i++) {
  314. bp = thread->ptrace_bps[i];
  315. if (bp && !bp->attr.disabled) {
  316. dump->u_debugreg[i] = bp->attr.bp_addr;
  317. info = counter_arch_bp(bp);
  318. dr7 |= encode_dr7(i, info->len, info->type);
  319. } else {
  320. dump->u_debugreg[i] = 0;
  321. }
  322. }
  323. dump->u_debugreg[4] = 0;
  324. dump->u_debugreg[5] = 0;
  325. dump->u_debugreg[6] = current->thread.debugreg6;
  326. dump->u_debugreg[7] = dr7;
  327. }
  328. EXPORT_SYMBOL_GPL(aout_dump_debugregs);
  329. /*
  330. * Release the user breakpoints used by ptrace
  331. */
  332. void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
  333. {
  334. int i;
  335. struct thread_struct *t = &tsk->thread;
  336. for (i = 0; i < HBP_NUM; i++) {
  337. unregister_hw_breakpoint(t->ptrace_bps[i]);
  338. t->ptrace_bps[i] = NULL;
  339. }
  340. }
  341. void hw_breakpoint_restore(void)
  342. {
  343. set_debugreg(__this_cpu_read(cpu_debugreg[0]), 0);
  344. set_debugreg(__this_cpu_read(cpu_debugreg[1]), 1);
  345. set_debugreg(__this_cpu_read(cpu_debugreg[2]), 2);
  346. set_debugreg(__this_cpu_read(cpu_debugreg[3]), 3);
  347. set_debugreg(current->thread.debugreg6, 6);
  348. set_debugreg(__this_cpu_read(cpu_dr7), 7);
  349. }
  350. EXPORT_SYMBOL_GPL(hw_breakpoint_restore);
  351. /*
  352. * Handle debug exception notifications.
  353. *
  354. * Return value is either NOTIFY_STOP or NOTIFY_DONE as explained below.
  355. *
  356. * NOTIFY_DONE returned if one of the following conditions is true.
  357. * i) When the causative address is from user-space and the exception
  358. * is a valid one, i.e. not triggered as a result of lazy debug register
  359. * switching
  360. * ii) When there are more bits than trap<n> set in DR6 register (such
  361. * as BD, BS or BT) indicating that more than one debug condition is
  362. * met and requires some more action in do_debug().
  363. *
  364. * NOTIFY_STOP returned for all other cases
  365. *
  366. */
  367. static int __kprobes hw_breakpoint_handler(struct die_args *args)
  368. {
  369. int i, cpu, rc = NOTIFY_STOP;
  370. struct perf_event *bp;
  371. unsigned long dr7, dr6;
  372. unsigned long *dr6_p;
  373. /* The DR6 value is pointed by args->err */
  374. dr6_p = (unsigned long *)ERR_PTR(args->err);
  375. dr6 = *dr6_p;
  376. /* If it's a single step, TRAP bits are random */
  377. if (dr6 & DR_STEP)
  378. return NOTIFY_DONE;
  379. /* Do an early return if no trap bits are set in DR6 */
  380. if ((dr6 & DR_TRAP_BITS) == 0)
  381. return NOTIFY_DONE;
  382. get_debugreg(dr7, 7);
  383. /* Disable breakpoints during exception handling */
  384. set_debugreg(0UL, 7);
  385. /*
  386. * Assert that local interrupts are disabled
  387. * Reset the DRn bits in the virtualized register value.
  388. * The ptrace trigger routine will add in whatever is needed.
  389. */
  390. current->thread.debugreg6 &= ~DR_TRAP_BITS;
  391. cpu = get_cpu();
  392. /* Handle all the breakpoints that were triggered */
  393. for (i = 0; i < HBP_NUM; ++i) {
  394. if (likely(!(dr6 & (DR_TRAP0 << i))))
  395. continue;
  396. /*
  397. * The counter may be concurrently released but that can only
  398. * occur from a call_rcu() path. We can then safely fetch
  399. * the breakpoint, use its callback, touch its counter
  400. * while we are in an rcu_read_lock() path.
  401. */
  402. rcu_read_lock();
  403. bp = per_cpu(bp_per_reg[i], cpu);
  404. /*
  405. * Reset the 'i'th TRAP bit in dr6 to denote completion of
  406. * exception handling
  407. */
  408. (*dr6_p) &= ~(DR_TRAP0 << i);
  409. /*
  410. * bp can be NULL due to lazy debug register switching
  411. * or due to concurrent perf counter removing.
  412. */
  413. if (!bp) {
  414. rcu_read_unlock();
  415. break;
  416. }
  417. perf_bp_event(bp, args->regs);
  418. /*
  419. * Set up resume flag to avoid breakpoint recursion when
  420. * returning back to origin.
  421. */
  422. if (bp->hw.info.type == X86_BREAKPOINT_EXECUTE)
  423. args->regs->flags |= X86_EFLAGS_RF;
  424. rcu_read_unlock();
  425. }
  426. /*
  427. * Further processing in do_debug() is needed for a) user-space
  428. * breakpoints (to generate signals) and b) when the system has
  429. * taken exception due to multiple causes
  430. */
  431. if ((current->thread.debugreg6 & DR_TRAP_BITS) ||
  432. (dr6 & (~DR_TRAP_BITS)))
  433. rc = NOTIFY_DONE;
  434. set_debugreg(dr7, 7);
  435. put_cpu();
  436. return rc;
  437. }
  438. /*
  439. * Handle debug exception notifications.
  440. */
  441. int __kprobes hw_breakpoint_exceptions_notify(
  442. struct notifier_block *unused, unsigned long val, void *data)
  443. {
  444. if (val != DIE_DEBUG)
  445. return NOTIFY_DONE;
  446. return hw_breakpoint_handler(data);
  447. }
  448. void hw_breakpoint_pmu_read(struct perf_event *bp)
  449. {
  450. /* TODO */
  451. }