cpu-freq.c 17 KB

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  1. /* linux/arch/arm/plat-s3c24xx/cpu-freq.c
  2. *
  3. * Copyright (c) 2006-2008 Simtec Electronics
  4. * http://armlinux.simtec.co.uk/
  5. * Ben Dooks <ben@simtec.co.uk>
  6. *
  7. * S3C24XX CPU Frequency scaling
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/init.h>
  14. #include <linux/module.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/ioport.h>
  17. #include <linux/cpufreq.h>
  18. #include <linux/cpu.h>
  19. #include <linux/clk.h>
  20. #include <linux/err.h>
  21. #include <linux/io.h>
  22. #include <linux/device.h>
  23. #include <linux/sysfs.h>
  24. #include <linux/slab.h>
  25. #include <asm/mach/arch.h>
  26. #include <asm/mach/map.h>
  27. #include <plat/cpu.h>
  28. #include <plat/clock.h>
  29. #include <plat/cpu-freq-core.h>
  30. #include <mach/regs-clock.h>
  31. /* note, cpufreq support deals in kHz, no Hz */
  32. static struct cpufreq_driver s3c24xx_driver;
  33. static struct s3c_cpufreq_config cpu_cur;
  34. static struct s3c_iotimings s3c24xx_iotiming;
  35. static struct cpufreq_frequency_table *pll_reg;
  36. static unsigned int last_target = ~0;
  37. static unsigned int ftab_size;
  38. static struct cpufreq_frequency_table *ftab;
  39. static struct clk *_clk_mpll;
  40. static struct clk *_clk_xtal;
  41. static struct clk *clk_fclk;
  42. static struct clk *clk_hclk;
  43. static struct clk *clk_pclk;
  44. static struct clk *clk_arm;
  45. #ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUGFS
  46. struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void)
  47. {
  48. return &cpu_cur;
  49. }
  50. struct s3c_iotimings *s3c_cpufreq_getiotimings(void)
  51. {
  52. return &s3c24xx_iotiming;
  53. }
  54. #endif /* CONFIG_CPU_FREQ_S3C24XX_DEBUGFS */
  55. static void s3c_cpufreq_getcur(struct s3c_cpufreq_config *cfg)
  56. {
  57. unsigned long fclk, pclk, hclk, armclk;
  58. cfg->freq.fclk = fclk = clk_get_rate(clk_fclk);
  59. cfg->freq.hclk = hclk = clk_get_rate(clk_hclk);
  60. cfg->freq.pclk = pclk = clk_get_rate(clk_pclk);
  61. cfg->freq.armclk = armclk = clk_get_rate(clk_arm);
  62. cfg->pll.index = __raw_readl(S3C2410_MPLLCON);
  63. cfg->pll.frequency = fclk;
  64. cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10);
  65. cfg->divs.h_divisor = fclk / hclk;
  66. cfg->divs.p_divisor = fclk / pclk;
  67. }
  68. static inline void s3c_cpufreq_calc(struct s3c_cpufreq_config *cfg)
  69. {
  70. unsigned long pll = cfg->pll.frequency;
  71. cfg->freq.fclk = pll;
  72. cfg->freq.hclk = pll / cfg->divs.h_divisor;
  73. cfg->freq.pclk = pll / cfg->divs.p_divisor;
  74. /* convert hclk into 10ths of nanoseconds for io calcs */
  75. cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10);
  76. }
  77. static inline int closer(unsigned int target, unsigned int n, unsigned int c)
  78. {
  79. int diff_cur = abs(target - c);
  80. int diff_new = abs(target - n);
  81. return (diff_new < diff_cur);
  82. }
  83. static void s3c_cpufreq_show(const char *pfx,
  84. struct s3c_cpufreq_config *cfg)
  85. {
  86. s3c_freq_dbg("%s: Fvco=%u, F=%lu, A=%lu, H=%lu (%u), P=%lu (%u)\n",
  87. pfx, cfg->pll.frequency, cfg->freq.fclk, cfg->freq.armclk,
  88. cfg->freq.hclk, cfg->divs.h_divisor,
  89. cfg->freq.pclk, cfg->divs.p_divisor);
  90. }
  91. /* functions to wrapper the driver info calls to do the cpu specific work */
  92. static void s3c_cpufreq_setio(struct s3c_cpufreq_config *cfg)
  93. {
  94. if (cfg->info->set_iotiming)
  95. (cfg->info->set_iotiming)(cfg, &s3c24xx_iotiming);
  96. }
  97. static int s3c_cpufreq_calcio(struct s3c_cpufreq_config *cfg)
  98. {
  99. if (cfg->info->calc_iotiming)
  100. return (cfg->info->calc_iotiming)(cfg, &s3c24xx_iotiming);
  101. return 0;
  102. }
  103. static void s3c_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg)
  104. {
  105. (cfg->info->set_refresh)(cfg);
  106. }
  107. static void s3c_cpufreq_setdivs(struct s3c_cpufreq_config *cfg)
  108. {
  109. (cfg->info->set_divs)(cfg);
  110. }
  111. static int s3c_cpufreq_calcdivs(struct s3c_cpufreq_config *cfg)
  112. {
  113. return (cfg->info->calc_divs)(cfg);
  114. }
  115. static void s3c_cpufreq_setfvco(struct s3c_cpufreq_config *cfg)
  116. {
  117. (cfg->info->set_fvco)(cfg);
  118. }
  119. static inline void s3c_cpufreq_resume_clocks(void)
  120. {
  121. cpu_cur.info->resume_clocks();
  122. }
  123. static inline void s3c_cpufreq_updateclk(struct clk *clk,
  124. unsigned int freq)
  125. {
  126. clk_set_rate(clk, freq);
  127. }
  128. static int s3c_cpufreq_settarget(struct cpufreq_policy *policy,
  129. unsigned int target_freq,
  130. struct cpufreq_frequency_table *pll)
  131. {
  132. struct s3c_cpufreq_freqs freqs;
  133. struct s3c_cpufreq_config cpu_new;
  134. unsigned long flags;
  135. cpu_new = cpu_cur; /* copy new from current */
  136. s3c_cpufreq_show("cur", &cpu_cur);
  137. /* TODO - check for DMA currently outstanding */
  138. cpu_new.pll = pll ? *pll : cpu_cur.pll;
  139. if (pll)
  140. freqs.pll_changing = 1;
  141. /* update our frequencies */
  142. cpu_new.freq.armclk = target_freq;
  143. cpu_new.freq.fclk = cpu_new.pll.frequency;
  144. if (s3c_cpufreq_calcdivs(&cpu_new) < 0) {
  145. printk(KERN_ERR "no divisors for %d\n", target_freq);
  146. goto err_notpossible;
  147. }
  148. s3c_freq_dbg("%s: got divs\n", __func__);
  149. s3c_cpufreq_calc(&cpu_new);
  150. s3c_freq_dbg("%s: calculated frequencies for new\n", __func__);
  151. if (cpu_new.freq.hclk != cpu_cur.freq.hclk) {
  152. if (s3c_cpufreq_calcio(&cpu_new) < 0) {
  153. printk(KERN_ERR "%s: no IO timings\n", __func__);
  154. goto err_notpossible;
  155. }
  156. }
  157. s3c_cpufreq_show("new", &cpu_new);
  158. /* setup our cpufreq parameters */
  159. freqs.old = cpu_cur.freq;
  160. freqs.new = cpu_new.freq;
  161. freqs.freqs.cpu = 0;
  162. freqs.freqs.old = cpu_cur.freq.armclk / 1000;
  163. freqs.freqs.new = cpu_new.freq.armclk / 1000;
  164. /* update f/h/p clock settings before we issue the change
  165. * notification, so that drivers do not need to do anything
  166. * special if they want to recalculate on CPUFREQ_PRECHANGE. */
  167. s3c_cpufreq_updateclk(_clk_mpll, cpu_new.pll.frequency);
  168. s3c_cpufreq_updateclk(clk_fclk, cpu_new.freq.fclk);
  169. s3c_cpufreq_updateclk(clk_hclk, cpu_new.freq.hclk);
  170. s3c_cpufreq_updateclk(clk_pclk, cpu_new.freq.pclk);
  171. /* start the frequency change */
  172. if (policy)
  173. cpufreq_notify_transition(&freqs.freqs, CPUFREQ_PRECHANGE);
  174. /* If hclk is staying the same, then we do not need to
  175. * re-write the IO or the refresh timings whilst we are changing
  176. * speed. */
  177. local_irq_save(flags);
  178. /* is our memory clock slowing down? */
  179. if (cpu_new.freq.hclk < cpu_cur.freq.hclk) {
  180. s3c_cpufreq_setrefresh(&cpu_new);
  181. s3c_cpufreq_setio(&cpu_new);
  182. }
  183. if (cpu_new.freq.fclk == cpu_cur.freq.fclk) {
  184. /* not changing PLL, just set the divisors */
  185. s3c_cpufreq_setdivs(&cpu_new);
  186. } else {
  187. if (cpu_new.freq.fclk < cpu_cur.freq.fclk) {
  188. /* slow the cpu down, then set divisors */
  189. s3c_cpufreq_setfvco(&cpu_new);
  190. s3c_cpufreq_setdivs(&cpu_new);
  191. } else {
  192. /* set the divisors, then speed up */
  193. s3c_cpufreq_setdivs(&cpu_new);
  194. s3c_cpufreq_setfvco(&cpu_new);
  195. }
  196. }
  197. /* did our memory clock speed up */
  198. if (cpu_new.freq.hclk > cpu_cur.freq.hclk) {
  199. s3c_cpufreq_setrefresh(&cpu_new);
  200. s3c_cpufreq_setio(&cpu_new);
  201. }
  202. /* update our current settings */
  203. cpu_cur = cpu_new;
  204. local_irq_restore(flags);
  205. /* notify everyone we've done this */
  206. if (policy)
  207. cpufreq_notify_transition(&freqs.freqs, CPUFREQ_POSTCHANGE);
  208. s3c_freq_dbg("%s: finished\n", __func__);
  209. return 0;
  210. err_notpossible:
  211. printk(KERN_ERR "no compatible settings for %d\n", target_freq);
  212. return -EINVAL;
  213. }
  214. /* s3c_cpufreq_target
  215. *
  216. * called by the cpufreq core to adjust the frequency that the CPU
  217. * is currently running at.
  218. */
  219. static int s3c_cpufreq_target(struct cpufreq_policy *policy,
  220. unsigned int target_freq,
  221. unsigned int relation)
  222. {
  223. struct cpufreq_frequency_table *pll;
  224. unsigned int index;
  225. /* avoid repeated calls which cause a needless amout of duplicated
  226. * logging output (and CPU time as the calculation process is
  227. * done) */
  228. if (target_freq == last_target)
  229. return 0;
  230. last_target = target_freq;
  231. s3c_freq_dbg("%s: policy %p, target %u, relation %u\n",
  232. __func__, policy, target_freq, relation);
  233. if (ftab) {
  234. if (cpufreq_frequency_table_target(policy, ftab,
  235. target_freq, relation,
  236. &index)) {
  237. s3c_freq_dbg("%s: table failed\n", __func__);
  238. return -EINVAL;
  239. }
  240. s3c_freq_dbg("%s: adjust %d to entry %d (%u)\n", __func__,
  241. target_freq, index, ftab[index].frequency);
  242. target_freq = ftab[index].frequency;
  243. }
  244. target_freq *= 1000; /* convert target to Hz */
  245. /* find the settings for our new frequency */
  246. if (!pll_reg || cpu_cur.lock_pll) {
  247. /* either we've not got any PLL values, or we've locked
  248. * to the current one. */
  249. pll = NULL;
  250. } else {
  251. struct cpufreq_policy tmp_policy;
  252. int ret;
  253. /* we keep the cpu pll table in Hz, to ensure we get an
  254. * accurate value for the PLL output. */
  255. tmp_policy.min = policy->min * 1000;
  256. tmp_policy.max = policy->max * 1000;
  257. tmp_policy.cpu = policy->cpu;
  258. /* cpufreq_frequency_table_target uses a pointer to 'index'
  259. * which is the number of the table entry, not the value of
  260. * the table entry's index field. */
  261. ret = cpufreq_frequency_table_target(&tmp_policy, pll_reg,
  262. target_freq, relation,
  263. &index);
  264. if (ret < 0) {
  265. printk(KERN_ERR "%s: no PLL available\n", __func__);
  266. goto err_notpossible;
  267. }
  268. pll = pll_reg + index;
  269. s3c_freq_dbg("%s: target %u => %u\n",
  270. __func__, target_freq, pll->frequency);
  271. target_freq = pll->frequency;
  272. }
  273. return s3c_cpufreq_settarget(policy, target_freq, pll);
  274. err_notpossible:
  275. printk(KERN_ERR "no compatible settings for %d\n", target_freq);
  276. return -EINVAL;
  277. }
  278. static unsigned int s3c_cpufreq_get(unsigned int cpu)
  279. {
  280. return clk_get_rate(clk_arm) / 1000;
  281. }
  282. struct clk *s3c_cpufreq_clk_get(struct device *dev, const char *name)
  283. {
  284. struct clk *clk;
  285. clk = clk_get(dev, name);
  286. if (IS_ERR(clk))
  287. printk(KERN_ERR "cpufreq: failed to get clock '%s'\n", name);
  288. return clk;
  289. }
  290. static int s3c_cpufreq_init(struct cpufreq_policy *policy)
  291. {
  292. printk(KERN_INFO "%s: initialising policy %p\n", __func__, policy);
  293. if (policy->cpu != 0)
  294. return -EINVAL;
  295. policy->cur = s3c_cpufreq_get(0);
  296. policy->min = policy->cpuinfo.min_freq = 0;
  297. policy->max = policy->cpuinfo.max_freq = cpu_cur.info->max.fclk / 1000;
  298. policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
  299. /* feed the latency information from the cpu driver */
  300. policy->cpuinfo.transition_latency = cpu_cur.info->latency;
  301. if (ftab)
  302. cpufreq_frequency_table_cpuinfo(policy, ftab);
  303. return 0;
  304. }
  305. static __init int s3c_cpufreq_initclks(void)
  306. {
  307. _clk_mpll = s3c_cpufreq_clk_get(NULL, "mpll");
  308. _clk_xtal = s3c_cpufreq_clk_get(NULL, "xtal");
  309. clk_fclk = s3c_cpufreq_clk_get(NULL, "fclk");
  310. clk_hclk = s3c_cpufreq_clk_get(NULL, "hclk");
  311. clk_pclk = s3c_cpufreq_clk_get(NULL, "pclk");
  312. clk_arm = s3c_cpufreq_clk_get(NULL, "armclk");
  313. if (IS_ERR(clk_fclk) || IS_ERR(clk_hclk) || IS_ERR(clk_pclk) ||
  314. IS_ERR(_clk_mpll) || IS_ERR(clk_arm) || IS_ERR(_clk_xtal)) {
  315. printk(KERN_ERR "%s: could not get clock(s)\n", __func__);
  316. return -ENOENT;
  317. }
  318. printk(KERN_INFO "%s: clocks f=%lu,h=%lu,p=%lu,a=%lu\n", __func__,
  319. clk_get_rate(clk_fclk) / 1000,
  320. clk_get_rate(clk_hclk) / 1000,
  321. clk_get_rate(clk_pclk) / 1000,
  322. clk_get_rate(clk_arm) / 1000);
  323. return 0;
  324. }
  325. static int s3c_cpufreq_verify(struct cpufreq_policy *policy)
  326. {
  327. if (policy->cpu != 0)
  328. return -EINVAL;
  329. return 0;
  330. }
  331. #ifdef CONFIG_PM
  332. static struct cpufreq_frequency_table suspend_pll;
  333. static unsigned int suspend_freq;
  334. static int s3c_cpufreq_suspend(struct cpufreq_policy *policy)
  335. {
  336. suspend_pll.frequency = clk_get_rate(_clk_mpll);
  337. suspend_pll.index = __raw_readl(S3C2410_MPLLCON);
  338. suspend_freq = s3c_cpufreq_get(0) * 1000;
  339. return 0;
  340. }
  341. static int s3c_cpufreq_resume(struct cpufreq_policy *policy)
  342. {
  343. int ret;
  344. s3c_freq_dbg("%s: resuming with policy %p\n", __func__, policy);
  345. last_target = ~0; /* invalidate last_target setting */
  346. /* first, find out what speed we resumed at. */
  347. s3c_cpufreq_resume_clocks();
  348. /* whilst we will be called later on, we try and re-set the
  349. * cpu frequencies as soon as possible so that we do not end
  350. * up resuming devices and then immediately having to re-set
  351. * a number of settings once these devices have restarted.
  352. *
  353. * as a note, it is expected devices are not used until they
  354. * have been un-suspended and at that time they should have
  355. * used the updated clock settings.
  356. */
  357. ret = s3c_cpufreq_settarget(NULL, suspend_freq, &suspend_pll);
  358. if (ret) {
  359. printk(KERN_ERR "%s: failed to reset pll/freq\n", __func__);
  360. return ret;
  361. }
  362. return 0;
  363. }
  364. #else
  365. #define s3c_cpufreq_resume NULL
  366. #define s3c_cpufreq_suspend NULL
  367. #endif
  368. static struct cpufreq_driver s3c24xx_driver = {
  369. .flags = CPUFREQ_STICKY,
  370. .verify = s3c_cpufreq_verify,
  371. .target = s3c_cpufreq_target,
  372. .get = s3c_cpufreq_get,
  373. .init = s3c_cpufreq_init,
  374. .suspend = s3c_cpufreq_suspend,
  375. .resume = s3c_cpufreq_resume,
  376. .name = "s3c24xx",
  377. };
  378. int __init s3c_cpufreq_register(struct s3c_cpufreq_info *info)
  379. {
  380. if (!info || !info->name) {
  381. printk(KERN_ERR "%s: failed to pass valid information\n",
  382. __func__);
  383. return -EINVAL;
  384. }
  385. printk(KERN_INFO "S3C24XX CPU Frequency driver, %s cpu support\n",
  386. info->name);
  387. /* check our driver info has valid data */
  388. BUG_ON(info->set_refresh == NULL);
  389. BUG_ON(info->set_divs == NULL);
  390. BUG_ON(info->calc_divs == NULL);
  391. /* info->set_fvco is optional, depending on whether there
  392. * is a need to set the clock code. */
  393. cpu_cur.info = info;
  394. /* Note, driver registering should probably update locktime */
  395. return 0;
  396. }
  397. int __init s3c_cpufreq_setboard(struct s3c_cpufreq_board *board)
  398. {
  399. struct s3c_cpufreq_board *ours;
  400. if (!board) {
  401. printk(KERN_INFO "%s: no board data\n", __func__);
  402. return -EINVAL;
  403. }
  404. /* Copy the board information so that each board can make this
  405. * initdata. */
  406. ours = kzalloc(sizeof(struct s3c_cpufreq_board), GFP_KERNEL);
  407. if (ours == NULL) {
  408. printk(KERN_ERR "%s: no memory\n", __func__);
  409. return -ENOMEM;
  410. }
  411. *ours = *board;
  412. cpu_cur.board = ours;
  413. return 0;
  414. }
  415. int __init s3c_cpufreq_auto_io(void)
  416. {
  417. int ret;
  418. if (!cpu_cur.info->get_iotiming) {
  419. printk(KERN_ERR "%s: get_iotiming undefined\n", __func__);
  420. return -ENOENT;
  421. }
  422. printk(KERN_INFO "%s: working out IO settings\n", __func__);
  423. ret = (cpu_cur.info->get_iotiming)(&cpu_cur, &s3c24xx_iotiming);
  424. if (ret)
  425. printk(KERN_ERR "%s: failed to get timings\n", __func__);
  426. return ret;
  427. }
  428. /* if one or is zero, then return the other, otherwise return the min */
  429. #define do_min(_a, _b) ((_a) == 0 ? (_b) : (_b) == 0 ? (_a) : min(_a, _b))
  430. /**
  431. * s3c_cpufreq_freq_min - find the minimum settings for the given freq.
  432. * @dst: The destination structure
  433. * @a: One argument.
  434. * @b: The other argument.
  435. *
  436. * Create a minimum of each frequency entry in the 'struct s3c_freq',
  437. * unless the entry is zero when it is ignored and the non-zero argument
  438. * used.
  439. */
  440. static void s3c_cpufreq_freq_min(struct s3c_freq *dst,
  441. struct s3c_freq *a, struct s3c_freq *b)
  442. {
  443. dst->fclk = do_min(a->fclk, b->fclk);
  444. dst->hclk = do_min(a->hclk, b->hclk);
  445. dst->pclk = do_min(a->pclk, b->pclk);
  446. dst->armclk = do_min(a->armclk, b->armclk);
  447. }
  448. static inline u32 calc_locktime(u32 freq, u32 time_us)
  449. {
  450. u32 result;
  451. result = freq * time_us;
  452. result = DIV_ROUND_UP(result, 1000 * 1000);
  453. return result;
  454. }
  455. static void s3c_cpufreq_update_loctkime(void)
  456. {
  457. unsigned int bits = cpu_cur.info->locktime_bits;
  458. u32 rate = (u32)clk_get_rate(_clk_xtal);
  459. u32 val;
  460. if (bits == 0) {
  461. WARN_ON(1);
  462. return;
  463. }
  464. val = calc_locktime(rate, cpu_cur.info->locktime_u) << bits;
  465. val |= calc_locktime(rate, cpu_cur.info->locktime_m);
  466. printk(KERN_INFO "%s: new locktime is 0x%08x\n", __func__, val);
  467. __raw_writel(val, S3C2410_LOCKTIME);
  468. }
  469. static int s3c_cpufreq_build_freq(void)
  470. {
  471. int size, ret;
  472. if (!cpu_cur.info->calc_freqtable)
  473. return -EINVAL;
  474. kfree(ftab);
  475. ftab = NULL;
  476. size = cpu_cur.info->calc_freqtable(&cpu_cur, NULL, 0);
  477. size++;
  478. ftab = kmalloc(sizeof(struct cpufreq_frequency_table) * size, GFP_KERNEL);
  479. if (!ftab) {
  480. printk(KERN_ERR "%s: no memory for tables\n", __func__);
  481. return -ENOMEM;
  482. }
  483. ftab_size = size;
  484. ret = cpu_cur.info->calc_freqtable(&cpu_cur, ftab, size);
  485. s3c_cpufreq_addfreq(ftab, ret, size, CPUFREQ_TABLE_END);
  486. return 0;
  487. }
  488. static int __init s3c_cpufreq_initcall(void)
  489. {
  490. int ret = 0;
  491. if (cpu_cur.info && cpu_cur.board) {
  492. ret = s3c_cpufreq_initclks();
  493. if (ret)
  494. goto out;
  495. /* get current settings */
  496. s3c_cpufreq_getcur(&cpu_cur);
  497. s3c_cpufreq_show("cur", &cpu_cur);
  498. if (cpu_cur.board->auto_io) {
  499. ret = s3c_cpufreq_auto_io();
  500. if (ret) {
  501. printk(KERN_ERR "%s: failed to get io timing\n",
  502. __func__);
  503. goto out;
  504. }
  505. }
  506. if (cpu_cur.board->need_io && !cpu_cur.info->set_iotiming) {
  507. printk(KERN_ERR "%s: no IO support registered\n",
  508. __func__);
  509. ret = -EINVAL;
  510. goto out;
  511. }
  512. if (!cpu_cur.info->need_pll)
  513. cpu_cur.lock_pll = 1;
  514. s3c_cpufreq_update_loctkime();
  515. s3c_cpufreq_freq_min(&cpu_cur.max, &cpu_cur.board->max,
  516. &cpu_cur.info->max);
  517. if (cpu_cur.info->calc_freqtable)
  518. s3c_cpufreq_build_freq();
  519. ret = cpufreq_register_driver(&s3c24xx_driver);
  520. }
  521. out:
  522. return ret;
  523. }
  524. late_initcall(s3c_cpufreq_initcall);
  525. /**
  526. * s3c_plltab_register - register CPU PLL table.
  527. * @plls: The list of PLL entries.
  528. * @plls_no: The size of the PLL entries @plls.
  529. *
  530. * Register the given set of PLLs with the system.
  531. */
  532. int __init s3c_plltab_register(struct cpufreq_frequency_table *plls,
  533. unsigned int plls_no)
  534. {
  535. struct cpufreq_frequency_table *vals;
  536. unsigned int size;
  537. size = sizeof(struct cpufreq_frequency_table) * (plls_no + 1);
  538. vals = kmalloc(size, GFP_KERNEL);
  539. if (vals) {
  540. memcpy(vals, plls, size);
  541. pll_reg = vals;
  542. /* write a terminating entry, we don't store it in the
  543. * table that is stored in the kernel */
  544. vals += plls_no;
  545. vals->frequency = CPUFREQ_TABLE_END;
  546. printk(KERN_INFO "cpufreq: %d PLL entries\n", plls_no);
  547. } else
  548. printk(KERN_ERR "cpufreq: no memory for PLL tables\n");
  549. return vals ? 0 : -ENOMEM;
  550. }